[ViewVC] Diff of: cebix/SheepShaver/src/Unix/main

Comparing SheepShaver/src/Unix/main_unix.cpp (file contents):
Revision 1.13 by gbeauche, 2003-11-03T21:28:25Z vs.
Revision 1.29 by gbeauche, 2004-01-31T11:10:49Z

#	Line 1 \| Line 1
1		/*
2		* main_unix.cpp - Emulation core, Unix implementation
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 109 \| Line 109
109		#include "user_strings.h"
110		#include "vm_alloc.h"
111		#include "sigsegv.h"
112	+	#include "thunks.h"
113
114		#define DEBUG 0
115		#include "debug.h"
#	Line 131 \| Line 132
132		#endif
133
134
135	+	// Enable emulation of unaligned lmw/stmw?
136	+	#define EMULATE_UNALIGNED_LOADSTORE_MULTIPLE 1
137	+
138		// Enable Execute68k() safety checks?
139		#define SAFE_EXEC_68K 0
140
#	Line 145 \| Line 149
149		const char ROM_FILE_NAME[] = "ROM";
150		const char ROM_FILE_NAME2[] = "Mac OS ROM";
151
152	<	const uint32 RAM_BASE = 0x20000000; // Base address of RAM
152	>	const uintptr RAM_BASE = 0x20000000; // Base address of RAM
153		const uint32 SIG_STACK_SIZE = 0x10000; // Size of signal stack
154
155
156		#if !EMULATED_PPC
153	–	// Structure in which registers are saved in a signal handler;
154	–	// sigcontext->regs points to it
155	–	// (see arch/ppc/kernel/signal.c)
156	–	typedef struct {
157	–	uint32 u[4];
158	–	} __attribute((aligned(16))) vector128;
159	–	#include <linux/elf.h>
160	–
157		struct sigregs {
158	<	elf_gregset_t gp_regs; // Identical to pt_regs
159	<	double fp_regs[ELF_NFPREG]; // f0..f31 and fpsrc
160	<	//more (uninteresting) stuff following here
158	>	uint32 nip;
159	>	uint32 link;
160	>	uint32 ctr;
161	>	uint32 msr;
162	>	uint32 xer;
163	>	uint32 ccr;
164	>	uint32 gpr[32];
165	>	};
166	>
167	>	#if defined(__linux__)
168	>	#include <sys/ucontext.h>
169	>	#define MACHINE_REGISTERS(scp) ((machine_regs )(((ucontext_t )scp)->uc_mcontext.regs))
170	>
171	>	struct machine_regs : public pt_regs
172	>	{
173	>	u_long & cr() { return pt_regs::ccr; }
174	>	uint32 cr() const { return pt_regs::ccr; }
175	>	uint32 lr() const { return pt_regs::link; }
176	>	uint32 ctr() const { return pt_regs::ctr; }
177	>	uint32 xer() const { return pt_regs::xer; }
178	>	uint32 msr() const { return pt_regs::msr; }
179	>	uint32 dar() const { return pt_regs::dar; }
180	>	u_long & pc() { return pt_regs::nip; }
181	>	uint32 pc() const { return pt_regs::nip; }
182	>	u_long & gpr(int i) { return pt_regs::gpr[i]; }
183	>	uint32 gpr(int i) const { return pt_regs::gpr[i]; }
184	>	};
185	>	#endif
186	>
187	>	#if defined(__APPLE__) && defined(__MACH__)
188	>	#include <sys/signal.h>
189	>	extern "C" int sigaltstack(const struct sigaltstack ss, struct sigaltstack oss);
190	>
191	>	#include <sys/ucontext.h>
192	>	#define MACHINE_REGISTERS(scp) ((machine_regs )(((ucontext_t )scp)->uc_mcontext))
193	>
194	>	struct machine_regs : public mcontext
195	>	{
196	>	uint32 & cr() { return ss.cr; }
197	>	uint32 cr() const { return ss.cr; }
198	>	uint32 lr() const { return ss.lr; }
199	>	uint32 ctr() const { return ss.ctr; }
200	>	uint32 xer() const { return ss.xer; }
201	>	uint32 msr() const { return ss.srr1; }
202	>	uint32 dar() const { return es.dar; }
203	>	uint32 & pc() { return ss.srr0; }
204	>	uint32 pc() const { return ss.srr0; }
205	>	uint32 & gpr(int i) { return (&ss.r0)[i]; }
206	>	uint32 gpr(int i) const { return (&ss.r0)[i]; }
207		};
208		#endif
209
210	+	static void build_sigregs(sigregs srp, machine_regs mrp)
211	+	{
212	+	srp->nip = mrp->pc();
213	+	srp->link = mrp->lr();
214	+	srp->ctr = mrp->ctr();
215	+	srp->msr = mrp->msr();
216	+	srp->xer = mrp->xer();
217	+	srp->ccr = mrp->cr();
218	+	for (int i = 0; i < 32; i++)
219	+	srp->gpr[i] = mrp->gpr(i);
220	+	}
221	+	#endif
222	+
223
224		// Global variables (exported)
225		#if !EMULATED_PPC
#	Line 172 \| Line 227 \| *void TOC; // Small data pointer (r13**
227		#endif
228		uint32 RAMBase; // Base address of Mac RAM
229		uint32 RAMSize; // Size of Mac RAM
175	–	uint32 SheepStack1Base; // SheepShaver first alternate stack base
176	–	uint32 SheepStack2Base; // SheepShaver second alternate stack base
177	–	uint32 SheepThunksBase; // SheepShaver thunks base
230		uint32 KernelDataAddr; // Address of Kernel Data
231		uint32 BootGlobsAddr; // Address of BootGlobs structure at top of Mac RAM
232		uint32 PVR; // Theoretical PVR
#	Line 185 \| Line 237 \| int64 BusClockSpeed; // Bus clock speed
237		// Global variables
238		char *x_display_name = NULL; // X11 display name
239		Display *x_display = NULL; // X11 display handle
240	+	#ifdef X11_LOCK_TYPE
241	+	X11_LOCK_TYPE x_display_lock = X11_LOCK_INIT; // X11 display lock
242	+	#endif
243
244		static int zero_fd = 0; // FD of /dev/zero
190	–	static bool sheep_area_mapped = false; // Flag: SheepShaver data area mmap()ed
245		static bool lm_area_mapped = false; // Flag: Low Memory area mmap()ped
246		static int kernel_area = -1; // SHM ID of Kernel Data area
247		static bool rom_area_mapped = false; // Flag: Mac ROM mmap()ped
#	Line 207 \| Line 261 \| static bool ready_for_signals = false;
261		static int64 num_segv = 0; // Number of handled SEGV signals
262
263		static struct sigaction sigusr2_action; // Interrupt signal (of emulator thread)
264	<	#if !EMULATED_PPC
264	>	#if EMULATED_PPC
265	>	static uintptr sig_stack = 0; // Stack for PowerPC interrupt routine
266	>	#else
267		static struct sigaction sigsegv_action; // Data access exception signal (of emulator thread)
268		static struct sigaction sigill_action; // Illegal instruction signal (of emulator thread)
269		static void *sig_stack = NULL; // Stack for signal handlers
270		static void *extra_stack = NULL; // Stack for SIGSEGV inside interrupt handler
271		static bool emul_thread_fatal = false; // Flag: MacOS thread crashed, tick thread shall dump debug output
272		static sigregs sigsegv_regs; // Register dump when crashed
273	+	static const char *crash_reason = NULL; // Reason of the crash (SIGSEGV, SIGBUS, SIGILL)
274		#endif
275
276	+	uintptr SheepMem::zero_page = 0; // Address of ro page filled in with zeros
277	+	uintptr SheepMem::base = 0x60000000; // Address of SheepShaver data
278	+	uintptr SheepMem::top = 0; // Top of SheepShaver data (stack like storage)
279	+
280
281		// Prototypes
282		static void Quit(void);
#	Line 228 \| Line 289 \| extern void emul_ppc(uint32 start);
289		extern void init_emul_ppc(void);
290		extern void exit_emul_ppc(void);
291		#else
292	<	static void sigusr2_handler(int sig, sigcontext_struct *sc);
293	<	static void sigsegv_handler(int sig, sigcontext_struct *sc);
294	<	static void sigill_handler(int sig, sigcontext_struct *sc);
292	>	static void sigusr2_handler(int sig, siginfo_t sip, void scp);
293	>	static void sigsegv_handler(int sig, siginfo_t sip, void scp);
294	>	static void sigill_handler(int sig, siginfo_t sip, void scp);
295		#endif
296
297
#	Line 252 \| Line 313 \| extern void paranoia_check(void);
313
314		#if EMULATED_PPC
315		/*
316	+	* Return signal stack base
317	+	*/
318	+
319	+	uintptr SignalStackBase(void)
320	+	{
321	+	return sig_stack + SIG_STACK_SIZE;
322	+	}
323	+
324	+
325	+	/*
326		* Atomic operations
327		*/
328
#	Line 389 \| Line 460 \| int main(int argc, char argv)**
460		// Parse line
461		int i;
462		char value[256];
463	<	if (sscanf(line, "cpu : %s", value) == 1) {
463	>	if (sscanf(line, "cpu : %[0-9A-Za-a]", value) == 1) {
464		if (strcmp(value, "601") == 0)
465		PVR = 0x00010000;
466		else if (strcmp(value, "603") == 0)
#	Line 410 \| Line 481 \| int main(int argc, char argv)**
481		PVR = 0x00320000;
482		else if (strcmp(value, "860") == 0)
483		PVR = 0x00500000;
484	+	else if (strcmp(value, "7400") == 0)
485	+	PVR = 0x80000000;
486	+	else if (strcmp(value, "7410") == 0)
487	+	PVR = 0x800c0000;
488		else
489		printf("WARNING: Unknown CPU type '%s', assuming 604\n", value);
490		}
#	Line 445 \| Line 520 \| int main(int argc, char argv)**
520		goto quit;
521		}
522
523	+	#ifndef PAGEZERO_HACK
524		// Create Low Memory area (0x0000..0x3000)
525		if (vm_acquire_fixed((char *)0, 0x3000) < 0) {
526		sprintf(str, GetString(STR_LOW_MEM_MMAP_ERR), strerror(errno));
#	Line 452 \| Line 528 \| int main(int argc, char argv)**
528		goto quit;
529		}
530		lm_area_mapped = true;
531	+	#endif
532
533		// Create areas for Kernel Data
534		kernel_area = shmget(IPC_PRIVATE, KERNEL_AREA_SIZE, 0600);
#	Line 470 \| Line 547 \| int main(int argc, char argv)**
547		ErrorAlert(str);
548		goto quit;
549		}
550	<	kernel_data = (KernelData *)0x68ffe000;
550	>	kernel_data = (KernelData *)KERNEL_DATA_BASE;
551		emulator_data = &kernel_data->ed;
552	<	KernelDataAddr = (uint32)kernel_data;
552	>	KernelDataAddr = KERNEL_DATA_BASE;
553		D(bug("Kernel Data at %p, Emulator Data at %p\n", kernel_data, emulator_data));
554
555		// Create area for SheepShaver data
556	<	if (vm_acquire_fixed((char *)SHEEP_BASE, SHEEP_SIZE) < 0) {
556	>	if (!SheepMem::Init()) {
557		sprintf(str, GetString(STR_SHEEP_MEM_MMAP_ERR), strerror(errno));
558		ErrorAlert(str);
559		goto quit;
560		}
484	–	SheepStack1Base = SHEEP_BASE + 0x10000;
485	–	SheepStack2Base = SheepStack1Base + 0x10000;
486	–	SheepThunksBase = SheepStack2Base + 0x1000;
487	–	sheep_area_mapped = true;
561
562		// Create area for Mac ROM
563		if (vm_acquire_fixed((char *)ROM_BASE, ROM_AREA_SIZE) < 0) {
#	Line 492 \| Line 565 \| int main(int argc, char argv)**
565		ErrorAlert(str);
566		goto quit;
567		}
568	<	#if !EMULATED_PPC \|\| defined(__powerpc__)
568	>	#if !EMULATED_PPC
569		if (vm_protect((char *)ROM_BASE, ROM_AREA_SIZE, VM_PAGE_READ \| VM_PAGE_WRITE \| VM_PAGE_EXECUTE) < 0) {
570		sprintf(str, GetString(STR_ROM_MMAP_ERR), strerror(errno));
571		ErrorAlert(str);
#	Line 579 \| Line 652 \| int main(int argc, char argv)**
652		boot_globs[1] = htonl(RAMSize);
653		boot_globs[2] = htonl((uint32)-1); // End of bank table
654
655	+	// Init thunks
656	+	if (!ThunksInit())
657	+	goto quit;
658	+
659		// Init drivers
660		SonyInit();
661		DiskInit();
#	Line 588 \| Line 665 \| int main(int argc, char argv)**
665		// Init external file system
666		ExtFSInit();
667
668	+	// Init ADB
669	+	ADBInit();
670	+
671		// Init audio
672		AudioInit();
673
#	Line 622 \| Line 702 \| int main(int argc, char argv)**
702		// Initialize Kernel Data
703		memset(kernel_data, 0, sizeof(KernelData));
704		if (ROMType == ROMTYPE_NEWWORLD) {
705	<	static uint32 of_dev_tree[4] = {0, 0, 0, 0};
706	<	static uint8 vector_lookup_tbl[128];
707	<	static uint8 vector_mask_tbl[64];
705	>	uintptr of_dev_tree = SheepMem::Reserve(4 * sizeof(uint32));
706	>	memset((void )of_dev_tree, 0, 4 sizeof(uint32));
707	>	uintptr vector_lookup_tbl = SheepMem::Reserve(128);
708	>	uintptr vector_mask_tbl = SheepMem::Reserve(64);
709		memset((uint8 *)kernel_data + 0xb80, 0x3d, 0x80);
710	<	memset(vector_lookup_tbl, 0, 128);
711	<	memset(vector_mask_tbl, 0, 64);
710	>	memset((void *)vector_lookup_tbl, 0, 128);
711	>	memset((void *)vector_mask_tbl, 0, 64);
712		kernel_data->v[0xb80 >> 2] = htonl(ROM_BASE);
713	<	kernel_data->v[0xb84 >> 2] = htonl((uint32)of_dev_tree); // OF device tree base
714	<	kernel_data->v[0xb90 >> 2] = htonl((uint32)vector_lookup_tbl);
715	<	kernel_data->v[0xb94 >> 2] = htonl((uint32)vector_mask_tbl);
713	>	kernel_data->v[0xb84 >> 2] = htonl(of_dev_tree); // OF device tree base
714	>	kernel_data->v[0xb90 >> 2] = htonl(vector_lookup_tbl);
715	>	kernel_data->v[0xb94 >> 2] = htonl(vector_mask_tbl);
716		kernel_data->v[0xb98 >> 2] = htonl(ROM_BASE); // OpenPIC base
717		kernel_data->v[0xbb0 >> 2] = htonl(0); // ADB base
718		kernel_data->v[0xc20 >> 2] = htonl(RAMSize);
#	Line 667 \| Line 748 \| int main(int argc, char argv)**
748		D(bug("Initializing Low Memory...\n"));
749		memset(NULL, 0, 0x3000);
750		WriteMacInt32(XLM_SIGNATURE, FOURCC('B','a','a','h')); // Signature to detect SheepShaver
751	<	WriteMacInt32(XLM_KERNEL_DATA, (uint32)kernel_data); // For trap replacement routines
751	>	WriteMacInt32(XLM_KERNEL_DATA, KernelDataAddr); // For trap replacement routines
752		WriteMacInt32(XLM_PVR, PVR); // Theoretical PVR
753		WriteMacInt32(XLM_BUS_CLOCK, BusClockSpeed); // For DriverServicesLib patch
754		WriteMacInt16(XLM_EXEC_RETURN_OPCODE, M68K_EXEC_RETURN); // For Execute68k() (RTS from the executed 68k code will jump here and end 68k mode)
755	<	#if EMULATED_PPC
756	<	WriteMacInt32(XLM_ETHER_INIT, POWERPC_NATIVE_OP_FUNC(NATIVE_ETHER_INIT));
757	<	WriteMacInt32(XLM_ETHER_TERM, POWERPC_NATIVE_OP_FUNC(NATIVE_ETHER_TERM));
677	<	WriteMacInt32(XLM_ETHER_OPEN, POWERPC_NATIVE_OP_FUNC(NATIVE_ETHER_OPEN));
678	<	WriteMacInt32(XLM_ETHER_CLOSE, POWERPC_NATIVE_OP_FUNC(NATIVE_ETHER_CLOSE));
679	<	WriteMacInt32(XLM_ETHER_WPUT, POWERPC_NATIVE_OP_FUNC(NATIVE_ETHER_WPUT));
680	<	WriteMacInt32(XLM_ETHER_RSRV, POWERPC_NATIVE_OP_FUNC(NATIVE_ETHER_RSRV));
681	<	WriteMacInt32(XLM_VIDEO_DOIO, POWERPC_NATIVE_OP_FUNC(NATIVE_VIDEO_DO_DRIVER_IO));
682	<	#else
683	<	WriteMacInt32(XLM_TOC, (uint32)TOC); // TOC pointer of emulator
684	<	WriteMacInt32(XLM_ETHER_INIT, (uint32)InitStreamModule); // DLPI ethernet driver functions
685	<	WriteMacInt32(XLM_ETHER_TERM, (uint32)TerminateStreamModule);
686	<	WriteMacInt32(XLM_ETHER_OPEN, (uint32)ether_open);
687	<	WriteMacInt32(XLM_ETHER_CLOSE, (uint32)ether_close);
688	<	WriteMacInt32(XLM_ETHER_WPUT, (uint32)ether_wput);
689	<	WriteMacInt32(XLM_ETHER_RSRV, (uint32)ether_rsrv);
690	<	WriteMacInt32(XLM_VIDEO_DOIO, (uint32)VideoDoDriverIO);
755	>	WriteMacInt32(XLM_ZERO_PAGE, SheepMem::ZeroPage()); // Pointer to read-only page with all bits set to 0
756	>	#if !EMULATED_PPC
757	>	WriteMacInt32(XLM_TOC, (uint32)TOC); // TOC pointer of emulator
758		#endif
759	+	WriteMacInt32(XLM_ETHER_INIT, NativeFunction(NATIVE_ETHER_INIT)); // DLPI ethernet driver functions
760	+	WriteMacInt32(XLM_ETHER_TERM, NativeFunction(NATIVE_ETHER_TERM));
761	+	WriteMacInt32(XLM_ETHER_OPEN, NativeFunction(NATIVE_ETHER_OPEN));
762	+	WriteMacInt32(XLM_ETHER_CLOSE, NativeFunction(NATIVE_ETHER_CLOSE));
763	+	WriteMacInt32(XLM_ETHER_WPUT, NativeFunction(NATIVE_ETHER_WPUT));
764	+	WriteMacInt32(XLM_ETHER_RSRV, NativeFunction(NATIVE_ETHER_RSRV));
765	+	WriteMacInt32(XLM_VIDEO_DOIO, NativeFunction(NATIVE_VIDEO_DO_DRIVER_IO));
766		D(bug("Low Memory initialized\n"));
767
768		// Start 60Hz thread
#	Line 726 \| Line 800 \| int main(int argc, char argv)**
800		#endif
801
802		#if !EMULATED_PPC
803	<	// Install SIGSEGV handler
803	>	// Install SIGSEGV and SIGBUS handlers
804		sigemptyset(&sigsegv_action.sa_mask); // Block interrupts during SEGV handling
805		sigaddset(&sigsegv_action.sa_mask, SIGUSR2);
806	<	sigsegv_action.sa_handler = (__sighandler_t)sigsegv_handler;
807	<	sigsegv_action.sa_flags = SA_ONSTACK;
806	>	sigsegv_action.sa_sigaction = sigsegv_handler;
807	>	sigsegv_action.sa_flags = SA_ONSTACK \| SA_SIGINFO;
808	>	#ifdef HAVE_SIGNAL_SA_RESTORER
809		sigsegv_action.sa_restorer = NULL;
810	+	#endif
811		if (sigaction(SIGSEGV, &sigsegv_action, NULL) < 0) {
812		sprintf(str, GetString(STR_SIGSEGV_INSTALL_ERR), strerror(errno));
813		ErrorAlert(str);
814		goto quit;
815		}
816	+	if (sigaction(SIGBUS, &sigsegv_action, NULL) < 0) {
817	+	sprintf(str, GetString(STR_SIGSEGV_INSTALL_ERR), strerror(errno));
818	+	ErrorAlert(str);
819	+	goto quit;
820	+	}
821
822		// Install SIGILL handler
823		sigemptyset(&sigill_action.sa_mask); // Block interrupts during ILL handling
824		sigaddset(&sigill_action.sa_mask, SIGUSR2);
825	<	sigill_action.sa_handler = (__sighandler_t)sigill_handler;
826	<	sigill_action.sa_flags = SA_ONSTACK;
825	>	sigill_action.sa_sigaction = sigill_handler;
826	>	sigill_action.sa_flags = SA_ONSTACK \| SA_SIGINFO;
827	>	#ifdef HAVE_SIGNAL_SA_RESTORER
828		sigill_action.sa_restorer = NULL;
829	+	#endif
830		if (sigaction(SIGILL, &sigill_action, NULL) < 0) {
831		sprintf(str, GetString(STR_SIGILL_INSTALL_ERR), strerror(errno));
832		ErrorAlert(str);
#	Line 751 \| Line 834 \| int main(int argc, char argv)**
834		}
835		#endif
836
837	+	#if !EMULATED_PPC
838		// Install interrupt signal handler
839		sigemptyset(&sigusr2_action.sa_mask);
840	<	sigusr2_action.sa_handler = (__sighandler_t)sigusr2_handler;
841	<	sigusr2_action.sa_flags = 0;
842	<	#if !EMULATED_PPC
759	<	sigusr2_action.sa_flags = SA_ONSTACK \| SA_RESTART;
760	<	#endif
840	>	sigusr2_action.sa_sigaction = sigusr2_handler;
841	>	sigusr2_action.sa_flags = SA_ONSTACK \| SA_RESTART \| SA_SIGINFO;
842	>	#ifdef HAVE_SIGNAL_SA_RESTORER
843		sigusr2_action.sa_restorer = NULL;
844	+	#endif
845		if (sigaction(SIGUSR2, &sigusr2_action, NULL) < 0) {
846		sprintf(str, GetString(STR_SIGUSR2_INSTALL_ERR), strerror(errno));
847		ErrorAlert(str);
848		goto quit;
849		}
850	+	#endif
851
852		// Get my thread ID and execute MacOS thread function
853		emul_thread = pthread_self();
#	Line 800 \| Line 884 \| static void Quit(void)
884		}
885
886		#if !EMULATED_PPC
887	<	// Uninstall SIGSEGV handler
887	>	// Uninstall SIGSEGV and SIGBUS handlers
888		sigemptyset(&sigsegv_action.sa_mask);
889		sigsegv_action.sa_handler = SIG_DFL;
890		sigsegv_action.sa_flags = 0;
891		sigaction(SIGSEGV, &sigsegv_action, NULL);
892	+	sigaction(SIGBUS, &sigsegv_action, NULL);
893
894		// Uninstall SIGILL handler
895		sigemptyset(&sigill_action.sa_mask);
#	Line 831 \| Line 916 \| static void Quit(void)
916		// Exit audio
917		AudioExit();
918
919	+	// Exit ADB
920	+	ADBExit();
921	+
922		// Exit video
923		VideoExit();
924
#	Line 843 \| Line 931 \| static void Quit(void)
931		DiskExit();
932		SonyExit();
933
934	+	// Delete thunks
935	+	ThunksExit();
936	+
937	+	// Delete SheepShaver globals
938	+	SheepMem::Exit();
939	+
940		// Delete RAM area
941		if (ram_area_mapped)
942		vm_release((char *)RAM_BASE, RAMSize);
#	Line 954 \| Line 1048 \| void Execute68kTrap(uint16 trap, M68kReg
1048		uint16 proc[2] = {trap, M68K_RTS};
1049		Execute68k((uint32)proc, r);
1050		}
957	–
958	–
959	–	/*
960	–	* Execute PPC code from EMUL_OP routine (real mode switch)
961	–	*/
962	–
963	–	void ExecutePPC(void (*func)())
964	–	{
965	–	uint32 tvect[2] = {(uint32)func, 0}; // Fake TVECT
966	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
967	–	M68kRegisters r;
968	–	Execute68k((uint32)&desc, &r);
969	–	}
1051		#endif
1052
1053
#	Line 1045 \| Line 1126 \| *void MakeExecutable(int dummy, void sta**
1126
1127		void PatchAfterStartup(void)
1128		{
1048	–	#if EMULATED_PPC
1129		ExecuteNative(NATIVE_VIDEO_INSTALL_ACCEL);
1050	–	#else
1051	–	ExecutePPC(VideoInstallAccel);
1052	–	#endif
1130		InstallExtFS();
1131		}
1132
#	Line 1094 \| Line 1171 \| *static void tick_func(void arg)*
1171		if (emul_thread_fatal) {
1172
1173		// Yes, dump registers
1174	<	pt_regs r = (pt_regs )&sigsegv_regs;
1174	>	sigregs *r = &sigsegv_regs;
1175		char str[256];
1176	<	sprintf(str, "SIGSEGV\n"
1176	>	if (crash_reason == NULL)
1177	>	crash_reason = "SIGSEGV";
1178	>	sprintf(str, "%s\n"
1179		" pc %08lx lr %08lx ctr %08lx msr %08lx\n"
1180		" xer %08lx cr %08lx \n"
1181		" r0 %08lx r1 %08lx r2 %08lx r3 %08lx\n"
#	Line 1107 \| Line 1186 \| *static void tick_func(void arg)*
1186		" r20 %08lx r21 %08lx r22 %08lx r23 %08lx\n"
1187		" r24 %08lx r25 %08lx r26 %08lx r27 %08lx\n"
1188		" r28 %08lx r29 %08lx r30 %08lx r31 %08lx\n",
1189	+	crash_reason,
1190		r->nip, r->link, r->ctr, r->msr,
1191		r->xer, r->ccr,
1192		r->gpr[0], r->gpr[1], r->gpr[2], r->gpr[3],
#	Line 1152 \| Line 1232 \| *static void tick_func(void arg)*
1232
1233		void Set_pthread_attr(pthread_attr_t *attr, int priority)
1234		{
1235	<	// nothing to do
1235	>	#ifdef HAVE_PTHREADS
1236	>	pthread_attr_init(attr);
1237	>	#if defined(_POSIX_THREAD_PRIORITY_SCHEDULING)
1238	>	// Some of these only work for superuser
1239	>	if (geteuid() == 0) {
1240	>	pthread_attr_setinheritsched(attr, PTHREAD_EXPLICIT_SCHED);
1241	>	pthread_attr_setschedpolicy(attr, SCHED_FIFO);
1242	>	struct sched_param fifo_param;
1243	>	fifo_param.sched_priority = ((sched_get_priority_min(SCHED_FIFO) +
1244	>	sched_get_priority_max(SCHED_FIFO)) / 2 +
1245	>	priority);
1246	>	pthread_attr_setschedparam(attr, &fifo_param);
1247	>	}
1248	>	if (pthread_attr_setscope(attr, PTHREAD_SCOPE_SYSTEM) != 0) {
1249	>	#ifdef PTHREAD_SCOPE_BOUND_NP
1250	>	// If system scope is not available (eg. we're not running
1251	>	// with CAP_SCHED_MGT capability on an SGI box), try bound
1252	>	// scope. It exposes pthread scheduling to the kernel,
1253	>	// without setting realtime priority.
1254	>	pthread_attr_setscope(attr, PTHREAD_SCOPE_BOUND_NP);
1255	>	#endif
1256	>	}
1257	>	#endif
1258	>	#endif
1259		}
1260
1261
#	Line 1298 \| Line 1401 \| static void sigusr2_handler(int sig)
1401		#endif
1402		}
1403		#else
1404	<	static void sigusr2_handler(int sig, sigcontext_struct *sc)
1404	>	static void sigusr2_handler(int sig, siginfo_t sip, void scp)
1405		{
1406	<	pt_regs *r = sc->regs;
1406	>	machine_regs *r = MACHINE_REGISTERS(scp);
1407
1408		// Do nothing if interrupts are disabled
1409		if ((int32 )XLM_IRQ_NEST > 0)
#	Line 1314 \| Line 1417 \| static void sigusr2_handler(int sig, sig
1417		case MODE_68K:
1418		// 68k emulator active, trigger 68k interrupt level 1
1419		WriteMacInt16(ntohl(kernel_data->v[0x67c >> 2]), 1);
1420	<	r->ccr \|= ntohl(kernel_data->v[0x674 >> 2]);
1420	>	r->cr() \|= ntohl(kernel_data->v[0x674 >> 2]);
1421		break;
1422
1423		#if INTERRUPTS_IN_NATIVE_MODE
1424		case MODE_NATIVE:
1425		// 68k emulator inactive, in nanokernel?
1426	<	if (r->gpr[1] != KernelDataAddr) {
1426	>	if (r->gpr(1) != KernelDataAddr) {
1427		// Prepare for 68k interrupt level 1
1428		WriteMacInt16(ntohl(kernel_data->v[0x67c >> 2]), 1);
1429		WriteMacInt32(ntohl(kernel_data->v[0x658 >> 2]) + 0xdc, ReadMacInt32(ntohl(kernel_data->v[0x658 >> 2]) + 0xdc) \| ntohl(kernel_data->v[0x674 >> 2]));
#	Line 1367 \| Line 1470 \| static void sigusr2_handler(int sig, sig
1470		if (InterruptFlags & INTFLAG_VIA) {
1471		ClearInterruptFlag(INTFLAG_VIA);
1472		ADBInterrupt();
1473	<	ExecutePPC(VideoVBL);
1473	>	ExecuteNative(NATIVE_VIDEO_VBL);
1474		}
1475		}
1476		#endif
#	Line 1389 \| Line 1492 \| static void sigusr2_handler(int sig, sig
1492		*/
1493
1494		#if !EMULATED_PPC
1495	<	static void sigsegv_handler(int sig, sigcontext_struct *sc)
1495	>	static void sigsegv_handler(int sig, siginfo_t sip, void scp)
1496		{
1497	<	pt_regs *r = sc->regs;
1497	>	machine_regs *r = MACHINE_REGISTERS(scp);
1498
1499		// Get effective address
1500	<	uint32 addr = r->dar;
1500	>	uint32 addr = r->dar();
1501
1502		#if ENABLE_VOSF
1503		// Handle screen fault.
1504		extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction);
1505	<	if (Screen_fault_handler((sigsegv_address_t)addr, (sigsegv_address_t)r->nip))
1505	>	if (Screen_fault_handler((sigsegv_address_t)addr, (sigsegv_address_t)r->pc()))
1506		return;
1507		#endif
1508
1509		num_segv++;
1510
1511		// Fault in Mac ROM or RAM?
1512	<	bool mac_fault = (r->nip >= ROM_BASE) && (r->nip < (ROM_BASE + ROM_AREA_SIZE)) \|\| (r->nip >= RAMBase) && (r->nip < (RAMBase + RAMSize));
1512	>	bool mac_fault = (r->pc() >= ROM_BASE) && (r->pc() < (ROM_BASE + ROM_AREA_SIZE)) \|\| (r->pc() >= RAMBase) && (r->pc() < (RAMBase + RAMSize));
1513		if (mac_fault) {
1514
1515		// "VM settings" during MacOS 8 installation
1516	<	if (r->nip == ROM_BASE + 0x488160 && r->gpr[20] == 0xf8000000) {
1517	<	r->nip += 4;
1518	<	r->gpr[8] = 0;
1516	>	if (r->pc() == ROM_BASE + 0x488160 && r->gpr(20) == 0xf8000000) {
1517	>	r->pc() += 4;
1518	>	r->gpr(8) = 0;
1519		return;
1520
1521		// MacOS 8.5 installation
1522	<	} else if (r->nip == ROM_BASE + 0x488140 && r->gpr[16] == 0xf8000000) {
1523	<	r->nip += 4;
1524	<	r->gpr[8] = 0;
1522	>	} else if (r->pc() == ROM_BASE + 0x488140 && r->gpr(16) == 0xf8000000) {
1523	>	r->pc() += 4;
1524	>	r->gpr(8) = 0;
1525		return;
1526
1527		// MacOS 8 serial drivers on startup
1528	<	} else if (r->nip == ROM_BASE + 0x48e080 && (r->gpr[8] == 0xf3012002 \|\| r->gpr[8] == 0xf3012000)) {
1529	<	r->nip += 4;
1530	<	r->gpr[8] = 0;
1528	>	} else if (r->pc() == ROM_BASE + 0x48e080 && (r->gpr(8) == 0xf3012002 \|\| r->gpr(8) == 0xf3012000)) {
1529	>	r->pc() += 4;
1530	>	r->gpr(8) = 0;
1531		return;
1532
1533		// MacOS 8.1 serial drivers on startup
1534	<	} else if (r->nip == ROM_BASE + 0x48c5e0 && (r->gpr[20] == 0xf3012002 \|\| r->gpr[20] == 0xf3012000)) {
1535	<	r->nip += 4;
1534	>	} else if (r->pc() == ROM_BASE + 0x48c5e0 && (r->gpr(20) == 0xf3012002 \|\| r->gpr(20) == 0xf3012000)) {
1535	>	r->pc() += 4;
1536		return;
1537	<	} else if (r->nip == ROM_BASE + 0x4a10a0 && (r->gpr[20] == 0xf3012002 \|\| r->gpr[20] == 0xf3012000)) {
1538	<	r->nip += 4;
1537	>	} else if (r->pc() == ROM_BASE + 0x4a10a0 && (r->gpr(20) == 0xf3012002 \|\| r->gpr(20) == 0xf3012000)) {
1538	>	r->pc() += 4;
1539		return;
1540		}
1541
1542		// Get opcode and divide into fields
1543	<	uint32 opcode = ((uint32 )r->nip);
1543	>	uint32 opcode = ((uint32 )r->pc());
1544		uint32 primop = opcode >> 26;
1545		uint32 exop = (opcode >> 1) & 0x3ff;
1546		uint32 ra = (opcode >> 16) & 0x1f;
#	Line 1526 \| Line 1629 \| static void sigsegv_handler(int sig, sig
1629		transfer_type = TYPE_STORE; transfer_size = SIZE_HALFWORD; addr_mode = MODE_NORM; break;
1630		case 45: // sthu
1631		transfer_type = TYPE_STORE; transfer_size = SIZE_HALFWORD; addr_mode = MODE_U; break;
1632	+	#if EMULATE_UNALIGNED_LOADSTORE_MULTIPLE
1633	+	case 46: // lmw
1634	+	if ((addr % 4) != 0) {
1635	+	uint32 ea = addr;
1636	+	D(bug("WARNING: unaligned lmw to EA=%08x from IP=%08x\n", ea, r->pc()));
1637	+	for (int i = rd; i <= 31; i++) {
1638	+	r->gpr(i) = ReadMacInt32(ea);
1639	+	ea += 4;
1640	+	}
1641	+	r->pc() += 4;
1642	+	goto rti;
1643	+	}
1644	+	break;
1645	+	case 47: // stmw
1646	+	if ((addr % 4) != 0) {
1647	+	uint32 ea = addr;
1648	+	D(bug("WARNING: unaligned stmw to EA=%08x from IP=%08x\n", ea, r->pc()));
1649	+	for (int i = rd; i <= 31; i++) {
1650	+	WriteMacInt32(ea, r->gpr(i));
1651	+	ea += 4;
1652	+	}
1653	+	r->pc() += 4;
1654	+	goto rti;
1655	+	}
1656	+	break;
1657	+	#endif
1658		}
1659
1660		// Ignore ROM writes
1661		if (transfer_type == TYPE_STORE && addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) {
1662	<	// D(bug("WARNING: %s write access to ROM at %08lx, pc %08lx\n", transfer_size == SIZE_BYTE ? "Byte" : transfer_size == SIZE_HALFWORD ? "Halfword" : "Word", addr, r->nip));
1662	>	// D(bug("WARNING: %s write access to ROM at %08lx, pc %08lx\n", transfer_size == SIZE_BYTE ? "Byte" : transfer_size == SIZE_HALFWORD ? "Halfword" : "Word", addr, r->pc()));
1663		if (addr_mode == MODE_U \|\| addr_mode == MODE_UX)
1664	<	r->gpr[ra] = addr;
1665	<	r->nip += 4;
1664	>	r->gpr(ra) = addr;
1665	>	r->pc() += 4;
1666		goto rti;
1667		}
1668
1669		// Ignore illegal memory accesses?
1670		if (PrefsFindBool("ignoresegv")) {
1671		if (addr_mode == MODE_U \|\| addr_mode == MODE_UX)
1672	<	r->gpr[ra] = addr;
1672	>	r->gpr(ra) = addr;
1673		if (transfer_type == TYPE_LOAD)
1674	<	r->gpr[rd] = 0;
1675	<	r->nip += 4;
1674	>	r->gpr(rd) = 0;
1675	>	r->pc() += 4;
1676		goto rti;
1677		}
1678
#	Line 1551 \| Line 1680 \| static void sigsegv_handler(int sig, sig
1680		if (!PrefsFindBool("nogui")) {
1681		char str[256];
1682		if (transfer_type == TYPE_LOAD \|\| transfer_type == TYPE_STORE)
1683	<	sprintf(str, GetString(STR_MEM_ACCESS_ERR), transfer_size == SIZE_BYTE ? "byte" : transfer_size == SIZE_HALFWORD ? "halfword" : "word", transfer_type == TYPE_LOAD ? GetString(STR_MEM_ACCESS_READ) : GetString(STR_MEM_ACCESS_WRITE), addr, r->nip, r->gpr[24], r->gpr[1]);
1683	>	sprintf(str, GetString(STR_MEM_ACCESS_ERR), transfer_size == SIZE_BYTE ? "byte" : transfer_size == SIZE_HALFWORD ? "halfword" : "word", transfer_type == TYPE_LOAD ? GetString(STR_MEM_ACCESS_READ) : GetString(STR_MEM_ACCESS_WRITE), addr, r->pc(), r->gpr(24), r->gpr(1));
1684		else
1685	<	sprintf(str, GetString(STR_UNKNOWN_SEGV_ERR), r->nip, r->gpr[24], r->gpr[1], opcode);
1685	>	sprintf(str, GetString(STR_UNKNOWN_SEGV_ERR), r->pc(), r->gpr(24), r->gpr(1), opcode);
1686		ErrorAlert(str);
1687		QuitEmulator();
1688		return;
#	Line 1561 \| Line 1690 \| static void sigsegv_handler(int sig, sig
1690		}
1691
1692		// For all other errors, jump into debugger (sort of...)
1693	+	crash_reason = (sig == SIGBUS) ? "SIGBUS" : "SIGSEGV";
1694		if (!ready_for_signals) {
1695	<	printf("SIGSEGV\n");
1696	<	printf(" sigcontext %p, pt_regs %p\n", sc, r);
1695	>	printf("%s\n");
1696	>	printf(" sigcontext %p, machine_regs %p\n", scp, r);
1697		printf(
1698		" pc %08lx lr %08lx ctr %08lx msr %08lx\n"
1699		" xer %08lx cr %08lx \n"
#	Line 1575 \| Line 1705 \| static void sigsegv_handler(int sig, sig
1705		" r20 %08lx r21 %08lx r22 %08lx r23 %08lx\n"
1706		" r24 %08lx r25 %08lx r26 %08lx r27 %08lx\n"
1707		" r28 %08lx r29 %08lx r30 %08lx r31 %08lx\n",
1708	<	r->nip, r->link, r->ctr, r->msr,
1709	<	r->xer, r->ccr,
1710	<	r->gpr[0], r->gpr[1], r->gpr[2], r->gpr[3],
1711	<	r->gpr[4], r->gpr[5], r->gpr[6], r->gpr[7],
1712	<	r->gpr[8], r->gpr[9], r->gpr[10], r->gpr[11],
1713	<	r->gpr[12], r->gpr[13], r->gpr[14], r->gpr[15],
1714	<	r->gpr[16], r->gpr[17], r->gpr[18], r->gpr[19],
1715	<	r->gpr[20], r->gpr[21], r->gpr[22], r->gpr[23],
1716	<	r->gpr[24], r->gpr[25], r->gpr[26], r->gpr[27],
1717	<	r->gpr[28], r->gpr[29], r->gpr[30], r->gpr[31]);
1708	>	crash_reason,
1709	>	r->pc(), r->lr(), r->ctr(), r->msr(),
1710	>	r->xer(), r->cr(),
1711	>	r->gpr(0), r->gpr(1), r->gpr(2), r->gpr(3),
1712	>	r->gpr(4), r->gpr(5), r->gpr(6), r->gpr(7),
1713	>	r->gpr(8), r->gpr(9), r->gpr(10), r->gpr(11),
1714	>	r->gpr(12), r->gpr(13), r->gpr(14), r->gpr(15),
1715	>	r->gpr(16), r->gpr(17), r->gpr(18), r->gpr(19),
1716	>	r->gpr(20), r->gpr(21), r->gpr(22), r->gpr(23),
1717	>	r->gpr(24), r->gpr(25), r->gpr(26), r->gpr(27),
1718	>	r->gpr(28), r->gpr(29), r->gpr(30), r->gpr(31));
1719		exit(1);
1720		QuitEmulator();
1721		return;
1722		} else {
1723		// We crashed. Save registers, tell tick thread and loop forever
1724	<	sigsegv_regs = (sigregs )r;
1724	>	build_sigregs(&sigsegv_regs, r);
1725		emul_thread_fatal = true;
1726		for (;;) ;
1727		}
#	Line 1602 \| Line 1733 \| rti:;
1733		* SIGILL handler
1734		*/
1735
1736	<	static void sigill_handler(int sig, sigcontext_struct *sc)
1736	>	static void sigill_handler(int sig, siginfo_t sip, void scp)
1737		{
1738	<	pt_regs *r = sc->regs;
1738	>	machine_regs *r = MACHINE_REGISTERS(scp);
1739		char str[256];
1740
1741		// Fault in Mac ROM or RAM?
1742	<	bool mac_fault = (r->nip >= ROM_BASE) && (r->nip < (ROM_BASE + ROM_AREA_SIZE)) \|\| (r->nip >= RAMBase) && (r->nip < (RAMBase + RAMSize));
1742	>	bool mac_fault = (r->pc() >= ROM_BASE) && (r->pc() < (ROM_BASE + ROM_AREA_SIZE)) \|\| (r->pc() >= RAMBase) && (r->pc() < (RAMBase + RAMSize));
1743		if (mac_fault) {
1744
1745		// Get opcode and divide into fields
1746	<	uint32 opcode = ((uint32 )r->nip);
1746	>	uint32 opcode = ((uint32 )r->pc());
1747		uint32 primop = opcode >> 26;
1748		uint32 exop = (opcode >> 1) & 0x3ff;
1749		uint32 ra = (opcode >> 16) & 0x1f;
#	Line 1623 \| Line 1754 \| static void sigill_handler(int sig, sigc
1754		switch (primop) {
1755		case 9: // POWER instructions
1756		case 22:
1757	<	power_inst: sprintf(str, GetString(STR_POWER_INSTRUCTION_ERR), r->nip, r->gpr[1], opcode);
1757	>	power_inst: sprintf(str, GetString(STR_POWER_INSTRUCTION_ERR), r->pc(), r->gpr(1), opcode);
1758		ErrorAlert(str);
1759		QuitEmulator();
1760		return;
#	Line 1631 \| Line 1762 \| power_inst: sprintf(str, GetString(STR_
1762		case 31:
1763		switch (exop) {
1764		case 83: // mfmsr
1765	<	r->gpr[rd] = 0xf072;
1766	<	r->nip += 4;
1765	>	r->gpr(rd) = 0xf072;
1766	>	r->pc() += 4;
1767		goto rti;
1768
1769		case 210: // mtsr
1770		case 242: // mtsrin
1771		case 306: // tlbie
1772	<	r->nip += 4;
1772	>	r->pc() += 4;
1773		goto rti;
1774
1775		case 339: { // mfspr
#	Line 1654 \| Line 1785 \| power_inst: sprintf(str, GetString(STR_
1785		case 957: // PMC3
1786		case 958: // PMC4
1787		case 959: // SDA
1788	<	r->nip += 4;
1788	>	r->pc() += 4;
1789		goto rti;
1790		case 25: // SDR1
1791	<	r->gpr[rd] = 0xdead001f;
1792	<	r->nip += 4;
1791	>	r->gpr(rd) = 0xdead001f;
1792	>	r->pc() += 4;
1793		goto rti;
1794		case 287: // PVR
1795	<	r->gpr[rd] = PVR;
1796	<	r->nip += 4;
1795	>	r->gpr(rd) = PVR;
1796	>	r->pc() += 4;
1797		goto rti;
1798		}
1799		break;
#	Line 1698 \| Line 1829 \| power_inst: sprintf(str, GetString(STR_
1829		case 957: // PMC3
1830		case 958: // PMC4
1831		case 959: // SDA
1832	<	r->nip += 4;
1832	>	r->pc() += 4;
1833		goto rti;
1834		}
1835		break;
#	Line 1717 \| Line 1848 \| power_inst: sprintf(str, GetString(STR_
1848
1849		// In GUI mode, show error alert
1850		if (!PrefsFindBool("nogui")) {
1851	<	sprintf(str, GetString(STR_UNKNOWN_SEGV_ERR), r->nip, r->gpr[24], r->gpr[1], opcode);
1851	>	sprintf(str, GetString(STR_UNKNOWN_SEGV_ERR), r->pc(), r->gpr(24), r->gpr(1), opcode);
1852		ErrorAlert(str);
1853		QuitEmulator();
1854		return;
#	Line 1725 \| Line 1856 \| power_inst: sprintf(str, GetString(STR_
1856		}
1857
1858		// For all other errors, jump into debugger (sort of...)
1859	+	crash_reason = "SIGILL";
1860		if (!ready_for_signals) {
1861	<	printf("SIGILL\n");
1862	<	printf(" sigcontext %p, pt_regs %p\n", sc, r);
1861	>	printf("%s\n");
1862	>	printf(" sigcontext %p, machine_regs %p\n", scp, r);
1863		printf(
1864		" pc %08lx lr %08lx ctr %08lx msr %08lx\n"
1865		" xer %08lx cr %08lx \n"
#	Line 1739 \| Line 1871 \| power_inst: sprintf(str, GetString(STR_
1871		" r20 %08lx r21 %08lx r22 %08lx r23 %08lx\n"
1872		" r24 %08lx r25 %08lx r26 %08lx r27 %08lx\n"
1873		" r28 %08lx r29 %08lx r30 %08lx r31 %08lx\n",
1874	<	r->nip, r->link, r->ctr, r->msr,
1875	<	r->xer, r->ccr,
1876	<	r->gpr[0], r->gpr[1], r->gpr[2], r->gpr[3],
1877	<	r->gpr[4], r->gpr[5], r->gpr[6], r->gpr[7],
1878	<	r->gpr[8], r->gpr[9], r->gpr[10], r->gpr[11],
1879	<	r->gpr[12], r->gpr[13], r->gpr[14], r->gpr[15],
1880	<	r->gpr[16], r->gpr[17], r->gpr[18], r->gpr[19],
1881	<	r->gpr[20], r->gpr[21], r->gpr[22], r->gpr[23],
1882	<	r->gpr[24], r->gpr[25], r->gpr[26], r->gpr[27],
1883	<	r->gpr[28], r->gpr[29], r->gpr[30], r->gpr[31]);
1874	>	crash_reason,
1875	>	r->pc(), r->lr(), r->ctr(), r->msr(),
1876	>	r->xer(), r->cr(),
1877	>	r->gpr(0), r->gpr(1), r->gpr(2), r->gpr(3),
1878	>	r->gpr(4), r->gpr(5), r->gpr(6), r->gpr(7),
1879	>	r->gpr(8), r->gpr(9), r->gpr(10), r->gpr(11),
1880	>	r->gpr(12), r->gpr(13), r->gpr(14), r->gpr(15),
1881	>	r->gpr(16), r->gpr(17), r->gpr(18), r->gpr(19),
1882	>	r->gpr(20), r->gpr(21), r->gpr(22), r->gpr(23),
1883	>	r->gpr(24), r->gpr(25), r->gpr(26), r->gpr(27),
1884	>	r->gpr(28), r->gpr(29), r->gpr(30), r->gpr(31));
1885		exit(1);
1886		QuitEmulator();
1887		return;
1888		} else {
1889		// We crashed. Save registers, tell tick thread and loop forever
1890	<	sigsegv_regs = (sigregs )r;
1890	>	build_sigregs(&sigsegv_regs, r);
1891		emul_thread_fatal = true;
1892		for (;;) ;
1893		}
#	Line 1764 \| Line 1897 \| rti:;
1897
1898
1899		/*
1900	+	* Helpers to share 32-bit addressable data with MacOS
1901	+	*/
1902	+
1903	+	bool SheepMem::Init(void)
1904	+	{
1905	+	const int page_size = getpagesize();
1906	+
1907	+	// Allocate SheepShaver globals
1908	+	if (vm_acquire_fixed((char *)base, size) < 0)
1909	+	return false;
1910	+
1911	+	// Allocate page with all bits set to 0
1912	+	zero_page = base + size;
1913	+	if (vm_acquire_fixed((char *)zero_page, page_size) < 0)
1914	+	return false;
1915	+	memset((char *)zero_page, 0, page_size);
1916	+	if (vm_protect((char *)zero_page, page_size, VM_PAGE_READ) < 0)
1917	+	return false;
1918	+
1919	+	#if EMULATED_PPC
1920	+	// Allocate alternate stack for PowerPC interrupt routine
1921	+	sig_stack = zero_page + page_size;
1922	+	if (vm_acquire_fixed((char *)sig_stack, SIG_STACK_SIZE) < 0)
1923	+	return false;
1924	+	#endif
1925	+
1926	+	top = base + size;
1927	+	return true;
1928	+	}
1929	+
1930	+	void SheepMem::Exit(void)
1931	+	{
1932	+	if (top) {
1933	+	const int page_size = getpagesize();
1934	+
1935	+	// Delete SheepShaver globals
1936	+	vm_release((void *)base, size);
1937	+
1938	+	// Delete zero page
1939	+	vm_release((void *)zero_page, page_size);
1940	+
1941	+	#if EMULATED_PPC
1942	+	// Delete alternate stack for PowerPC interrupt routine
1943	+	vm_release((void *)sig_stack, SIG_STACK_SIZE);
1944	+	#endif
1945	+	}
1946	+	}
1947	+
1948	+
1949	+	/*
1950		* Display alert
1951		*/
1952

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Comparing SheepShaver/src/Unix/main_unix.cpp (file contents): Revision 1.13 by gbeauche, 2003-11-03T21:28:25Z vs. Revision 1.29 by gbeauche, 2004-01-31T11:10:49Z

Diff Legend

Comparing SheepShaver/src/Unix/main_unix.cpp (file contents):
Revision 1.13 by gbeauche, 2003-11-03T21:28:25Z vs.
Revision 1.29 by gbeauche, 2004-01-31T11:10:49Z