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root/cebix/SheepShaver/src/Unix/sysdeps.h

Comparing SheepShaver/src/Unix/sysdeps.h (file contents):
Revision 1.14 by gbeauche, 2003-11-11T11:32:24Z vs.
Revision 1.55 by gbeauche, 2007-01-17T07:05:19Z

#	Line 1 | Line 1
1		/*
2		*  sysdeps.h - System dependent definitions for Linux
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 41 | Line 41
41		#include <assert.h>
42		#include <stdio.h>
43		#include <stdlib.h>
44	+	#include <stddef.h>
45		#include <string.h>
46		#include <signal.h>
47
48	+	#ifdef HAVE_PTHREADS
49	+	# include <pthread.h>
50	+	#endif
51	+
52		#ifdef HAVE_FCNTL_H
53		# include <fcntl.h>
54		#endif
#	Line 59 | Line 64
64		# endif
65		#endif
66
67	+	// Fix offsetof() on FreeBSD and GCC >= 3.4
68	+	#if defined(__FreeBSD__) && defined(__cplusplus)
69	+	#undef offsetof
70	+	/* The cast to "char &" below avoids problems with user-defined
71	+	"operator &", which can appear in a POD type.  */
72	+	#define offsetof(TYPE, MEMBER)                          \
73	+	(__offsetof__ (reinterpret_cast <size_t>              \
74	+	(&reinterpret_cast <char &>            \
75	+	(static_cast<TYPE *> (0)->MEMBER))))
76	+	#endif
77	+
78		// Define for external components
79		#define SHEEPSHAVER 1
80
81	<	// Mac and host address space are the same
81	>	// Always use Real Addressing mode on native architectures
82	>	// Otherwise, use Direct Addressing mode if NATMEM_OFFSET is set
83	>	#if !defined(EMULATED_PPC)
84	>	#define REAL_ADDRESSING 1
85	>	#include "ppc_asm.tmpl"
86	>	#elif defined(NATMEM_OFFSET)
87	>	#define DIRECT_ADDRESSING 1
88	>	#else
89		#define REAL_ADDRESSING 1
90	+	#endif
91	+
92	+	// Always use the complete non-stubs Ethernet driver
93	+	#define USE_ETHER_FULL_DRIVER 1
94
95		#define POWERPC_ROM 1
96
97		#if EMULATED_PPC
71	–	// Handle interrupts asynchronously?
72	–	#define ASYNC_IRQ 0
98		// Mac ROM is write protected when banked memory is used
99		#if REAL_ADDRESSING || DIRECT_ADDRESSING
100		# define ROM_IS_WRITE_PROTECTED 0
#	Line 78 | Line 103
103		# define ROM_IS_WRITE_PROTECTED 1
104		#endif
105		// Configure PowerPC emulator
106	<	#define PPC_CHECK_INTERRUPTS (ASYNC_IRQ ? 0 : 1)
106	>	#define PPC_REENTRANT_JIT 1
107	>	#define PPC_CHECK_INTERRUPTS 1
108		#define PPC_DECODE_CACHE 1
109		#define PPC_FLIGHT_RECORDER 1
110	+	#define PPC_PROFILE_COMPILE_TIME 0
111	+	#define PPC_PROFILE_GENERIC_CALLS 1
112	+	#define KPX_MAX_CPUS 1
113	+	#if ENABLE_DYNGEN
114	+	#define PPC_ENABLE_JIT 1
115	+	#endif
116	+	#if defined(__i386__) || defined(__x86_64__)
117	+	#define DYNGEN_ASM_OPTS 1
118	+	#endif
119		#else
120		// Mac ROM is write protected
121		#define ROM_IS_WRITE_PROTECTED 1
#	Line 131 | Line 166 | typedef int64 intptr;
166		#error "Unsupported size of pointer"
167		#endif
168
169	<	// Helper functions to byteswap data
169	>	// Define if the host processor supports fast unaligned load/stores
170	>	#if defined __i386__ || defined __x86_64__
171	>	#define UNALIGNED_PROFITABLE 1
172	>	#endif
173	>
174	>
175	>	/**
176	>	*              Helper functions to byteswap data
177	>	**/
178	>
179	>	#if defined(__GNUC__)
180	>	#if defined(__x86_64__) || defined(__i386__)
181	>	// Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h>
182	>	#define opt_bswap_32 do_opt_bswap_32
183	>	static inline uint32 do_opt_bswap_32(uint32 x)
184	>	{
185	>	uint32 v;
186	>	__asm__ __volatile__ ("bswap %0" : "=r" (v) : "0" (x));
187	>	return v;
188	>	}
189	>	#endif
190	>	#endif
191	>
192		#ifdef HAVE_BYTESWAP_H
193		#include <byteswap.h>
194		#endif
195
196	+	#ifdef  opt_bswap_16
197	+	#undef  bswap_16
198	+	#define bswap_16 opt_bswap_16
199	+	#endif
200		#ifndef bswap_16
201		#define bswap_16 generic_bswap_16
202		#endif
#	Line 145 | Line 206 | static inline uint16 generic_bswap_16(ui
206		return ((x & 0xff) << 8) | ((x >> 8) & 0xff);
207		}
208
209	+	#ifdef  opt_bswap_32
210	+	#undef  bswap_32
211	+	#define bswap_32 opt_bswap_32
212	+	#endif
213		#ifndef bswap_32
214		#define bswap_32 generic_bswap_32
215		#endif
#	Line 157 | Line 222 | static inline uint32 generic_bswap_32(ui
222		((x & 0x000000ff) << 24) );
223		}
224
225	+	#if defined(__i386__)
226	+	#define opt_bswap_64 do_opt_bswap_64
227	+	static inline uint64 do_opt_bswap_64(uint64 x)
228	+	{
229	+	return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32));
230	+	}
231	+	#endif
232	+
233	+	#ifdef  opt_bswap_64
234	+	#undef  bswap_64
235	+	#define bswap_64 opt_bswap_64
236	+	#endif
237		#ifndef bswap_64
238		#define bswap_64 generic_bswap_64
239		#endif
#	Line 186 | Line 263 | static inline uint64 tswap64(uint64 x) {
263		// spin locks
264		#ifdef __GNUC__
265
266	<	#ifdef __powerpc__
266	>	#if defined(__powerpc__) || defined(__ppc__)
267		#define HAVE_TEST_AND_SET 1
268	<	static inline int testandset(int *p)
268	>	static inline int testandset(volatile int *p)
269		{
270		int ret;
271	<	__asm__ __volatile__("0:    lwarx %0,0,%1 ;"
272	<	"      xor. %0,%3,%0;"
273	<	"      bne 1f;"
274	<	"      stwcx. %2,0,%1;"
275	<	"      bne- 0b;"
271	>	__asm__ __volatile__("0:    lwarx       %0,0,%1\n"
272	>	"      xor.    %0,%3,%0\n"
273	>	"      bne             1f\n"
274	>	"      stwcx.  %2,0,%1\n"
275	>	"      bne-    0b\n"
276		"1:    "
277		: "=&r" (ret)
278		: "r" (p), "r" (1), "r" (0)
#	Line 204 | Line 281 | static inline int testandset(int *p)
281		}
282		#endif
283
284	<	#ifdef __i386__
284	>	#if defined(__i386__) || defined(__x86_64__)
285		#define HAVE_TEST_AND_SET 1
286	<	static inline int testandset(int *p)
286	>	static inline int testandset(volatile int *p)
287		{
288	<	char ret;
289	<	long int readval;
290	<
291	<	__asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0"
292	<	: "=q" (ret), "=m" (*p), "=a" (readval)
216	<	: "r" (1), "m" (*p), "a" (0)
288	>	long int ret;
289	>	/* Note: the "xchg" instruction does not need a "lock" prefix */
290	>	__asm__ __volatile__("xchgl %k0, %1"
291	>	: "=r" (ret), "=m" (*p)
292	>	: "0" (1), "m" (*p)
293		: "memory");
294		return ret;
295		}
#	Line 221 | Line 297 | static inline int testandset(int *p)
297
298		#ifdef __s390__
299		#define HAVE_TEST_AND_SET 1
300	<	static inline int testandset(int *p)
300	>	static inline int testandset(volatile int *p)
301		{
302		int ret;
303
#	Line 236 | Line 312 | static inline int testandset(int *p)
312
313		#ifdef __alpha__
314		#define HAVE_TEST_AND_SET 1
315	<	static inline int testandset(int *p)
315	>	static inline int testandset(volatile int *p)
316		{
317		int ret;
318		unsigned long one;
#	Line 256 | Line 332 | static inline int testandset(int *p)
332
333		#ifdef __sparc__
334		#define HAVE_TEST_AND_SET 1
335	<	static inline int testandset(int *p)
335	>	static inline int testandset(volatile int *p)
336		{
337		int ret;
338
#	Line 271 | Line 347 | static inline int testandset(int *p)
347
348		#ifdef __arm__
349		#define HAVE_TEST_AND_SET 1
350	<	static inline int testandset(int *p)
350	>	static inline int testandset(volatile int *p)
351		{
352		register unsigned int ret;
353		__asm__ __volatile__("swp %0, %1, [%2]"
#	Line 284 | Line 360 | static inline int testandset(int *p)
360
361		#endif /* __GNUC__ */
362
363	<	#if HAVE_TEST_AND_SET
288	<	#define HAVE_SPINLOCKS 1
289	<	typedef int spinlock_t;
363	>	typedef volatile int spinlock_t;
364
365		static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
366
367	+	#if defined(HAVE_TEST_AND_SET) && defined(HAVE_PTHREADS)
368	+	// There is nothing to lock if we are not in an multithreaded environment
369	+	#define HAVE_SPINLOCKS 1
370		static inline void spin_lock(spinlock_t *lock)
371		{
372		while (testandset(lock));
#	Line 304 | Line 381 | static inline int spin_trylock(spinlock_
381		{
382		return !testandset(lock);
383		}
384	+	#else
385	+	static inline void spin_lock(spinlock_t *lock)
386	+	{
387	+	}
388	+
389	+	static inline void spin_unlock(spinlock_t *lock)
390	+	{
391	+	}
392	+
393	+	static inline int spin_trylock(spinlock_t *lock)
394	+	{
395	+	return 1;
396	+	}
397		#endif
398
399		// Time data type for Time Manager emulation
#	Line 313 | Line 403 | typedef struct timespec tm_time_t;
403		typedef struct timeval tm_time_t;
404		#endif
405
406	+	/* Define codes for all the float formats that we know of.
407	+	* Though we only handle IEEE format.  */
408	+	#define UNKNOWN_FLOAT_FORMAT 0
409	+	#define IEEE_FLOAT_FORMAT 1
410	+	#define VAX_FLOAT_FORMAT 2
411	+	#define IBM_FLOAT_FORMAT 3
412	+	#define C4X_FLOAT_FORMAT 4
413	+
414	+	// High-precision timing
415	+	#if defined(HAVE_PTHREADS) && defined(HAVE_CLOCK_NANOSLEEP)
416	+	#define PRECISE_TIMING 1
417	+	#define PRECISE_TIMING_POSIX 1
418	+	#endif
419	+
420	+	// Timing functions
421	+	extern uint64 GetTicks_usec(void);
422	+	extern void Delay_usec(uint32 usec);
423	+
424	+	#ifdef HAVE_PTHREADS
425		// Setup pthread attributes
426		extern void Set_pthread_attr(pthread_attr_t *attr, int priority);
427	+	#endif
428
429		// Various definitions
430		typedef struct rgb_color {
#	Line 324 | Line 434 | typedef struct rgb_color {
434		uint8           alpha;
435		} rgb_color;
436
437	+	// X11 display fast locks
438	+	#if defined(HAVE_PTHREADS)
439	+	#define X11_LOCK_TYPE pthread_mutex_t
440	+	#define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER
441	+	#define XDisplayLock() pthread_mutex_lock(&x_display_lock);
442	+	#define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock);
443	+	#elif defined(HAVE_SPINLOCKS)
444	+	#define X11_LOCK_TYPE spinlock_t
445	+	#define X11_LOCK_INIT SPIN_LOCK_UNLOCKED
446	+	#define XDisplayLock() spin_lock(&x_display_lock)
447	+	#define XDisplayUnlock() spin_unlock(&x_display_lock)
448	+	#else
449	+	#define XDisplayLock()
450	+	#define XDisplayUnlock()
451	+	#endif
452	+	#ifdef X11_LOCK_TYPE
453	+	extern X11_LOCK_TYPE x_display_lock;
454	+	#endif
455	+
456		// Macro for calling MacOS routines
457	<	#define CallMacOS(type, tvect) call_macos((uint32)tvect)
458	<	#define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1)
459	<	#define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uint32)tvect, (uint32)arg1, (uint32)arg2)
460	<	#define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3)
461	<	#define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4)
462	<	#define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5)
463	<	#define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6)
464	<	#define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6, (uint32)arg7)
457	>	#define CallMacOS(type, tvect) call_macos((uintptr)tvect)
458	>	#define CallMacOS1(type, tvect, arg1) call_macos1((uintptr)tvect, (uintptr)arg1)
459	>	#define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uintptr)tvect, (uintptr)arg1, (uintptr)arg2)
460	>	#define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3)
461	>	#define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4)
462	>	#define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5)
463	>	#define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6)
464	>	#define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6, (uintptr)arg7)
465
466		#ifdef __cplusplus
467		extern "C" {

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