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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.42 by gbeauche, 2004-05-23T05:28:12Z vs.
Revision 1.53 by gbeauche, 2004-11-22T22:04:38Z

# Line 42 | Line 42
42  
43   #include <stdio.h>
44   #include <stdlib.h>
45 + #ifdef HAVE_MALLOC_H
46 + #include <malloc.h>
47 + #endif
48 +
49 + #ifdef USE_SDL_VIDEO
50 + #include <SDL_events.h>
51 + #endif
52  
53   #if ENABLE_MON
54   #include "mon.h"
# Line 52 | Line 59
59   #include "debug.h"
60  
61   // Emulation time statistics
62 < #define EMUL_TIME_STATS 1
62 > #ifndef EMUL_TIME_STATS
63 > #define EMUL_TIME_STATS 0
64 > #endif
65  
66   #if EMUL_TIME_STATS
67   static clock_t emul_start_time;
68 < static uint32 interrupt_count = 0;
68 > static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69   static clock_t interrupt_time = 0;
70   static uint32 exec68k_count = 0;
71   static clock_t exec68k_time = 0;
# Line 99 | Line 108 | const uint32 POWERPC_EXEC_RETURN = POWER
108   // Interrupts in native mode?
109   #define INTERRUPTS_IN_NATIVE_MODE 1
110  
102 // Enable native EMUL_OPs to be run without a mode switch
103 #define ENABLE_NATIVE_EMUL_OP 1
104
111   // Pointer to Kernel Data
112 < static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
112 > static KernelData * kernel_data;
113  
114   // SIGSEGV handler
115 < static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
115 > sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
116  
117   #if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
118   // Special trampolines for EmulOp and NativeOp
# Line 136 | Line 142 | class sheepshaver_cpu
142          void init_decoder();
143          void execute_sheep(uint32 opcode);
144  
139        // Filter out EMUL_OP routines that only call native code
140        bool filter_execute_emul_op(uint32 emul_op);
141
142        // "Native" EMUL_OP routines
143        void execute_emul_op_microseconds();
144        void execute_emul_op_idle_time_1();
145        void execute_emul_op_idle_time_2();
146
145          // CPU context to preserve on interrupt
146          class interrupt_context {
147                  uint32 gpr[32];
# Line 185 | Line 183 | public:
183          // Execute MacOS/PPC code
184          uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
185  
186 + #if PPC_ENABLE_JIT
187          // Compile one instruction
188          virtual int compile1(codegen_context_t & cg_context);
189 <
189 > #endif
190          // Resource manager thunk
191          void get_resource(uint32 old_get_resource);
192  
# Line 268 | Line 267 | typedef bit_field< 19, 19 > FN_field;
267   typedef bit_field< 20, 25 > NATIVE_OP_field;
268   typedef bit_field< 26, 31 > EMUL_OP_field;
269  
271 // "Native" EMUL_OP routines
272 #define GPR_A(REG) gpr(16 + (REG))
273 #define GPR_D(REG) gpr( 8 + (REG))
274
275 void sheepshaver_cpu::execute_emul_op_microseconds()
276 {
277        Microseconds(GPR_A(0), GPR_D(0));
278 }
279
280 void sheepshaver_cpu::execute_emul_op_idle_time_1()
281 {
282        // Sleep if no events pending
283        if (ReadMacInt32(0x14c) == 0)
284                Delay_usec(16667);
285        GPR_A(0) = ReadMacInt32(0x2b6);
286 }
287
288 void sheepshaver_cpu::execute_emul_op_idle_time_2()
289 {
290        // Sleep if no events pending
291        if (ReadMacInt32(0x14c) == 0)
292                Delay_usec(16667);
293        GPR_D(0) = (uint32)-2;
294 }
295
296 // Filter out EMUL_OP routines that only call native code
297 bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
298 {
299        switch (emul_op) {
300        case OP_MICROSECONDS:
301                execute_emul_op_microseconds();
302                return true;
303        case OP_IDLE_TIME:
304                execute_emul_op_idle_time_1();
305                return true;
306        case OP_IDLE_TIME_2:
307                execute_emul_op_idle_time_2();
308                return true;
309        }
310        return false;
311 }
312
270   // Execute EMUL_OP routine
271   void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
272   {
316 #if ENABLE_NATIVE_EMUL_OP
317        // First, filter out EMUL_OPs that can be executed without a mode switch
318        if (filter_execute_emul_op(emul_op))
319                return;
320 #endif
321
273          M68kRegisters r68;
274          WriteMacInt32(XLM_68K_R25, gpr(25));
275          WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
# Line 371 | Line 322 | void sheepshaver_cpu::execute_sheep(uint
322   }
323  
324   // Compile one instruction
325 + #if PPC_ENABLE_JIT
326   int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
327   {
376 #if PPC_ENABLE_JIT
328          const instr_info_t *ii = cg_context.instr_info;
329          if (ii->mnemo != PPC_I(SHEEP))
330                  return COMPILE_FAILURE;
# Line 444 | Line 395 | int sheepshaver_cpu::compile1(codegen_co
395                          status = COMPILE_CODE_OK;
396                          break;
397   #endif
447                case NATIVE_DISABLE_INTERRUPT:
448                        dg.gen_invoke(DisableInterrupt);
449                        status = COMPILE_CODE_OK;
450                        break;
451                case NATIVE_ENABLE_INTERRUPT:
452                        dg.gen_invoke(EnableInterrupt);
453                        status = COMPILE_CODE_OK;
454                        break;
398                  case NATIVE_BITBLT:
399                          dg.gen_load_T0_GPR(3);
400                          dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
# Line 508 | Line 451 | int sheepshaver_cpu::compile1(codegen_co
451  
452          default: {      // EMUL_OP
453                  uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
511 #if ENABLE_NATIVE_EMUL_OP
512                typedef void (*emul_op_func_t)(dyngen_cpu_base);
513                emul_op_func_t emul_op_func = 0;
514                switch (emul_op) {
515                case OP_MICROSECONDS:
516                        emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
517                        break;
518                case OP_IDLE_TIME:
519                        emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
520                        break;
521                case OP_IDLE_TIME_2:
522                        emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
523                        break;
524                }
525                if (emul_op_func) {
526                        dg.gen_invoke_CPU(emul_op_func);
527                        cg_context.done_compile = false;
528                        status = COMPILE_CODE_OK;
529                        break;
530                }
531 #endif
454   #if PPC_REENTRANT_JIT
455                  // Try to execute EmulOp trampoline
456                  dg.gen_set_PC_im(cg_context.pc + 4);
# Line 548 | Line 470 | int sheepshaver_cpu::compile1(codegen_co
470          }
471          }
472          return status;
551 #endif
552        return COMPILE_FAILURE;
473   }
474 + #endif
475  
476   // CPU context to preserve on interrupt
477   sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
# Line 596 | Line 517 | sheepshaver_cpu::interrupt_context::~int
517   void sheepshaver_cpu::interrupt(uint32 entry)
518   {
519   #if EMUL_TIME_STATS
520 <        interrupt_count++;
520 >        ppc_interrupt_count++;
521          const clock_t interrupt_start = clock();
522   #endif
523  
# Line 882 | Line 803 | static void dump_log(void)
803   *  Initialize CPU emulation
804   */
805  
806 < static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
806 > sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
807   {
808   #if ENABLE_VOSF
809          // Handle screen fault
# Line 894 | Line 815 | static sigsegv_return_t sigsegv_handler(
815          const uintptr addr = (uintptr)fault_address;
816   #if HAVE_SIGSEGV_SKIP_INSTRUCTION
817          // Ignore writes to ROM
818 <        if ((addr - ROM_BASE) < ROM_SIZE)
818 >        if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
819                  return SIGSEGV_RETURN_SKIP_INSTRUCTION;
820  
821          // Get program counter of target CPU
# Line 902 | Line 823 | static sigsegv_return_t sigsegv_handler(
823          const uint32 pc = cpu->pc();
824          
825          // Fault in Mac ROM or RAM?
826 <        bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
826 >        bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
827          if (mac_fault) {
828  
829                  // "VM settings" during MacOS 8 installation
# Line 922 | Line 843 | static sigsegv_return_t sigsegv_handler(
843                          return SIGSEGV_RETURN_SKIP_INSTRUCTION;
844                  else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
845                          return SIGSEGV_RETURN_SKIP_INSTRUCTION;
846 +        
847 +                // MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
848 +                else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
849 +                        return SIGSEGV_RETURN_SKIP_INSTRUCTION;
850 +                else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
851 +                        return SIGSEGV_RETURN_SKIP_INSTRUCTION;
852  
853                  // Ignore writes to the zero page
854                  else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
# Line 948 | Line 875 | static sigsegv_return_t sigsegv_handler(
875  
876   void init_emul_ppc(void)
877   {
878 +        // Get pointer to KernelData in host address space
879 +        kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
880 +
881          // Initialize main CPU emulator
882          ppc_cpu = new sheepshaver_cpu();
883          ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
884          ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
885          WriteMacInt32(XLM_RUN_MODE, MODE_68K);
886  
957        // Install the handler for SIGSEGV
958        sigsegv_install_handler(sigsegv_handler);
959
887   #if ENABLE_MON
888          // Install "regs" command in cxmon
889          mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
# Line 982 | Line 909 | void exit_emul_ppc(void)
909          printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
910          printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
911                     (double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
912 +        printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
913 +                   (double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
914  
915   #define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
916                  printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
# Line 1057 | Line 986 | void TriggerInterrupt(void)
986  
987   void sheepshaver_cpu::handle_interrupt(void)
988   {
989 <        // Do nothing if interrupts are disabled
990 <        if (*(int32 *)XLM_IRQ_NEST > 0)
991 <                return;
989 > #ifdef USE_SDL_VIDEO
990 >        // We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
991 >        SDL_PumpEvents();
992 > #endif
993  
994 <        // Do nothing if there is no interrupt pending
995 <        if (InterruptFlags == 0)
994 >        // Do nothing if interrupts are disabled
995 >        if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
996                  return;
997  
998          // Current interrupt nest level
999          static int interrupt_depth = 0;
1000          ++interrupt_depth;
1001 + #if EMUL_TIME_STATS
1002 +        interrupt_count++;
1003 + #endif
1004  
1005          // Disable MacOS stack sniffer
1006          WriteMacInt32(0x110, 0);
# Line 1107 | Line 1040 | void sheepshaver_cpu::handle_interrupt(v
1040                  // 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1041                  if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1042                          interrupt_context ctx(this, "68k mode");
1043 + #if EMUL_TIME_STATS
1044 +                        const clock_t interrupt_start = clock();
1045 + #endif
1046   #if 1
1047                          // Execute full 68k interrupt routine
1048                          M68kRegisters r;
1049                          uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
1050                          WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
1051 <                        static const uint8 proc[] = {
1051 >                        static const uint8 proc_template[] = {
1052                                  0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
1053                                  0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
1054                                  0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
# Line 1120 | Line 1056 | void sheepshaver_cpu::handle_interrupt(v
1056                                  0x4e, 0xd0,                                             // jmp          (a0)
1057                                  M68K_RTS >> 8, M68K_RTS & 0xff  // @1
1058                          };
1059 <                        Execute68k((uint32)proc, &r);
1059 >                        BUILD_SHEEPSHAVER_PROCEDURE(proc);
1060 >                        Execute68k(proc, &r);
1061                          WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
1062   #else
1063                          // Only update cursor
# Line 1132 | Line 1069 | void sheepshaver_cpu::handle_interrupt(v
1069                                  }
1070                          }
1071   #endif
1072 + #if EMUL_TIME_STATS
1073 +                        interrupt_time += (clock() - interrupt_start);
1074 + #endif
1075                  }
1076                  break;
1077   #endif
# Line 1166 | Line 1106 | void sheepshaver_cpu::execute_native_op(
1106                  VideoVBL();
1107                  break;
1108          case NATIVE_VIDEO_DO_DRIVER_IO:
1109 <                gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1170 <                                                                                           (void *)gpr(5), gpr(6), gpr(7));
1109 >                gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1110                  break;
1111   #ifdef WORDS_BIGENDIAN
1112          case NATIVE_ETHER_IRQ:
# Line 1251 | Line 1190 | void sheepshaver_cpu::execute_native_op(
1190                  get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1191                  break;
1192          }
1254        case NATIVE_DISABLE_INTERRUPT:
1255                DisableInterrupt();
1256                break;
1257        case NATIVE_ENABLE_INTERRUPT:
1258                EnableInterrupt();
1259                break;
1193          case NATIVE_MAKE_EXECUTABLE:
1194 <                MakeExecutable(0, (void *)gpr(4), gpr(5));
1194 >                MakeExecutable(0, gpr(4), gpr(5));
1195                  break;
1196          case NATIVE_CHECK_LOAD_INVOC:
1197                  check_load_invoc(gpr(3), gpr(4), gpr(5));

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