| 42 |
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|
| 43 |
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#include <stdio.h> |
| 44 |
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#include <stdlib.h> |
| 45 |
+ |
#ifdef HAVE_MALLOC_H |
| 46 |
+ |
#include <malloc.h> |
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+ |
#endif |
| 48 |
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|
| 49 |
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#ifdef USE_SDL_VIDEO |
| 50 |
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#include <SDL_events.h> |
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// Interrupts in native mode? |
| 109 |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
| 110 |
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|
| 108 |
– |
// Enable native EMUL_OPs to be run without a mode switch |
| 109 |
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#define ENABLE_NATIVE_EMUL_OP 1 |
| 110 |
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|
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// Pointer to Kernel Data |
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< |
static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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> |
static KernelData * kernel_data; |
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|
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// SIGSEGV handler |
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< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
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// Special trampolines for EmulOp and NativeOp |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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|
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// Filter out EMUL_OP routines that only call native code |
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bool filter_execute_emul_op(uint32 emul_op); |
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|
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// "Native" EMUL_OP routines |
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void execute_emul_op_microseconds(); |
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void execute_emul_op_idle_time_1(); |
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void execute_emul_op_idle_time_2(); |
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|
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// CPU context to preserve on interrupt |
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class interrupt_context { |
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uint32 gpr[32]; |
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// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
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|
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#if PPC_ENABLE_JIT |
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// Compile one instruction |
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virtual int compile1(codegen_context_t & cg_context); |
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< |
|
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> |
#endif |
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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|
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typedef bit_field< 20, 25 > NATIVE_OP_field; |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
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|
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// "Native" EMUL_OP routines |
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#define GPR_A(REG) gpr(16 + (REG)) |
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#define GPR_D(REG) gpr( 8 + (REG)) |
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|
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void sheepshaver_cpu::execute_emul_op_microseconds() |
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{ |
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Microseconds(GPR_A(0), GPR_D(0)); |
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} |
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|
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void sheepshaver_cpu::execute_emul_op_idle_time_1() |
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{ |
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// Sleep if no events pending |
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if (ReadMacInt32(0x14c) == 0) |
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Delay_usec(16667); |
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GPR_A(0) = ReadMacInt32(0x2b6); |
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} |
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|
| 294 |
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void sheepshaver_cpu::execute_emul_op_idle_time_2() |
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{ |
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// Sleep if no events pending |
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if (ReadMacInt32(0x14c) == 0) |
| 298 |
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Delay_usec(16667); |
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GPR_D(0) = (uint32)-2; |
| 300 |
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} |
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|
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// Filter out EMUL_OP routines that only call native code |
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bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op) |
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{ |
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switch (emul_op) { |
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case OP_MICROSECONDS: |
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execute_emul_op_microseconds(); |
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return true; |
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case OP_IDLE_TIME: |
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execute_emul_op_idle_time_1(); |
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return true; |
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case OP_IDLE_TIME_2: |
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execute_emul_op_idle_time_2(); |
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– |
return true; |
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} |
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return false; |
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} |
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– |
|
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// Execute EMUL_OP routine |
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void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
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{ |
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– |
#if ENABLE_NATIVE_EMUL_OP |
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– |
// First, filter out EMUL_OPs that can be executed without a mode switch |
| 324 |
– |
if (filter_execute_emul_op(emul_op)) |
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– |
return; |
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– |
#endif |
| 327 |
– |
|
| 273 |
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M68kRegisters r68; |
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WriteMacInt32(XLM_68K_R25, gpr(25)); |
| 275 |
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WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
| 322 |
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} |
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|
| 324 |
|
// Compile one instruction |
| 325 |
+ |
#if PPC_ENABLE_JIT |
| 326 |
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int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
| 327 |
|
{ |
| 382 |
– |
#if PPC_ENABLE_JIT |
| 328 |
|
const instr_info_t *ii = cg_context.instr_info; |
| 329 |
|
if (ii->mnemo != PPC_I(SHEEP)) |
| 330 |
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return COMPILE_FAILURE; |
| 451 |
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|
| 452 |
|
default: { // EMUL_OP |
| 453 |
|
uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
| 509 |
– |
#if ENABLE_NATIVE_EMUL_OP |
| 510 |
– |
typedef void (*emul_op_func_t)(dyngen_cpu_base); |
| 511 |
– |
emul_op_func_t emul_op_func = 0; |
| 512 |
– |
switch (emul_op) { |
| 513 |
– |
case OP_MICROSECONDS: |
| 514 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr(); |
| 515 |
– |
break; |
| 516 |
– |
case OP_IDLE_TIME: |
| 517 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr(); |
| 518 |
– |
break; |
| 519 |
– |
case OP_IDLE_TIME_2: |
| 520 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr(); |
| 521 |
– |
break; |
| 522 |
– |
} |
| 523 |
– |
if (emul_op_func) { |
| 524 |
– |
dg.gen_invoke_CPU(emul_op_func); |
| 525 |
– |
cg_context.done_compile = false; |
| 526 |
– |
status = COMPILE_CODE_OK; |
| 527 |
– |
break; |
| 528 |
– |
} |
| 529 |
– |
#endif |
| 454 |
|
#if PPC_REENTRANT_JIT |
| 455 |
|
// Try to execute EmulOp trampoline |
| 456 |
|
dg.gen_set_PC_im(cg_context.pc + 4); |
| 470 |
|
} |
| 471 |
|
} |
| 472 |
|
return status; |
| 549 |
– |
#endif |
| 550 |
– |
return COMPILE_FAILURE; |
| 473 |
|
} |
| 474 |
+ |
#endif |
| 475 |
|
|
| 476 |
|
// CPU context to preserve on interrupt |
| 477 |
|
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
| 803 |
|
* Initialize CPU emulation |
| 804 |
|
*/ |
| 805 |
|
|
| 806 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
| 806 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
| 807 |
|
{ |
| 808 |
|
#if ENABLE_VOSF |
| 809 |
|
// Handle screen fault |
| 815 |
|
const uintptr addr = (uintptr)fault_address; |
| 816 |
|
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
| 817 |
|
// Ignore writes to ROM |
| 818 |
< |
if ((addr - ROM_BASE) < ROM_SIZE) |
| 818 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
| 819 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
| 820 |
|
|
| 821 |
|
// Get program counter of target CPU |
| 875 |
|
|
| 876 |
|
void init_emul_ppc(void) |
| 877 |
|
{ |
| 878 |
+ |
// Get pointer to KernelData in host address space |
| 879 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
| 880 |
+ |
|
| 881 |
|
// Initialize main CPU emulator |
| 882 |
|
ppc_cpu = new sheepshaver_cpu(); |
| 883 |
|
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
| 884 |
|
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
| 885 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
| 886 |
|
|
| 961 |
– |
// Install the handler for SIGSEGV |
| 962 |
– |
sigsegv_install_handler(sigsegv_handler); |
| 963 |
– |
|
| 887 |
|
#if ENABLE_MON |
| 888 |
|
// Install "regs" command in cxmon |
| 889 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
| 1048 |
|
M68kRegisters r; |
| 1049 |
|
uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
| 1050 |
|
WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
| 1051 |
< |
static const uint8 proc[] = { |
| 1051 |
> |
static const uint8 proc_template[] = { |
| 1052 |
|
0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
| 1053 |
|
0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
| 1054 |
|
0x40, 0xe7, // move sr,-(sp) (saved SR) |
| 1056 |
|
0x4e, 0xd0, // jmp (a0) |
| 1057 |
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
| 1058 |
|
}; |
| 1059 |
< |
Execute68k((uint32)proc, &r); |
| 1059 |
> |
BUILD_SHEEPSHAVER_PROCEDURE(proc); |
| 1060 |
> |
Execute68k(proc, &r); |
| 1061 |
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
| 1062 |
|
#else |
| 1063 |
|
// Only update cursor |
| 1106 |
|
VideoVBL(); |
| 1107 |
|
break; |
| 1108 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
| 1109 |
< |
gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
| 1186 |
< |
(void *)gpr(5), gpr(6), gpr(7)); |
| 1109 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
| 1110 |
|
break; |
| 1111 |
|
#ifdef WORDS_BIGENDIAN |
| 1112 |
|
case NATIVE_ETHER_IRQ: |
| 1191 |
|
break; |
| 1192 |
|
} |
| 1193 |
|
case NATIVE_MAKE_EXECUTABLE: |
| 1194 |
< |
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
| 1194 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
| 1195 |
|
break; |
| 1196 |
|
case NATIVE_CHECK_LOAD_INVOC: |
| 1197 |
|
check_load_invoc(gpr(3), gpr(4), gpr(5)); |
