| 42 |
|
|
| 43 |
|
#include <stdio.h> |
| 44 |
|
#include <stdlib.h> |
| 45 |
+ |
#ifdef HAVE_MALLOC_H |
| 46 |
+ |
#include <malloc.h> |
| 47 |
+ |
#endif |
| 48 |
|
|
| 49 |
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#ifdef USE_SDL_VIDEO |
| 50 |
|
#include <SDL_events.h> |
| 109 |
|
#define INTERRUPTS_IN_NATIVE_MODE 1 |
| 110 |
|
|
| 111 |
|
// Pointer to Kernel Data |
| 112 |
< |
static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
| 112 |
> |
static KernelData * kernel_data; |
| 113 |
|
|
| 114 |
|
// SIGSEGV handler |
| 115 |
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sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
| 183 |
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// Execute MacOS/PPC code |
| 184 |
|
uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
| 185 |
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|
| 186 |
+ |
#if PPC_ENABLE_JIT |
| 187 |
|
// Compile one instruction |
| 188 |
|
virtual int compile1(codegen_context_t & cg_context); |
| 189 |
< |
|
| 189 |
> |
#endif |
| 190 |
|
// Resource manager thunk |
| 191 |
|
void get_resource(uint32 old_get_resource); |
| 192 |
|
|
| 322 |
|
} |
| 323 |
|
|
| 324 |
|
// Compile one instruction |
| 325 |
+ |
#if PPC_ENABLE_JIT |
| 326 |
|
int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
| 327 |
|
{ |
| 323 |
– |
#if PPC_ENABLE_JIT |
| 328 |
|
const instr_info_t *ii = cg_context.instr_info; |
| 329 |
|
if (ii->mnemo != PPC_I(SHEEP)) |
| 330 |
|
return COMPILE_FAILURE; |
| 470 |
|
} |
| 471 |
|
} |
| 472 |
|
return status; |
| 469 |
– |
#endif |
| 470 |
– |
return COMPILE_FAILURE; |
| 473 |
|
} |
| 474 |
+ |
#endif |
| 475 |
|
|
| 476 |
|
// CPU context to preserve on interrupt |
| 477 |
|
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
| 815 |
|
const uintptr addr = (uintptr)fault_address; |
| 816 |
|
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
| 817 |
|
// Ignore writes to ROM |
| 818 |
< |
if ((addr - ROM_BASE) < ROM_SIZE) |
| 818 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
| 819 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
| 820 |
|
|
| 821 |
|
// Get program counter of target CPU |
| 875 |
|
|
| 876 |
|
void init_emul_ppc(void) |
| 877 |
|
{ |
| 878 |
+ |
// Get pointer to KernelData in host address space |
| 879 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
| 880 |
+ |
|
| 881 |
|
// Initialize main CPU emulator |
| 882 |
|
ppc_cpu = new sheepshaver_cpu(); |
| 883 |
|
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
| 1048 |
|
M68kRegisters r; |
| 1049 |
|
uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
| 1050 |
|
WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
| 1051 |
< |
static const uint8 proc[] = { |
| 1051 |
> |
static const uint8 proc_template[] = { |
| 1052 |
|
0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
| 1053 |
|
0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
| 1054 |
|
0x40, 0xe7, // move sr,-(sp) (saved SR) |
| 1056 |
|
0x4e, 0xd0, // jmp (a0) |
| 1057 |
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
| 1058 |
|
}; |
| 1059 |
< |
Execute68k((uint32)proc, &r); |
| 1059 |
> |
BUILD_SHEEPSHAVER_PROCEDURE(proc); |
| 1060 |
> |
Execute68k(proc, &r); |
| 1061 |
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
| 1062 |
|
#else |
| 1063 |
|
// Only update cursor |
| 1106 |
|
VideoVBL(); |
| 1107 |
|
break; |
| 1108 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
| 1109 |
< |
gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
| 1103 |
< |
(void *)gpr(5), gpr(6), gpr(7)); |
| 1109 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
| 1110 |
|
break; |
| 1111 |
|
#ifdef WORDS_BIGENDIAN |
| 1112 |
|
case NATIVE_ETHER_IRQ: |
| 1191 |
|
break; |
| 1192 |
|
} |
| 1193 |
|
case NATIVE_MAKE_EXECUTABLE: |
| 1194 |
< |
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
| 1194 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
| 1195 |
|
break; |
| 1196 |
|
case NATIVE_CHECK_LOAD_INVOC: |
| 1197 |
|
check_load_invoc(gpr(3), gpr(4), gpr(5)); |
