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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.39 by gbeauche, 2004-05-20T11:05:30Z vs.
Revision 1.57 by gbeauche, 2005-01-30T21:48:21Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 52 | Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 84 | Line 93 | extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95
87	–	// Enable multicore (main/interrupts) cpu emulation?
88	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
89	–
96		// Enable interrupt routine safety checks?
97		#define SAFE_INTERRUPT_PPC 1
98
#	Line 102 | Line 108 | const uint32 POWERPC_EXEC_RETURN = POWER
108		// Interrupts in native mode?
109		#define INTERRUPTS_IN_NATIVE_MODE 1
110
105	–	// Enable native EMUL_OPs to be run without a mode switch
106	–	#define ENABLE_NATIVE_EMUL_OP 1
107	–
111		// Pointer to Kernel Data
112	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
112	>	static KernelData * kernel_data;
113
114		// SIGSEGV handler
115	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
115	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
116
117		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
118		// Special trampolines for EmulOp and NativeOp
#	Line 139 | Line 142 | class sheepshaver_cpu
142		void init_decoder();
143		void execute_sheep(uint32 opcode);
144
142	–	// Filter out EMUL_OP routines that only call native code
143	–	bool filter_execute_emul_op(uint32 emul_op);
144	–
145	–	// "Native" EMUL_OP routines
146	–	void execute_emul_op_microseconds();
147	–	void execute_emul_op_idle_time_1();
148	–	void execute_emul_op_idle_time_2();
149	–
145		// CPU context to preserve on interrupt
146		class interrupt_context {
147		uint32 gpr[32];
148	+	double fpr[32];
149		uint32 pc;
150		uint32 lr;
151		uint32 ctr;
152		uint32 cr;
153		uint32 xer;
154	+	uint32 fpscr;
155		sheepshaver_cpu *cpu;
156		const char *where;
157		public:
#	Line 188 | Line 185 | public:
185		// Execute MacOS/PPC code
186		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
187
188	+	#if PPC_ENABLE_JIT
189		// Compile one instruction
190		virtual int compile1(codegen_context_t & cg_context);
191	<
191	>	#endif
192		// Resource manager thunk
193		void get_resource(uint32 old_get_resource);
194
#	Line 200 | Line 198 | public:
198
199		// Make sure the SIGSEGV handler can access CPU registers
200		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
201	+
202	+	// Memory allocator returning areas aligned on 16-byte boundaries
203	+	void *operator new(size_t size);
204	+	void operator delete(void *p);
205		};
206
207		// Memory allocator returning areas aligned on 16-byte boundaries
208	<	void *operator new(size_t size)
208	>	void *sheepshaver_cpu::operator new(size_t size)
209		{
210		void *p;
211
#	Line 222 | Line 224 | void *operator new(size_t size)
224		return p;
225		}
226
227	<	void operator delete(void *p)
227	>	void sheepshaver_cpu::operator delete(void *p)
228		{
229		#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
230		#if defined(__GLIBC__)
#	Line 271 | Line 273 | typedef bit_field< 19, 19 > FN_field;
273		typedef bit_field< 20, 25 > NATIVE_OP_field;
274		typedef bit_field< 26, 31 > EMUL_OP_field;
275
274	–	// "Native" EMUL_OP routines
275	–	#define GPR_A(REG) gpr(16 + (REG))
276	–	#define GPR_D(REG) gpr( 8 + (REG))
277	–
278	–	void sheepshaver_cpu::execute_emul_op_microseconds()
279	–	{
280	–	Microseconds(GPR_A(0), GPR_D(0));
281	–	}
282	–
283	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
284	–	{
285	–	// Sleep if no events pending
286	–	if (ReadMacInt32(0x14c) == 0)
287	–	Delay_usec(16667);
288	–	GPR_A(0) = ReadMacInt32(0x2b6);
289	–	}
290	–
291	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
292	–	{
293	–	// Sleep if no events pending
294	–	if (ReadMacInt32(0x14c) == 0)
295	–	Delay_usec(16667);
296	–	GPR_D(0) = (uint32)-2;
297	–	}
298	–
299	–	// Filter out EMUL_OP routines that only call native code
300	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
301	–	{
302	–	switch (emul_op) {
303	–	case OP_MICROSECONDS:
304	–	execute_emul_op_microseconds();
305	–	return true;
306	–	case OP_IDLE_TIME:
307	–	execute_emul_op_idle_time_1();
308	–	return true;
309	–	case OP_IDLE_TIME_2:
310	–	execute_emul_op_idle_time_2();
311	–	return true;
312	–	}
313	–	return false;
314	–	}
315	–
276		// Execute EMUL_OP routine
277		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
278		{
319	–	#if ENABLE_NATIVE_EMUL_OP
320	–	// First, filter out EMUL_OPs that can be executed without a mode switch
321	–	if (filter_execute_emul_op(emul_op))
322	–	return;
323	–	#endif
324	–
279		M68kRegisters r68;
280		WriteMacInt32(XLM_68K_R25, gpr(25));
281		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 374 | Line 328 | void sheepshaver_cpu::execute_sheep(uint
328		}
329
330		// Compile one instruction
331	+	#if PPC_ENABLE_JIT
332		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
333		{
379	–	#if PPC_ENABLE_JIT
334		const instr_info_t *ii = cg_context.instr_info;
335		if (ii->mnemo != PPC_I(SHEEP))
336		return COMPILE_FAILURE;
#	Line 447 | Line 401 | int sheepshaver_cpu::compile1(codegen_co
401		status = COMPILE_CODE_OK;
402		break;
403		#endif
450	–	case NATIVE_DISABLE_INTERRUPT:
451	–	dg.gen_invoke(DisableInterrupt);
452	–	status = COMPILE_CODE_OK;
453	–	break;
454	–	case NATIVE_ENABLE_INTERRUPT:
455	–	dg.gen_invoke(EnableInterrupt);
456	–	status = COMPILE_CODE_OK;
457	–	break;
404		case NATIVE_BITBLT:
405		dg.gen_load_T0_GPR(3);
406		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
#	Line 472 | Line 418 | int sheepshaver_cpu::compile1(codegen_co
418		break;
419		}
420		// Could we fully translate this NativeOp?
421	<	if (FN_field::test(opcode)) {
422	<	if (status != COMPILE_FAILURE) {
421	>	if (status == COMPILE_CODE_OK) {
422	>	if (!FN_field::test(opcode))
423	>	cg_context.done_compile = false;
424	>	else {
425		dg.gen_load_A0_LR();
426		dg.gen_set_PC_A0();
427	+	cg_context.done_compile = true;
428		}
480	–	cg_context.done_compile = true;
481	–	break;
482	–	}
483	–	else if (status != COMPILE_FAILURE) {
484	–	cg_context.done_compile = false;
429		break;
430		}
431		#if PPC_REENTRANT_JIT
432		// Try to execute NativeOp trampoline
433	<	dg.gen_set_PC_im(cg_context.pc + 4);
433	>	if (!FN_field::test(opcode))
434	>	dg.gen_set_PC_im(cg_context.pc + 4);
435	>	else {
436	>	dg.gen_load_A0_LR();
437	>	dg.gen_set_PC_A0();
438	>	}
439		dg.gen_mov_32_T0_im(selector);
440		dg.gen_jmp(native_op_trampoline);
441		cg_context.done_compile = true;
#	Line 494 | Line 443 | int sheepshaver_cpu::compile1(codegen_co
443		break;
444		#endif
445		// Invoke NativeOp handler
446	<	typedef void (*func_t)(dyngen_cpu_base, uint32);
447	<	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
448	<	dg.gen_invoke_CPU_im(func, selector);
449	<	cg_context.done_compile = false;
450	<	status = COMPILE_CODE_OK;
446	>	if (!FN_field::test(opcode)) {
447	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
448	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
449	>	dg.gen_invoke_CPU_im(func, selector);
450	>	cg_context.done_compile = false;
451	>	status = COMPILE_CODE_OK;
452	>	}
453	>	// Otherwise, let it generate a call to execute_sheep() which
454	>	// will cause necessary updates to the program counter
455		break;
456		}
457
458		default: {      // EMUL_OP
459		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
507	–	#if ENABLE_NATIVE_EMUL_OP
508	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
509	–	emul_op_func_t emul_op_func = 0;
510	–	switch (emul_op) {
511	–	case OP_MICROSECONDS:
512	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
513	–	break;
514	–	case OP_IDLE_TIME:
515	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
516	–	break;
517	–	case OP_IDLE_TIME_2:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
519	–	break;
520	–	}
521	–	if (emul_op_func) {
522	–	dg.gen_invoke_CPU(emul_op_func);
523	–	cg_context.done_compile = false;
524	–	status = COMPILE_CODE_OK;
525	–	break;
526	–	}
527	–	#endif
460		#if PPC_REENTRANT_JIT
461		// Try to execute EmulOp trampoline
462		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 544 | Line 476 | int sheepshaver_cpu::compile1(codegen_co
476		}
477		}
478		return status;
547	–	#endif
548	–	return COMPILE_FAILURE;
479		}
480	+	#endif
481
482		// CPU context to preserve on interrupt
483		sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
#	Line 557 | Line 488 | sheepshaver_cpu::interrupt_context::inte
488
489		// Save interrupt context
490		memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
491	+	memcpy(&fpr[0], &cpu->fpr(0), sizeof(fpr));
492		pc = cpu->pc();
493		lr = cpu->lr();
494		ctr = cpu->ctr();
495		cr = cpu->get_cr();
496		xer = cpu->get_xer();
497	+	fpscr = cpu->fpscr();
498		#endif
499		}
500
#	Line 575 | Line 508 | sheepshaver_cpu::interrupt_context::~int
508		if (gpr[i] != cpu->gpr(i))
509		printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
510		}
511	+	if (memcmp(&fpr[0], &cpu->fpr(0), sizeof(fpr)) != 0) {
512	+	printf("FATAL: %s: interrupt clobbers registers\n", where);
513	+	for (int i = 0; i < 32; i++)
514	+	if (fpr[i] != cpu->fpr(i))
515	+	printf(" r%d: %f -> %f\n", i, fpr[i], cpu->fpr(i));
516	+	}
517		if (pc != cpu->pc())
518		printf("FATAL: %s: interrupt clobbers PC\n", where);
519		if (lr != cpu->lr())
#	Line 585 | Line 524 | sheepshaver_cpu::interrupt_context::~int
524		printf("FATAL: %s: interrupt clobbers CR\n", where);
525		if (xer != cpu->get_xer())
526		printf("FATAL: %s: interrupt clobbers XER\n", where);
527	+	if (fpscr != cpu->fpscr())
528	+	printf("FATAL: %s: interrupt clobbers FPSCR\n", where);
529		#endif
530		}
531
#	Line 592 | Line 533 | sheepshaver_cpu::interrupt_context::~int
533		void sheepshaver_cpu::interrupt(uint32 entry)
534		{
535		#if EMUL_TIME_STATS
536	<	interrupt_count++;
536	>	ppc_interrupt_count++;
537		const clock_t interrupt_start = clock();
538		#endif
539
#	Line 603 | Line 544 | void sheepshaver_cpu::interrupt(uint32 e
544		depth++;
545		#endif
546
606	–	#if !MULTICORE_CPU
547		// Save program counters and branch registers
548		uint32 saved_pc = pc();
549		uint32 saved_lr = lr();
550		uint32 saved_ctr= ctr();
551		uint32 saved_sp = gpr(1);
612	–	#endif
552
553		// Initialize stack pointer to SheepShaver alternate stack base
554		gpr(1) = SignalStackBase() - 64;
#	Line 649 | Line 588 | void sheepshaver_cpu::interrupt(uint32 e
588		// Enter nanokernel
589		execute(entry);
590
652	–	#if !MULTICORE_CPU
591		// Restore program counters and branch registers
592		pc() = saved_pc;
593		lr() = saved_lr;
594		ctr()= saved_ctr;
595		gpr(1) = saved_sp;
658	–	#endif
596
597		#if EMUL_TIME_STATS
598		interrupt_time += (clock() - interrupt_start);
#	Line 857 | Line 794 | inline void sheepshaver_cpu::get_resourc
794		*              SheepShaver CPU engine interface
795		**/
796
797	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
798	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
862	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
797	>	// PowerPC CPU emulator
798	>	static sheepshaver_cpu *ppc_cpu = NULL;
799
800		void FlushCodeCache(uintptr start, uintptr end)
801		{
802		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
803	<	main_cpu->invalidate_cache_range(start, end);
868	<	#if MULTICORE_CPU
869	<	interrupt_cpu->invalidate_cache_range(start, end);
870	<	#endif
871	<	}
872	<
873	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
874	<	{
875	<	#if MULTICORE_CPU
876	<	current_cpu = new_cpu;
877	<	#endif
878	<	}
879	<
880	<	static inline void cpu_pop()
881	<	{
882	<	#if MULTICORE_CPU
883	<	current_cpu = main_cpu;
884	<	#endif
803	>	ppc_cpu->invalidate_cache_range(start, end);
804		}
805
806		// Dump PPC registers
807		static void dump_registers(void)
808		{
809	<	current_cpu->dump_registers();
809	>	ppc_cpu->dump_registers();
810		}
811
812		// Dump log
813		static void dump_log(void)
814		{
815	<	current_cpu->dump_log();
815	>	ppc_cpu->dump_log();
816		}
817
818		/*
819		*  Initialize CPU emulation
820		*/
821
822	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
822	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
823		{
824		#if ENABLE_VOSF
825		// Handle screen fault
#	Line 912 | Line 831 | static sigsegv_return_t sigsegv_handler(
831		const uintptr addr = (uintptr)fault_address;
832		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
833		// Ignore writes to ROM
834	<	if ((addr - ROM_BASE) < ROM_SIZE)
834	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
835		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
836
837		// Get program counter of target CPU
838	<	sheepshaver_cpu * const cpu = current_cpu;
838	>	sheepshaver_cpu * const cpu = ppc_cpu;
839		const uint32 pc = cpu->pc();
840
841		// Fault in Mac ROM or RAM?
842	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
842	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
843		if (mac_fault) {
844
845		// "VM settings" during MacOS 8 installation
#	Line 940 | Line 859 | static sigsegv_return_t sigsegv_handler(
859		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
860		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
861		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
862	+
863	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
864	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
865	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
866	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
867	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
868
869		// Ignore writes to the zero page
870		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 956 | Line 881 | static sigsegv_return_t sigsegv_handler(
881		printf("SIGSEGV\n");
882		printf("  pc %p\n", fault_instruction);
883		printf("  ea %p\n", fault_address);
959	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
884		dump_registers();
885	<	current_cpu->dump_log();
885	>	ppc_cpu->dump_log();
886		enter_mon();
887		QuitEmulator();
888
#	Line 967 | Line 891 | static sigsegv_return_t sigsegv_handler(
891
892		void init_emul_ppc(void)
893		{
894	+	// Get pointer to KernelData in host address space
895	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
896	+
897		// Initialize main CPU emulator
898	<	main_cpu = new sheepshaver_cpu();
899	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
900	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
898	>	ppc_cpu = new sheepshaver_cpu();
899	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
900	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
901		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
902
976	–	#if MULTICORE_CPU
977	–	// Initialize alternate CPU emulator to handle interrupts
978	–	interrupt_cpu = new sheepshaver_cpu();
979	–	#endif
980	–
981	–	// Install the handler for SIGSEGV
982	–	sigsegv_install_handler(sigsegv_handler);
983	–
903		#if ENABLE_MON
904		// Install "regs" command in cxmon
905		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 1006 | Line 925 | void exit_emul_ppc(void)
925		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
926		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
927		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
928	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
929	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
930
931		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
932		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 1022 | Line 943 | void exit_emul_ppc(void)
943		printf("\n");
944		#endif
945
946	<	delete main_cpu;
1026	<	#if MULTICORE_CPU
1027	<	delete interrupt_cpu;
1028	<	#endif
946	>	delete ppc_cpu;
947		}
948
949		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 1060 | Line 978 | void init_emul_op_trampolines(basic_dyng
978
979		void emul_ppc(uint32 entry)
980		{
1063	–	current_cpu = main_cpu;
981		#if 0
982	<	current_cpu->start_log();
982	>	ppc_cpu->start_log();
983		#endif
984		// start emulation loop and enable code translation or caching
985	<	current_cpu->execute(entry);
985	>	ppc_cpu->execute(entry);
986		}
987
988		/*
989		*  Handle PowerPC interrupt
990		*/
991
1075	–	#if ASYNC_IRQ
1076	–	void HandleInterrupt(void)
1077	–	{
1078	–	main_cpu->handle_interrupt();
1079	–	}
1080	–	#else
992		void TriggerInterrupt(void)
993		{
994		#if 0
995		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
996		#else
997		// Trigger interrupt to main cpu only
998	<	if (main_cpu)
999	<	main_cpu->trigger_interrupt();
998	>	if (ppc_cpu)
999	>	ppc_cpu->trigger_interrupt();
1000		#endif
1001		}
1091	–	#endif
1002
1003		void sheepshaver_cpu::handle_interrupt(void)
1004		{
1005	+	#ifdef USE_SDL_VIDEO
1006	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
1007	+	SDL_PumpEvents();
1008	+	#endif
1009	+
1010		// Do nothing if interrupts are disabled
1011	<	if (*(int32 *)XLM_IRQ_NEST > 0)
1011	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
1012		return;
1013
1014	<	// Do nothing if there is no interrupt pending
1015	<	if (InterruptFlags == 0)
1016	<	return;
1014	>	// Current interrupt nest level
1015	>	static int interrupt_depth = 0;
1016	>	++interrupt_depth;
1017	>	#if EMUL_TIME_STATS
1018	>	interrupt_count++;
1019	>	#endif
1020
1021		// Disable MacOS stack sniffer
1022		WriteMacInt32(0x110, 0);
#	Line 1107 | Line 1025 | void sheepshaver_cpu::handle_interrupt(v
1025		switch (ReadMacInt32(XLM_RUN_MODE)) {
1026		case MODE_68K:
1027		// 68k emulator active, trigger 68k interrupt level 1
1110	–	assert(current_cpu == main_cpu);
1028		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1029		set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1030		break;
#	Line 1115 | Line 1032 | void sheepshaver_cpu::handle_interrupt(v
1032		#if INTERRUPTS_IN_NATIVE_MODE
1033		case MODE_NATIVE:
1034		// 68k emulator inactive, in nanokernel?
1035	<	assert(current_cpu == main_cpu);
1119	<	if (gpr(1) != KernelDataAddr) {
1035	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1036		interrupt_context ctx(this, "PowerPC mode");
1037
1038		// Prepare for 68k interrupt level 1
#	Line 1127 | Line 1043 | void sheepshaver_cpu::handle_interrupt(v
1043
1044		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1045		DisableInterrupt();
1130	–	cpu_push(interrupt_cpu);
1046		if (ROMType == ROMTYPE_NEWWORLD)
1047	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1047	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1048		else
1049	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
1135	<	cpu_pop();
1049	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1050		}
1051		break;
1052		#endif
#	Line 1142 | Line 1056 | void sheepshaver_cpu::handle_interrupt(v
1056		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1057		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1058		interrupt_context ctx(this, "68k mode");
1059	+	#if EMUL_TIME_STATS
1060	+	const clock_t interrupt_start = clock();
1061	+	#endif
1062		#if 1
1063		// Execute full 68k interrupt routine
1064		M68kRegisters r;
1065		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
1066		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
1067	<	static const uint8 proc[] = {
1067	>	static const uint8 proc_template[] = {
1068		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
1069		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
1070		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1155 | Line 1072 | void sheepshaver_cpu::handle_interrupt(v
1072		0x4e, 0xd0,                                             // jmp          (a0)
1073		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
1074		};
1075	<	Execute68k((uint32)proc, &r);
1075	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
1076	>	Execute68k(proc, &r);
1077		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
1078		#else
1079		// Only update cursor
#	Line 1167 | Line 1085 | void sheepshaver_cpu::handle_interrupt(v
1085		}
1086		}
1087		#endif
1088	+	#if EMUL_TIME_STATS
1089	+	interrupt_time += (clock() - interrupt_start);
1090	+	#endif
1091		}
1092		break;
1093		#endif
1094		}
1095	+
1096	+	// We are done with this interrupt
1097	+	--interrupt_depth;
1098		}
1099
1100		static void get_resource(void);
#	Line 1198 | Line 1122 | void sheepshaver_cpu::execute_native_op(
1122		VideoVBL();
1123		break;
1124		case NATIVE_VIDEO_DO_DRIVER_IO:
1125	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1202	<	(void *)gpr(5), gpr(6), gpr(7));
1125	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1126		break;
1204	–	#ifdef WORDS_BIGENDIAN
1127		case NATIVE_ETHER_IRQ:
1128		EtherIRQ();
1129		break;
#	Line 1223 | Line 1145 | void sheepshaver_cpu::execute_native_op(
1145		case NATIVE_ETHER_RSRV:
1146		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1147		break;
1226	–	#else
1227	–	case NATIVE_ETHER_INIT:
1228	–	// FIXME: needs more complicated thunks
1229	–	gpr(3) = false;
1230	–	break;
1231	–	#endif
1148		case NATIVE_SYNC_HOOK:
1149		gpr(3) = NQD_sync_hook(gpr(3));
1150		break;
#	Line 1283 | Line 1199 | void sheepshaver_cpu::execute_native_op(
1199		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1200		break;
1201		}
1286	–	case NATIVE_DISABLE_INTERRUPT:
1287	–	DisableInterrupt();
1288	–	break;
1289	–	case NATIVE_ENABLE_INTERRUPT:
1290	–	EnableInterrupt();
1291	–	break;
1202		case NATIVE_MAKE_EXECUTABLE:
1203	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1203	>	MakeExecutable(0, gpr(4), gpr(5));
1204		break;
1205		case NATIVE_CHECK_LOAD_INVOC:
1206		check_load_invoc(gpr(3), gpr(4), gpr(5));
#	Line 1314 | Line 1224 | void sheepshaver_cpu::execute_native_op(
1224
1225		void Execute68k(uint32 pc, M68kRegisters *r)
1226		{
1227	<	current_cpu->execute_68k(pc, r);
1227	>	ppc_cpu->execute_68k(pc, r);
1228		}
1229
1230		/*
#	Line 1337 | Line 1247 | void Execute68kTrap(uint16 trap, M68kReg
1247
1248		uint32 call_macos(uint32 tvect)
1249		{
1250	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1250	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1251		}
1252
1253		uint32 call_macos1(uint32 tvect, uint32 arg1)
1254		{
1255		const uint32 args[] = { arg1 };
1256	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1256	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1257		}
1258
1259		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1260		{
1261		const uint32 args[] = { arg1, arg2 };
1262	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1262	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1263		}
1264
1265		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1266		{
1267		const uint32 args[] = { arg1, arg2, arg3 };
1268	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1268	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1269		}
1270
1271		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1272		{
1273		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1274	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1274	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1275		}
1276
1277		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1278		{
1279		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1280	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1280	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1281		}
1282
1283		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1284		{
1285		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1286	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1286	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1287		}
1288
1289		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1290		{
1291		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1292	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1292	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1293		}
1294
1295		/*
#	Line 1388 | Line 1298 | uint32 call_macos7(uint32 tvect, uint32
1298
1299		void get_resource(void)
1300		{
1301	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1301	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1302		}
1303
1304		void get_1_resource(void)
1305		{
1306	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1306	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1307		}
1308
1309		void get_ind_resource(void)
1310		{
1311	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1311	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1312		}
1313
1314		void get_1_ind_resource(void)
1315		{
1316	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1316	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1317		}
1318
1319		void r_get_resource(void)
1320		{
1321	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1321	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1322		}

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