| 93 |
|
// PowerPC EmulOp to exit from emulation looop |
| 94 |
|
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
| 95 |
|
|
| 96 |
– |
// Enable interrupt routine safety checks? |
| 97 |
– |
#define SAFE_INTERRUPT_PPC 1 |
| 98 |
– |
|
| 96 |
|
// Enable Execute68k() safety checks? |
| 97 |
|
#define SAFE_EXEC_68K 1 |
| 98 |
|
|
| 139 |
|
void init_decoder(); |
| 140 |
|
void execute_sheep(uint32 opcode); |
| 141 |
|
|
| 145 |
– |
// CPU context to preserve on interrupt |
| 146 |
– |
class interrupt_context { |
| 147 |
– |
uint32 gpr[32]; |
| 148 |
– |
double fpr[32]; |
| 149 |
– |
uint32 pc; |
| 150 |
– |
uint32 lr; |
| 151 |
– |
uint32 ctr; |
| 152 |
– |
uint32 cr; |
| 153 |
– |
uint32 xer; |
| 154 |
– |
uint32 fpscr; |
| 155 |
– |
sheepshaver_cpu *cpu; |
| 156 |
– |
const char *where; |
| 157 |
– |
public: |
| 158 |
– |
interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
| 159 |
– |
~interrupt_context(); |
| 160 |
– |
}; |
| 161 |
– |
|
| 142 |
|
public: |
| 143 |
|
|
| 144 |
|
// Constructor |
| 174 |
|
|
| 175 |
|
// Handle MacOS interrupt |
| 176 |
|
void interrupt(uint32 entry); |
| 197 |
– |
void handle_interrupt(); |
| 177 |
|
|
| 178 |
|
// Make sure the SIGSEGV handler can access CPU registers |
| 179 |
|
friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
| 458 |
|
} |
| 459 |
|
#endif |
| 460 |
|
|
| 482 |
– |
// CPU context to preserve on interrupt |
| 483 |
– |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
| 484 |
– |
{ |
| 485 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
| 486 |
– |
cpu = _cpu; |
| 487 |
– |
where = _where; |
| 488 |
– |
|
| 489 |
– |
// Save interrupt context |
| 490 |
– |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
| 491 |
– |
memcpy(&fpr[0], &cpu->fpr(0), sizeof(fpr)); |
| 492 |
– |
pc = cpu->pc(); |
| 493 |
– |
lr = cpu->lr(); |
| 494 |
– |
ctr = cpu->ctr(); |
| 495 |
– |
cr = cpu->get_cr(); |
| 496 |
– |
xer = cpu->get_xer(); |
| 497 |
– |
fpscr = cpu->fpscr(); |
| 498 |
– |
#endif |
| 499 |
– |
} |
| 500 |
– |
|
| 501 |
– |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
| 502 |
– |
{ |
| 503 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
| 504 |
– |
// Check whether CPU context was preserved by interrupt |
| 505 |
– |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
| 506 |
– |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
| 507 |
– |
for (int i = 0; i < 32; i++) |
| 508 |
– |
if (gpr[i] != cpu->gpr(i)) |
| 509 |
– |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
| 510 |
– |
} |
| 511 |
– |
if (memcmp(&fpr[0], &cpu->fpr(0), sizeof(fpr)) != 0) { |
| 512 |
– |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
| 513 |
– |
for (int i = 0; i < 32; i++) |
| 514 |
– |
if (fpr[i] != cpu->fpr(i)) |
| 515 |
– |
printf(" r%d: %f -> %f\n", i, fpr[i], cpu->fpr(i)); |
| 516 |
– |
} |
| 517 |
– |
if (pc != cpu->pc()) |
| 518 |
– |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
| 519 |
– |
if (lr != cpu->lr()) |
| 520 |
– |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
| 521 |
– |
if (ctr != cpu->ctr()) |
| 522 |
– |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
| 523 |
– |
if (cr != cpu->get_cr()) |
| 524 |
– |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
| 525 |
– |
if (xer != cpu->get_xer()) |
| 526 |
– |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
| 527 |
– |
if (fpscr != cpu->fpscr()) |
| 528 |
– |
printf("FATAL: %s: interrupt clobbers FPSCR\n", where); |
| 529 |
– |
#endif |
| 530 |
– |
} |
| 531 |
– |
|
| 461 |
|
// Handle MacOS interrupt |
| 462 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
| 463 |
|
{ |
| 466 |
|
const clock_t interrupt_start = clock(); |
| 467 |
|
#endif |
| 468 |
|
|
| 540 |
– |
#if SAFE_INTERRUPT_PPC |
| 541 |
– |
static int depth = 0; |
| 542 |
– |
if (depth != 0) |
| 543 |
– |
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
| 544 |
– |
depth++; |
| 545 |
– |
#endif |
| 546 |
– |
|
| 469 |
|
// Save program counters and branch registers |
| 470 |
|
uint32 saved_pc = pc(); |
| 471 |
|
uint32 saved_lr = lr(); |
| 519 |
|
#if EMUL_TIME_STATS |
| 520 |
|
interrupt_time += (clock() - interrupt_start); |
| 521 |
|
#endif |
| 600 |
– |
|
| 601 |
– |
#if SAFE_INTERRUPT_PPC |
| 602 |
– |
depth--; |
| 603 |
– |
#endif |
| 522 |
|
} |
| 523 |
|
|
| 524 |
|
// Execute 68k routine |
| 918 |
|
#endif |
| 919 |
|
} |
| 920 |
|
|
| 921 |
< |
void sheepshaver_cpu::handle_interrupt(void) |
| 921 |
> |
void HandleInterrupt(powerpc_registers *r) |
| 922 |
|
{ |
| 923 |
|
#ifdef USE_SDL_VIDEO |
| 924 |
|
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
| 929 |
|
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
| 930 |
|
return; |
| 931 |
|
|
| 932 |
< |
// Current interrupt nest level |
| 1015 |
< |
static int interrupt_depth = 0; |
| 1016 |
< |
++interrupt_depth; |
| 932 |
> |
// Increment interrupt counter |
| 933 |
|
#if EMUL_TIME_STATS |
| 934 |
|
interrupt_count++; |
| 935 |
|
#endif |
| 936 |
|
|
| 1021 |
– |
// Disable MacOS stack sniffer |
| 1022 |
– |
WriteMacInt32(0x110, 0); |
| 1023 |
– |
|
| 937 |
|
// Interrupt action depends on current run mode |
| 938 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
| 939 |
|
case MODE_68K: |
| 940 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
| 941 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
| 942 |
< |
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
| 942 |
> |
r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2])); |
| 943 |
|
break; |
| 944 |
|
|
| 945 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
| 946 |
|
case MODE_NATIVE: |
| 947 |
|
// 68k emulator inactive, in nanokernel? |
| 948 |
< |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
| 1036 |
< |
interrupt_context ctx(this, "PowerPC mode"); |
| 948 |
> |
if (r->gpr[1] != KernelDataAddr) { |
| 949 |
|
|
| 950 |
|
// Prepare for 68k interrupt level 1 |
| 951 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
| 967 |
|
case MODE_EMUL_OP: |
| 968 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
| 969 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
| 1058 |
– |
interrupt_context ctx(this, "68k mode"); |
| 970 |
|
#if EMUL_TIME_STATS |
| 971 |
|
const clock_t interrupt_start = clock(); |
| 972 |
|
#endif |
| 1003 |
|
break; |
| 1004 |
|
#endif |
| 1005 |
|
} |
| 1095 |
– |
|
| 1096 |
– |
// We are done with this interrupt |
| 1097 |
– |
--interrupt_depth; |
| 1006 |
|
} |
| 1007 |
|
|
| 1008 |
|
static void get_resource(void); |
