[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.51 by gbeauche, 2004-07-11T08:12:21Z vs.
Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 42 \| Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48
49		#ifdef USE_SDL_VIDEO
50		#include <SDL_events.h>
#	Line 90 \| Line 93 \| extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
95
93	–	// Enable interrupt routine safety checks?
94	–	#define SAFE_INTERRUPT_PPC 1
95	–
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
98
#	Line 106 \| Line 106 \| const uint32 POWERPC_EXEC_RETURN = POWER
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110
111		// SIGSEGV handler
112		sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
#	Line 139 \| Line 139 \| class sheepshaver_cpu
139		void init_decoder();
140		void execute_sheep(uint32 opcode);
141
142	–	// CPU context to preserve on interrupt
143	–	class interrupt_context {
144	–	uint32 gpr[32];
145	–	uint32 pc;
146	–	uint32 lr;
147	–	uint32 ctr;
148	–	uint32 cr;
149	–	uint32 xer;
150	–	sheepshaver_cpu *cpu;
151	–	const char *where;
152	–	public:
153	–	interrupt_context(sheepshaver_cpu _cpu, const char _where);
154	–	~interrupt_context();
155	–	};
156	–
142		public:
143
144		// Constructor
#	Line 180 \| Line 165 \| public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169		// Compile one instruction
170		virtual int compile1(codegen_context_t & cg_context);
171	<
171	>	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
191	–	void handle_interrupt();
177
178		// Make sure the SIGSEGV handler can access CPU registers
179		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180	+
181	+	// Memory allocator returning areas aligned on 16-byte boundaries
182	+	void *operator new(size_t size);
183	+	void operator delete(void *p);
184		};
185
186		// Memory allocator returning areas aligned on 16-byte boundaries
187	<	void *operator new(size_t size)
187	>	void *sheepshaver_cpu::operator new(size_t size)
188		{
189		void *p;
190
#	Line 214 \| Line 203 \| *void operator new(size_t size)**
203		return p;
204		}
205
206	<	void operator delete(void *p)
206	>	void sheepshaver_cpu::operator delete(void *p)
207		{
208		#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
209		#if defined(__GLIBC__)
#	Line 318 \| Line 307 \| void sheepshaver_cpu::execute_sheep(uint
307		}
308
309		// Compile one instruction
310	+	#if PPC_ENABLE_JIT
311		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
312		{
323	–	#if PPC_ENABLE_JIT
313		const instr_info_t *ii = cg_context.instr_info;
314		if (ii->mnemo != PPC_I(SHEEP))
315		return COMPILE_FAILURE;
#	Line 466 \| Line 455 \| int sheepshaver_cpu::compile1(codegen_co
455		}
456		}
457		return status;
469	–	#endif
470	–	return COMPILE_FAILURE;
471	–	}
472	–
473	–	// CPU context to preserve on interrupt
474	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu _cpu, const char _where)
475	–	{
476	–	#if SAFE_INTERRUPT_PPC >= 2
477	–	cpu = _cpu;
478	–	where = _where;
479	–
480	–	// Save interrupt context
481	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
482	–	pc = cpu->pc();
483	–	lr = cpu->lr();
484	–	ctr = cpu->ctr();
485	–	cr = cpu->get_cr();
486	–	xer = cpu->get_xer();
487	–	#endif
458		}
489	–
490	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
491	–	{
492	–	#if SAFE_INTERRUPT_PPC >= 2
493	–	// Check whether CPU context was preserved by interrupt
494	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
495	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
496	–	for (int i = 0; i < 32; i++)
497	–	if (gpr[i] != cpu->gpr(i))
498	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
499	–	}
500	–	if (pc != cpu->pc())
501	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
502	–	if (lr != cpu->lr())
503	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
504	–	if (ctr != cpu->ctr())
505	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
506	–	if (cr != cpu->get_cr())
507	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
508	–	if (xer != cpu->get_xer())
509	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
459		#endif
511	–	}
460
461		// Handle MacOS interrupt
462		void sheepshaver_cpu::interrupt(uint32 entry)
#	Line 518 \| Line 466 \| void sheepshaver_cpu::interrupt(uint32 e
466		const clock_t interrupt_start = clock();
467		#endif
468
521	–	#if SAFE_INTERRUPT_PPC
522	–	static int depth = 0;
523	–	if (depth != 0)
524	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
525	–	depth++;
526	–	#endif
527	–
469		// Save program counters and branch registers
470		uint32 saved_pc = pc();
471		uint32 saved_lr = lr();
#	Line 578 \| Line 519 \| void sheepshaver_cpu::interrupt(uint32 e
519		#if EMUL_TIME_STATS
520		interrupt_time += (clock() - interrupt_start);
521		#endif
581	–
582	–	#if SAFE_INTERRUPT_PPC
583	–	depth--;
584	–	#endif
522		}
523
524		// Execute 68k routine
#	Line 812 \| Line 749 \| sigsegv_return_t sigsegv_handler(sigsegv
749		const uintptr addr = (uintptr)fault_address;
750		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
751		// Ignore writes to ROM
752	<	if ((addr - ROM_BASE) < ROM_SIZE)
752	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
753		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
754
755		// Get program counter of target CPU
#	Line 872 \| Line 809 \| sigsegv_return_t sigsegv_handler(sigsegv
809
810		void init_emul_ppc(void)
811		{
812	+	// Get pointer to KernelData in host address space
813	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
814	+
815		// Initialize main CPU emulator
816		ppc_cpu = new sheepshaver_cpu();
817		ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
#	Line 978 \| Line 918 \| void TriggerInterrupt(void)
918		#endif
919		}
920
921	<	void sheepshaver_cpu::handle_interrupt(void)
921	>	void HandleInterrupt(powerpc_registers *r)
922		{
923		#ifdef USE_SDL_VIDEO
924		// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
#	Line 989 \| Line 929 \| void sheepshaver_cpu::handle_interrupt(v
929		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
930		return;
931
932	+	// Do nothing if there is no pending interrupt
933	+	if (InterruptFlags == 0)
934	+	return;
935	+
936		// Current interrupt nest level
937		static int interrupt_depth = 0;
938		++interrupt_depth;
#	Line 996 \| Line 940 \| void sheepshaver_cpu::handle_interrupt(v
940		interrupt_count++;
941		#endif
942
999	–	// Disable MacOS stack sniffer
1000	–	WriteMacInt32(0x110, 0);
1001	–
943		// Interrupt action depends on current run mode
944		switch (ReadMacInt32(XLM_RUN_MODE)) {
945		case MODE_68K:
946		// 68k emulator active, trigger 68k interrupt level 1
947		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
948	<	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
948	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
949		break;
950
951		#if INTERRUPTS_IN_NATIVE_MODE
952		case MODE_NATIVE:
953		// 68k emulator inactive, in nanokernel?
954	<	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1014	<	interrupt_context ctx(this, "PowerPC mode");
954	>	if (r->gpr[1] != KernelDataAddr && interrupt_depth == 1) {
955
956		// Prepare for 68k interrupt level 1
957		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1033 \| Line 973 \| void sheepshaver_cpu::handle_interrupt(v
973		case MODE_EMUL_OP:
974		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
975		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1036	–	interrupt_context ctx(this, "68k mode");
976		#if EMUL_TIME_STATS
977		const clock_t interrupt_start = clock();
978		#endif
#	Line 1042 \| Line 981 \| void sheepshaver_cpu::handle_interrupt(v
981		M68kRegisters r;
982		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
983		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
984	<	static const uint8 proc[] = {
984	>	static const uint8 proc_template[] = {
985		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
986		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
987		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 1050 \| Line 989 \| void sheepshaver_cpu::handle_interrupt(v
989		0x4e, 0xd0, // jmp (a0)
990		M68K_RTS >> 8, M68K_RTS & 0xff // @1
991		};
992	<	Execute68k((uint32)proc, &r);
992	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
993	>	Execute68k(proc, &r);
994		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
995		#else
996		// Only update cursor
#	Line 1099 \| Line 1039 \| void sheepshaver_cpu::execute_native_op(
1039		VideoVBL();
1040		break;
1041		case NATIVE_VIDEO_DO_DRIVER_IO:
1042	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void )gpr(3), (void )gpr(4),
1103	<	(void *)gpr(5), gpr(6), gpr(7));
1042	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1043		break;
1105	–	#ifdef WORDS_BIGENDIAN
1044		case NATIVE_ETHER_IRQ:
1045		EtherIRQ();
1046		break;
#	Line 1124 \| Line 1062 \| void sheepshaver_cpu::execute_native_op(
1062		case NATIVE_ETHER_RSRV:
1063		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1064		break;
1127	–	#else
1128	–	case NATIVE_ETHER_INIT:
1129	–	// FIXME: needs more complicated thunks
1130	–	gpr(3) = false;
1131	–	break;
1132	–	#endif
1065		case NATIVE_SYNC_HOOK:
1066		gpr(3) = NQD_sync_hook(gpr(3));
1067		break;
#	Line 1185 \| Line 1117 \| void sheepshaver_cpu::execute_native_op(
1117		break;
1118		}
1119		case NATIVE_MAKE_EXECUTABLE:
1120	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1120	>	MakeExecutable(0, gpr(4), gpr(5));
1121		break;
1122		case NATIVE_CHECK_LOAD_INVOC:
1123		check_load_invoc(gpr(3), gpr(4), gpr(5));

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.51 by gbeauche, 2004-07-11T08:12:21Z vs. Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.51 by gbeauche, 2004-07-11T08:12:21Z vs.
Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z