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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
Revision: 1.13
Committed: 2003-11-02T14:48:17Z (20 years, 6 months ago) by gbeauche
Branch: MAIN
Changes since 1.12: +1 -1 lines
Log Message:
Optimized pointers to non virtual member functions. This reduces space
and overhead since runtime checks are eliminated. Actually, it yields
up to 10% performance improvement with specialized decoders.

File Contents

# Content
1 /*
2 * sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3 *
4 * SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #include "sysdeps.h"
22 #include "cpu_emulation.h"
23 #include "main.h"
24 #include "prefs.h"
25 #include "xlowmem.h"
26 #include "emul_op.h"
27 #include "rom_patches.h"
28 #include "macos_util.h"
29 #include "block-alloc.hpp"
30 #include "sigsegv.h"
31 #include "cpu/ppc/ppc-cpu.hpp"
32 #include "cpu/ppc/ppc-operations.hpp"
33
34 // Used for NativeOp trampolines
35 #include "video.h"
36 #include "name_registry.h"
37 #include "serial.h"
38
39 #include <stdio.h>
40
41 #if ENABLE_MON
42 #include "mon.h"
43 #include "mon_disass.h"
44 #endif
45
46 #define DEBUG 0
47 #include "debug.h"
48
49 static void enter_mon(void)
50 {
51 // Start up mon in real-mode
52 #if ENABLE_MON
53 char *arg[4] = {"mon", "-m", "-r", NULL};
54 mon(3, arg);
55 #endif
56 }
57
58 // Enable multicore (main/interrupts) cpu emulation?
59 #define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
60
61 // Enable Execute68k() safety checks?
62 #define SAFE_EXEC_68K 1
63
64 // Save FP state in Execute68k()?
65 #define SAVE_FP_EXEC_68K 1
66
67 // Interrupts in EMUL_OP mode?
68 #define INTERRUPTS_IN_EMUL_OP_MODE 1
69
70 // Interrupts in native mode?
71 #define INTERRUPTS_IN_NATIVE_MODE 1
72
73 // Pointer to Kernel Data
74 static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
75
76
77 /**
78 * PowerPC emulator glue with special 'sheep' opcodes
79 **/
80
81 class sheepshaver_cpu
82 : public powerpc_cpu
83 {
84 void init_decoder();
85 void execute_sheep(uint32 opcode);
86
87 public:
88
89 // Constructor
90 sheepshaver_cpu();
91
92 // Condition Register accessors
93 uint32 get_cr() const { return cr().get(); }
94 void set_cr(uint32 v) { cr().set(v); }
95
96 // Execution loop
97 void execute(uint32 entry, bool enable_cache = false);
98
99 // Execute 68k routine
100 void execute_68k(uint32 entry, M68kRegisters *r);
101
102 // Execute ppc routine
103 void execute_ppc(uint32 entry);
104
105 // Execute MacOS/PPC code
106 uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
107
108 // Resource manager thunk
109 void get_resource(uint32 old_get_resource);
110
111 // Handle MacOS interrupt
112 void interrupt(uint32 entry);
113 void handle_interrupt();
114
115 // Lazy memory allocator (one item at a time)
116 void *operator new(size_t size)
117 { return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
118 void operator delete(void *p)
119 { allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
120 // FIXME: really make surre array allocation fail at link time?
121 void *operator new[](size_t);
122 void operator delete[](void *p);
123 };
124
125 lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
126
127 sheepshaver_cpu::sheepshaver_cpu()
128 : powerpc_cpu()
129 {
130 init_decoder();
131 }
132
133 void sheepshaver_cpu::init_decoder()
134 {
135 #ifndef PPC_NO_STATIC_II_INDEX_TABLE
136 static bool initialized = false;
137 if (initialized)
138 return;
139 initialized = true;
140 #endif
141
142 static const instr_info_t sheep_ii_table[] = {
143 { "sheep",
144 (execute_pmf)&sheepshaver_cpu::execute_sheep,
145 NULL,
146 D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
147 }
148 };
149
150 const int ii_count = sizeof(sheep_ii_table)/sizeof(sheep_ii_table[0]);
151 D(bug("SheepShaver extra decode table has %d entries\n", ii_count));
152
153 for (int i = 0; i < ii_count; i++) {
154 const instr_info_t * ii = &sheep_ii_table[i];
155 init_decoder_entry(ii);
156 }
157 }
158
159 // Forward declaration for native opcode handler
160 static void NativeOp(int selector);
161
162 /* NativeOp instruction format:
163 +------------+--------------------------+--+----------+------------+
164 | 6 | |FN| OP | 2 |
165 +------------+--------------------------+--+----------+------------+
166 0 5 |6 19 20 21 25 26 31
167 */
168
169 typedef bit_field< 20, 20 > FN_field;
170 typedef bit_field< 21, 25 > NATIVE_OP_field;
171 typedef bit_field< 26, 31 > EMUL_OP_field;
172
173 // Execute SheepShaver instruction
174 void sheepshaver_cpu::execute_sheep(uint32 opcode)
175 {
176 // D(bug("Extended opcode %08x at %08x (68k pc %08x)\n", opcode, pc(), gpr(24)));
177 assert((((opcode >> 26) & 0x3f) == 6) && OP_MAX <= 64 + 3);
178
179 switch (opcode & 0x3f) {
180 case 0: // EMUL_RETURN
181 QuitEmulator();
182 break;
183
184 case 1: // EXEC_RETURN
185 spcflags().set(SPCFLAG_CPU_EXEC_RETURN);
186 break;
187
188 case 2: // EXEC_NATIVE
189 NativeOp(NATIVE_OP_field::extract(opcode));
190 if (FN_field::test(opcode))
191 pc() = lr();
192 else
193 pc() += 4;
194 break;
195
196 default: { // EMUL_OP
197 M68kRegisters r68;
198 WriteMacInt32(XLM_68K_R25, gpr(25));
199 WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
200 for (int i = 0; i < 8; i++)
201 r68.d[i] = gpr(8 + i);
202 for (int i = 0; i < 7; i++)
203 r68.a[i] = gpr(16 + i);
204 r68.a[7] = gpr(1);
205 EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
206 for (int i = 0; i < 8; i++)
207 gpr(8 + i) = r68.d[i];
208 for (int i = 0; i < 7; i++)
209 gpr(16 + i) = r68.a[i];
210 gpr(1) = r68.a[7];
211 WriteMacInt32(XLM_RUN_MODE, MODE_68K);
212 pc() += 4;
213 break;
214 }
215 }
216 }
217
218 // Execution loop
219 void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
220 {
221 powerpc_cpu::execute(entry, enable_cache);
222 }
223
224 // Handle MacOS interrupt
225 void sheepshaver_cpu::interrupt(uint32 entry)
226 {
227 #if !MULTICORE_CPU
228 // Save program counters and branch registers
229 uint32 saved_pc = pc();
230 uint32 saved_lr = lr();
231 uint32 saved_ctr= ctr();
232 uint32 saved_sp = gpr(1);
233 #endif
234
235 // Initialize stack pointer to SheepShaver alternate stack base
236 gpr(1) = SheepStack1Base - 64;
237
238 // Build trampoline to return from interrupt
239 uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
240
241 // Prepare registers for nanokernel interrupt routine
242 kernel_data->v[0x004 >> 2] = htonl(gpr(1));
243 kernel_data->v[0x018 >> 2] = htonl(gpr(6));
244
245 gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
246 assert(gpr(6) != 0);
247 WriteMacInt32(gpr(6) + 0x13c, gpr(7));
248 WriteMacInt32(gpr(6) + 0x144, gpr(8));
249 WriteMacInt32(gpr(6) + 0x14c, gpr(9));
250 WriteMacInt32(gpr(6) + 0x154, gpr(10));
251 WriteMacInt32(gpr(6) + 0x15c, gpr(11));
252 WriteMacInt32(gpr(6) + 0x164, gpr(12));
253 WriteMacInt32(gpr(6) + 0x16c, gpr(13));
254
255 gpr(1) = KernelDataAddr;
256 gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
257 gpr(8) = 0;
258 gpr(10) = (uint32)trampoline;
259 gpr(12) = (uint32)trampoline;
260 gpr(13) = get_cr();
261
262 // rlwimi. r7,r7,8,0,0
263 uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
264 record_cr0(result);
265 gpr(7) = result;
266
267 gpr(11) = 0xf072; // MSR (SRR1)
268 cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000));
269
270 // Enter nanokernel
271 execute(entry);
272
273 #if !MULTICORE_CPU
274 // Restore program counters and branch registers
275 pc() = saved_pc;
276 lr() = saved_lr;
277 ctr()= saved_ctr;
278 gpr(1) = saved_sp;
279 #endif
280 }
281
282 // Execute 68k routine
283 void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
284 {
285 #if SAFE_EXEC_68K
286 if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
287 printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
288 #endif
289
290 // Save program counters and branch registers
291 uint32 saved_pc = pc();
292 uint32 saved_lr = lr();
293 uint32 saved_ctr= ctr();
294 uint32 saved_cr = get_cr();
295
296 // Create MacOS stack frame
297 // FIXME: make sure MacOS doesn't expect PPC registers to live on top
298 uint32 sp = gpr(1);
299 gpr(1) -= 56;
300 WriteMacInt32(gpr(1), sp);
301
302 // Save PowerPC registers
303 uint32 saved_GPRs[19];
304 memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
305 #if SAVE_FP_EXEC_68K
306 double saved_FPRs[18];
307 memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
308 #endif
309
310 // Setup registers for 68k emulator
311 cr().set(CR_SO_field<2>::mask()); // Supervisor mode
312 for (int i = 0; i < 8; i++) // d[0]..d[7]
313 gpr(8 + i) = r->d[i];
314 for (int i = 0; i < 7; i++) // a[0]..a[6]
315 gpr(16 + i) = r->a[i];
316 gpr(23) = 0;
317 gpr(24) = entry;
318 gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR
319 gpr(26) = 0;
320 gpr(28) = 0; // VBR
321 gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table
322 gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator
323 gpr(31) = KernelDataAddr + 0x1000;
324
325 // Push return address (points to EXEC_RETURN opcode) on stack
326 gpr(1) -= 4;
327 WriteMacInt32(gpr(1), XLM_EXEC_RETURN_OPCODE);
328
329 // Rentering 68k emulator
330 WriteMacInt32(XLM_RUN_MODE, MODE_68K);
331
332 // Set r0 to 0 for 68k emulator
333 gpr(0) = 0;
334
335 // Execute 68k opcode
336 uint32 opcode = ReadMacInt16(gpr(24));
337 gpr(27) = (int32)(int16)ReadMacInt16(gpr(24) += 2);
338 gpr(29) += opcode * 8;
339 execute(gpr(29));
340
341 // Save r25 (contains current 68k interrupt level)
342 WriteMacInt32(XLM_68K_R25, gpr(25));
343
344 // Reentering EMUL_OP mode
345 WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
346
347 // Save 68k registers
348 for (int i = 0; i < 8; i++) // d[0]..d[7]
349 r->d[i] = gpr(8 + i);
350 for (int i = 0; i < 7; i++) // a[0]..a[6]
351 r->a[i] = gpr(16 + i);
352
353 // Restore PowerPC registers
354 memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
355 #if SAVE_FP_EXEC_68K
356 memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
357 #endif
358
359 // Cleanup stack
360 gpr(1) += 56;
361
362 // Restore program counters and branch registers
363 pc() = saved_pc;
364 lr() = saved_lr;
365 ctr()= saved_ctr;
366 set_cr(saved_cr);
367 }
368
369 // Call MacOS PPC code
370 uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
371 {
372 // Save program counters and branch registers
373 uint32 saved_pc = pc();
374 uint32 saved_lr = lr();
375 uint32 saved_ctr= ctr();
376
377 // Build trampoline with EXEC_RETURN
378 uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
379 lr() = (uint32)trampoline;
380
381 gpr(1) -= 64; // Create stack frame
382 uint32 proc = ReadMacInt32(tvect); // Get routine address
383 uint32 toc = ReadMacInt32(tvect + 4); // Get TOC pointer
384
385 // Save PowerPC registers
386 uint32 regs[8];
387 regs[0] = gpr(2);
388 for (int i = 0; i < nargs; i++)
389 regs[i + 1] = gpr(i + 3);
390
391 // Prepare and call MacOS routine
392 gpr(2) = toc;
393 for (int i = 0; i < nargs; i++)
394 gpr(i + 3) = args[i];
395 execute(proc);
396 uint32 retval = gpr(3);
397
398 // Restore PowerPC registers
399 for (int i = 0; i <= nargs; i++)
400 gpr(i + 2) = regs[i];
401
402 // Cleanup stack
403 gpr(1) += 64;
404
405 // Restore program counters and branch registers
406 pc() = saved_pc;
407 lr() = saved_lr;
408 ctr()= saved_ctr;
409
410 return retval;
411 }
412
413 // Execute ppc routine
414 inline void sheepshaver_cpu::execute_ppc(uint32 entry)
415 {
416 // Save branch registers
417 uint32 saved_lr = lr();
418
419 const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
420 lr() = (uint32)trampoline;
421
422 execute(entry);
423
424 // Restore branch registers
425 lr() = saved_lr;
426 }
427
428 // Resource Manager thunk
429 extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
430
431 inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
432 {
433 uint32 type = gpr(3);
434 int16 id = gpr(4);
435
436 // Create stack frame
437 gpr(1) -= 56;
438
439 // Call old routine
440 execute_ppc(old_get_resource);
441
442 // Call CheckLoad()
443 uint32 handle = gpr(3);
444 check_load_invoc(type, id, handle);
445 gpr(3) = handle;
446
447 // Cleanup stack
448 gpr(1) += 56;
449 }
450
451
452 /**
453 * SheepShaver CPU engine interface
454 **/
455
456 static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
457 static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
458 static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
459
460 void FlushCodeCache(uintptr start, uintptr end)
461 {
462 D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
463 main_cpu->invalidate_cache_range(start, end);
464 #if MULTICORE_CPU
465 interrupt_cpu->invalidate_cache_range(start, end);
466 #endif
467 }
468
469 static inline void cpu_push(sheepshaver_cpu *new_cpu)
470 {
471 #if MULTICORE_CPU
472 current_cpu = new_cpu;
473 #endif
474 }
475
476 static inline void cpu_pop()
477 {
478 #if MULTICORE_CPU
479 current_cpu = main_cpu;
480 #endif
481 }
482
483 // Dump PPC registers
484 static void dump_registers(void)
485 {
486 current_cpu->dump_registers();
487 }
488
489 // Dump log
490 static void dump_log(void)
491 {
492 current_cpu->dump_log();
493 }
494
495 /*
496 * Initialize CPU emulation
497 */
498
499 static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
500 {
501 #if ENABLE_VOSF
502 // Handle screen fault
503 extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
504 if (Screen_fault_handler(fault_address, fault_instruction))
505 return SIGSEGV_RETURN_SUCCESS;
506 #endif
507
508 const uintptr addr = (uintptr)fault_address;
509 #if HAVE_SIGSEGV_SKIP_INSTRUCTION
510 // Ignore writes to ROM
511 if ((addr - ROM_BASE) < ROM_SIZE)
512 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
513
514 // Ignore all other faults, if requested
515 if (PrefsFindBool("ignoresegv"))
516 return SIGSEGV_RETURN_FAILURE;
517 #else
518 #error "FIXME: You don't have the capability to skip instruction within signal handlers"
519 #endif
520
521 printf("SIGSEGV\n");
522 printf(" pc %p\n", fault_instruction);
523 printf(" ea %p\n", fault_address);
524 printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
525 dump_registers();
526 current_cpu->dump_log();
527 enter_mon();
528 QuitEmulator();
529
530 return SIGSEGV_RETURN_FAILURE;
531 }
532
533 void init_emul_ppc(void)
534 {
535 // Initialize main CPU emulator
536 main_cpu = new sheepshaver_cpu();
537 main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
538 WriteMacInt32(XLM_RUN_MODE, MODE_68K);
539
540 #if MULTICORE_CPU
541 // Initialize alternate CPU emulator to handle interrupts
542 interrupt_cpu = new sheepshaver_cpu();
543 #endif
544
545 // Install the handler for SIGSEGV
546 sigsegv_install_handler(sigsegv_handler);
547
548 #if ENABLE_MON
549 // Install "regs" command in cxmon
550 mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
551 mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n");
552 #endif
553 }
554
555 /*
556 * Emulation loop
557 */
558
559 void emul_ppc(uint32 entry)
560 {
561 current_cpu = main_cpu;
562 #if DEBUG
563 current_cpu->start_log();
564 #endif
565 // start emulation loop and enable code translation or caching
566 current_cpu->execute(entry, true);
567 }
568
569 /*
570 * Handle PowerPC interrupt
571 */
572
573 #if ASYNC_IRQ
574 void HandleInterrupt(void)
575 {
576 main_cpu->handle_interrupt();
577 }
578 #else
579 void TriggerInterrupt(void)
580 {
581 #if 0
582 WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
583 #else
584 // Trigger interrupt to main cpu only
585 if (main_cpu)
586 main_cpu->trigger_interrupt();
587 #endif
588 }
589 #endif
590
591 void sheepshaver_cpu::handle_interrupt(void)
592 {
593 // Do nothing if interrupts are disabled
594 if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
595 return;
596
597 // Do nothing if there is no interrupt pending
598 if (InterruptFlags == 0)
599 return;
600
601 // Disable MacOS stack sniffer
602 WriteMacInt32(0x110, 0);
603
604 // Interrupt action depends on current run mode
605 switch (ReadMacInt32(XLM_RUN_MODE)) {
606 case MODE_68K:
607 // 68k emulator active, trigger 68k interrupt level 1
608 assert(current_cpu == main_cpu);
609 WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
610 set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
611 break;
612
613 #if INTERRUPTS_IN_NATIVE_MODE
614 case MODE_NATIVE:
615 // 68k emulator inactive, in nanokernel?
616 assert(current_cpu == main_cpu);
617 if (gpr(1) != KernelDataAddr) {
618 // Prepare for 68k interrupt level 1
619 WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
620 WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
621 ReadMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc)
622 | tswap32(kernel_data->v[0x674 >> 2]));
623
624 // Execute nanokernel interrupt routine (this will activate the 68k emulator)
625 DisableInterrupt();
626 cpu_push(interrupt_cpu);
627 if (ROMType == ROMTYPE_NEWWORLD)
628 current_cpu->interrupt(ROM_BASE + 0x312b1c);
629 else
630 current_cpu->interrupt(ROM_BASE + 0x312a3c);
631 cpu_pop();
632 }
633 break;
634 #endif
635
636 #if INTERRUPTS_IN_EMUL_OP_MODE
637 case MODE_EMUL_OP:
638 // 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
639 if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
640 #if 1
641 // Execute full 68k interrupt routine
642 M68kRegisters r;
643 uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
644 WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
645 static const uint8 proc[] = {
646 0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
647 0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
648 0x40, 0xe7, // move sr,-(sp) (saved SR)
649 0x20, 0x78, 0x00, 0x064, // move.l $64,a0
650 0x4e, 0xd0, // jmp (a0)
651 M68K_RTS >> 8, M68K_RTS & 0xff // @1
652 };
653 Execute68k((uint32)proc, &r);
654 WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
655 #else
656 // Only update cursor
657 if (HasMacStarted()) {
658 if (InterruptFlags & INTFLAG_VIA) {
659 ClearInterruptFlag(INTFLAG_VIA);
660 ADBInterrupt();
661 ExecutePPC(VideoVBL);
662 }
663 }
664 #endif
665 }
666 break;
667 #endif
668 }
669 }
670
671 /*
672 * Execute NATIVE_OP opcode (called by PowerPC emulator)
673 */
674
675 #define POWERPC_NATIVE_OP_INIT(LR, OP) \
676 tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
677
678 // FIXME: Make sure 32-bit relocations are used
679 const uint32 NativeOpTable[NATIVE_OP_MAX] = {
680 POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
681 POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
682 POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
683 POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
684 POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
685 POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
686 POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
687 POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
688 POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
689 POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
690 POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
691 POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
692 POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
693 POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
694 POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
695 POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
696 POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
697 POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
698 POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
699 POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
700 POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
701 POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
702 POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
703 POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
704 POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
705 POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
706 };
707
708 static void get_resource(void);
709 static void get_1_resource(void);
710 static void get_ind_resource(void);
711 static void get_1_ind_resource(void);
712 static void r_get_resource(void);
713
714 #define GPR(REG) current_cpu->gpr(REG)
715
716 static void NativeOp(int selector)
717 {
718 switch (selector) {
719 case NATIVE_PATCH_NAME_REGISTRY:
720 DoPatchNameRegistry();
721 break;
722 case NATIVE_VIDEO_INSTALL_ACCEL:
723 VideoInstallAccel();
724 break;
725 case NATIVE_VIDEO_VBL:
726 VideoVBL();
727 break;
728 case NATIVE_VIDEO_DO_DRIVER_IO:
729 GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
730 (void *)GPR(5), GPR(6), GPR(7));
731 break;
732 case NATIVE_GET_RESOURCE:
733 get_resource();
734 break;
735 case NATIVE_GET_1_RESOURCE:
736 get_1_resource();
737 break;
738 case NATIVE_GET_IND_RESOURCE:
739 get_ind_resource();
740 break;
741 case NATIVE_GET_1_IND_RESOURCE:
742 get_1_ind_resource();
743 break;
744 case NATIVE_R_GET_RESOURCE:
745 r_get_resource();
746 break;
747 case NATIVE_SERIAL_NOTHING:
748 case NATIVE_SERIAL_OPEN:
749 case NATIVE_SERIAL_PRIME_IN:
750 case NATIVE_SERIAL_PRIME_OUT:
751 case NATIVE_SERIAL_CONTROL:
752 case NATIVE_SERIAL_STATUS:
753 case NATIVE_SERIAL_CLOSE: {
754 typedef int16 (*SerialCallback)(uint32, uint32);
755 static const SerialCallback serial_callbacks[] = {
756 SerialNothing,
757 SerialOpen,
758 SerialPrimeIn,
759 SerialPrimeOut,
760 SerialControl,
761 SerialStatus,
762 SerialClose
763 };
764 GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
765 break;
766 }
767 case NATIVE_DISABLE_INTERRUPT:
768 DisableInterrupt();
769 break;
770 case NATIVE_ENABLE_INTERRUPT:
771 EnableInterrupt();
772 break;
773 case NATIVE_MAKE_EXECUTABLE:
774 MakeExecutable(0, (void *)GPR(4), GPR(5));
775 break;
776 default:
777 printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
778 QuitEmulator();
779 break;
780 }
781 }
782
783 /*
784 * Execute native subroutine (LR must contain return address)
785 */
786
787 void ExecuteNative(int selector)
788 {
789 uint32 tvect[2];
790 tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
791 tvect[1] = 0; // Fake TVECT
792 RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
793 M68kRegisters r;
794 Execute68k((uint32)&desc, &r);
795 }
796
797 /*
798 * Execute 68k subroutine (must be ended with EXEC_RETURN)
799 * This must only be called by the emul_thread when in EMUL_OP mode
800 * r->a[7] is unused, the routine runs on the caller's stack
801 */
802
803 void Execute68k(uint32 pc, M68kRegisters *r)
804 {
805 current_cpu->execute_68k(pc, r);
806 }
807
808 /*
809 * Execute 68k A-Trap from EMUL_OP routine
810 * r->a[7] is unused, the routine runs on the caller's stack
811 */
812
813 void Execute68kTrap(uint16 trap, M68kRegisters *r)
814 {
815 uint16 proc[2];
816 proc[0] = htons(trap);
817 proc[1] = htons(M68K_RTS);
818 Execute68k((uint32)proc, r);
819 }
820
821 /*
822 * Call MacOS PPC code
823 */
824
825 uint32 call_macos(uint32 tvect)
826 {
827 return current_cpu->execute_macos_code(tvect, 0, NULL);
828 }
829
830 uint32 call_macos1(uint32 tvect, uint32 arg1)
831 {
832 const uint32 args[] = { arg1 };
833 return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
834 }
835
836 uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
837 {
838 const uint32 args[] = { arg1, arg2 };
839 return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
840 }
841
842 uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
843 {
844 const uint32 args[] = { arg1, arg2, arg3 };
845 return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
846 }
847
848 uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
849 {
850 const uint32 args[] = { arg1, arg2, arg3, arg4 };
851 return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
852 }
853
854 uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
855 {
856 const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
857 return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
858 }
859
860 uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
861 {
862 const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
863 return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
864 }
865
866 uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
867 {
868 const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
869 return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
870 }
871
872 /*
873 * Resource Manager thunks
874 */
875
876 void get_resource(void)
877 {
878 current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
879 }
880
881 void get_1_resource(void)
882 {
883 current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
884 }
885
886 void get_ind_resource(void)
887 {
888 current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
889 }
890
891 void get_1_ind_resource(void)
892 {
893 current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
894 }
895
896 void r_get_resource(void)
897 {
898 current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
899 }