ViewVC Help
View File | Revision Log | Show Annotations | Revision Graph | Root Listing
root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
Revision: 1.71
Committed: 2006-07-09T12:15:48Z (17 years, 11 months ago) by gbeauche
Branch: MAIN
Changes since 1.70: +4 -4 lines
Log Message:
Remove use of global register A0 (now aliased to T0). This makes it possible
to cache the CPU context pointer to a register and thus rendering generated
code CPU context independent. Not useful to SheepShaver, but it is for
another project for threads emulation on plain x86-32.

Note: AltiVec performance may drop a little on x86 but this will be restored
(and even improved) in the future.

File Contents

# Content
1 /*
2 * sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3 *
4 * SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #include "sysdeps.h"
22 #include "cpu_emulation.h"
23 #include "main.h"
24 #include "prefs.h"
25 #include "xlowmem.h"
26 #include "emul_op.h"
27 #include "rom_patches.h"
28 #include "macos_util.h"
29 #include "block-alloc.hpp"
30 #include "sigsegv.h"
31 #include "cpu/ppc/ppc-cpu.hpp"
32 #include "cpu/ppc/ppc-operations.hpp"
33 #include "cpu/ppc/ppc-instructions.hpp"
34 #include "thunks.h"
35
36 // Used for NativeOp trampolines
37 #include "video.h"
38 #include "name_registry.h"
39 #include "serial.h"
40 #include "ether.h"
41 #include "timer.h"
42
43 #include <stdio.h>
44 #include <stdlib.h>
45 #ifdef HAVE_MALLOC_H
46 #include <malloc.h>
47 #endif
48
49 #ifdef USE_SDL_VIDEO
50 #include <SDL_events.h>
51 #endif
52
53 #if ENABLE_MON
54 #include "mon.h"
55 #include "mon_disass.h"
56 #endif
57
58 #define DEBUG 0
59 #include "debug.h"
60
61 // Emulation time statistics
62 #ifndef EMUL_TIME_STATS
63 #define EMUL_TIME_STATS 0
64 #endif
65
66 #if EMUL_TIME_STATS
67 static clock_t emul_start_time;
68 static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69 static clock_t interrupt_time = 0;
70 static uint32 exec68k_count = 0;
71 static clock_t exec68k_time = 0;
72 static uint32 native_exec_count = 0;
73 static clock_t native_exec_time = 0;
74 static uint32 macos_exec_count = 0;
75 static clock_t macos_exec_time = 0;
76 #endif
77
78 static void enter_mon(void)
79 {
80 // Start up mon in real-mode
81 #if ENABLE_MON
82 char *arg[4] = {"mon", "-m", "-r", NULL};
83 mon(3, arg);
84 #endif
85 }
86
87 // From main_*.cpp
88 extern uintptr SignalStackBase();
89
90 // From rsrc_patches.cpp
91 extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92 extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93
94 // PowerPC EmulOp to exit from emulation looop
95 const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
96
97 // Enable Execute68k() safety checks?
98 #define SAFE_EXEC_68K 1
99
100 // Save FP state in Execute68k()?
101 #define SAVE_FP_EXEC_68K 1
102
103 // Interrupts in EMUL_OP mode?
104 #define INTERRUPTS_IN_EMUL_OP_MODE 1
105
106 // Interrupts in native mode?
107 #define INTERRUPTS_IN_NATIVE_MODE 1
108
109 // Pointer to Kernel Data
110 static KernelData * kernel_data;
111
112 // SIGSEGV handler
113 sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
114
115 #if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
116 // Special trampolines for EmulOp and NativeOp
117 static uint8 *emul_op_trampoline;
118 static uint8 *native_op_trampoline;
119 #endif
120
121 // JIT Compiler enabled?
122 static inline bool enable_jit_p()
123 {
124 return PrefsFindBool("jit");
125 }
126
127
128 /**
129 * PowerPC emulator glue with special 'sheep' opcodes
130 **/
131
132 enum {
133 PPC_I(SHEEP) = PPC_I(MAX),
134 PPC_I(SHEEP_MAX)
135 };
136
137 class sheepshaver_cpu
138 : public powerpc_cpu
139 {
140 void init_decoder();
141 void execute_sheep(uint32 opcode);
142
143 public:
144
145 // Constructor
146 sheepshaver_cpu();
147
148 // CR & XER accessors
149 uint32 get_cr() const { return cr().get(); }
150 void set_cr(uint32 v) { cr().set(v); }
151 uint32 get_xer() const { return xer().get(); }
152 void set_xer(uint32 v) { xer().set(v); }
153
154 // Execute NATIVE_OP routine
155 void execute_native_op(uint32 native_op);
156
157 // Execute EMUL_OP routine
158 void execute_emul_op(uint32 emul_op);
159
160 // Execute 68k routine
161 void execute_68k(uint32 entry, M68kRegisters *r);
162
163 // Execute ppc routine
164 void execute_ppc(uint32 entry);
165
166 // Execute MacOS/PPC code
167 uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
168
169 #if PPC_ENABLE_JIT
170 // Compile one instruction
171 virtual int compile1(codegen_context_t & cg_context);
172 #endif
173 // Resource manager thunk
174 void get_resource(uint32 old_get_resource);
175
176 // Handle MacOS interrupt
177 void interrupt(uint32 entry);
178
179 // Make sure the SIGSEGV handler can access CPU registers
180 friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
181 };
182
183 sheepshaver_cpu::sheepshaver_cpu()
184 : powerpc_cpu(enable_jit_p())
185 {
186 init_decoder();
187 }
188
189 void sheepshaver_cpu::init_decoder()
190 {
191 static const instr_info_t sheep_ii_table[] = {
192 { "sheep",
193 (execute_pmf)&sheepshaver_cpu::execute_sheep,
194 NULL,
195 PPC_I(SHEEP),
196 D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
197 }
198 };
199
200 const int ii_count = sizeof(sheep_ii_table)/sizeof(sheep_ii_table[0]);
201 D(bug("SheepShaver extra decode table has %d entries\n", ii_count));
202
203 for (int i = 0; i < ii_count; i++) {
204 const instr_info_t * ii = &sheep_ii_table[i];
205 init_decoder_entry(ii);
206 }
207 }
208
209 /* NativeOp instruction format:
210 +------------+-------------------------+--+-----------+------------+
211 | 6 | |FN| OP | 2 |
212 +------------+-------------------------+--+-----------+------------+
213 0 5 |6 18 19 20 25 26 31
214 */
215
216 typedef bit_field< 19, 19 > FN_field;
217 typedef bit_field< 20, 25 > NATIVE_OP_field;
218 typedef bit_field< 26, 31 > EMUL_OP_field;
219
220 // Execute EMUL_OP routine
221 void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
222 {
223 M68kRegisters r68;
224 WriteMacInt32(XLM_68K_R25, gpr(25));
225 WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
226 for (int i = 0; i < 8; i++)
227 r68.d[i] = gpr(8 + i);
228 for (int i = 0; i < 7; i++)
229 r68.a[i] = gpr(16 + i);
230 r68.a[7] = gpr(1);
231 uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
232 uint32 saved_xer = get_xer();
233 EmulOp(&r68, gpr(24), emul_op);
234 set_cr(saved_cr);
235 set_xer(saved_xer);
236 for (int i = 0; i < 8; i++)
237 gpr(8 + i) = r68.d[i];
238 for (int i = 0; i < 7; i++)
239 gpr(16 + i) = r68.a[i];
240 gpr(1) = r68.a[7];
241 WriteMacInt32(XLM_RUN_MODE, MODE_68K);
242 }
243
244 // Execute SheepShaver instruction
245 void sheepshaver_cpu::execute_sheep(uint32 opcode)
246 {
247 // D(bug("Extended opcode %08x at %08x (68k pc %08x)\n", opcode, pc(), gpr(24)));
248 assert((((opcode >> 26) & 0x3f) == 6) && OP_MAX <= 64 + 3);
249
250 switch (opcode & 0x3f) {
251 case 0: // EMUL_RETURN
252 QuitEmulator();
253 break;
254
255 case 1: // EXEC_RETURN
256 spcflags().set(SPCFLAG_CPU_EXEC_RETURN);
257 break;
258
259 case 2: // EXEC_NATIVE
260 execute_native_op(NATIVE_OP_field::extract(opcode));
261 if (FN_field::test(opcode))
262 pc() = lr();
263 else
264 pc() += 4;
265 break;
266
267 default: // EMUL_OP
268 execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
269 pc() += 4;
270 break;
271 }
272 }
273
274 // Compile one instruction
275 #if PPC_ENABLE_JIT
276 int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
277 {
278 const instr_info_t *ii = cg_context.instr_info;
279 if (ii->mnemo != PPC_I(SHEEP))
280 return COMPILE_FAILURE;
281
282 int status = COMPILE_FAILURE;
283 powerpc_dyngen & dg = cg_context.codegen;
284 uint32 opcode = cg_context.opcode;
285
286 switch (opcode & 0x3f) {
287 case 0: // EMUL_RETURN
288 dg.gen_invoke(QuitEmulator);
289 status = COMPILE_CODE_OK;
290 break;
291
292 case 1: // EXEC_RETURN
293 dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
294 // Don't check for pending interrupts, we do know we have to
295 // get out of this block ASAP
296 dg.gen_exec_return();
297 status = COMPILE_EPILOGUE_OK;
298 break;
299
300 case 2: { // EXEC_NATIVE
301 uint32 selector = NATIVE_OP_field::extract(opcode);
302 switch (selector) {
303 #if !PPC_REENTRANT_JIT
304 // Filter out functions that may invoke Execute68k() or
305 // CallMacOS(), this would break reentrancy as they could
306 // invalidate the translation cache and even overwrite
307 // continuation code when we are done with them.
308 case NATIVE_PATCH_NAME_REGISTRY:
309 dg.gen_invoke(DoPatchNameRegistry);
310 status = COMPILE_CODE_OK;
311 break;
312 case NATIVE_VIDEO_INSTALL_ACCEL:
313 dg.gen_invoke(VideoInstallAccel);
314 status = COMPILE_CODE_OK;
315 break;
316 case NATIVE_VIDEO_VBL:
317 dg.gen_invoke(VideoVBL);
318 status = COMPILE_CODE_OK;
319 break;
320 case NATIVE_GET_RESOURCE:
321 case NATIVE_GET_1_RESOURCE:
322 case NATIVE_GET_IND_RESOURCE:
323 case NATIVE_GET_1_IND_RESOURCE:
324 case NATIVE_R_GET_RESOURCE: {
325 static const uint32 get_resource_ptr[] = {
326 XLM_GET_RESOURCE,
327 XLM_GET_1_RESOURCE,
328 XLM_GET_IND_RESOURCE,
329 XLM_GET_1_IND_RESOURCE,
330 XLM_R_GET_RESOURCE
331 };
332 uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
333 typedef void (*func_t)(dyngen_cpu_base, uint32);
334 func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
335 dg.gen_invoke_CPU_im(func, old_get_resource);
336 status = COMPILE_CODE_OK;
337 break;
338 }
339 #endif
340 case NATIVE_CHECK_LOAD_INVOC:
341 dg.gen_load_T0_GPR(3);
342 dg.gen_load_T1_GPR(4);
343 dg.gen_se_16_32_T1();
344 dg.gen_load_T2_GPR(5);
345 dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
346 status = COMPILE_CODE_OK;
347 break;
348 case NATIVE_NAMED_CHECK_LOAD_INVOC:
349 dg.gen_load_T0_GPR(3);
350 dg.gen_load_T1_GPR(4);
351 dg.gen_load_T2_GPR(5);
352 dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
353 status = COMPILE_CODE_OK;
354 break;
355 case NATIVE_NQD_SYNC_HOOK:
356 dg.gen_load_T0_GPR(3);
357 dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook);
358 dg.gen_store_T0_GPR(3);
359 status = COMPILE_CODE_OK;
360 break;
361 case NATIVE_NQD_BITBLT_HOOK:
362 dg.gen_load_T0_GPR(3);
363 dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook);
364 dg.gen_store_T0_GPR(3);
365 status = COMPILE_CODE_OK;
366 break;
367 case NATIVE_NQD_FILLRECT_HOOK:
368 dg.gen_load_T0_GPR(3);
369 dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook);
370 dg.gen_store_T0_GPR(3);
371 status = COMPILE_CODE_OK;
372 break;
373 case NATIVE_NQD_UNKNOWN_HOOK:
374 dg.gen_load_T0_GPR(3);
375 dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook);
376 dg.gen_store_T0_GPR(3);
377 status = COMPILE_CODE_OK;
378 break;
379 case NATIVE_NQD_BITBLT:
380 dg.gen_load_T0_GPR(3);
381 dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
382 status = COMPILE_CODE_OK;
383 break;
384 case NATIVE_NQD_INVRECT:
385 dg.gen_load_T0_GPR(3);
386 dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
387 status = COMPILE_CODE_OK;
388 break;
389 case NATIVE_NQD_FILLRECT:
390 dg.gen_load_T0_GPR(3);
391 dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
392 status = COMPILE_CODE_OK;
393 break;
394 }
395 // Could we fully translate this NativeOp?
396 if (status == COMPILE_CODE_OK) {
397 if (!FN_field::test(opcode))
398 cg_context.done_compile = false;
399 else {
400 dg.gen_load_T0_LR_aligned();
401 dg.gen_set_PC_T0();
402 cg_context.done_compile = true;
403 }
404 break;
405 }
406 #if PPC_REENTRANT_JIT
407 // Try to execute NativeOp trampoline
408 if (!FN_field::test(opcode))
409 dg.gen_set_PC_im(cg_context.pc + 4);
410 else {
411 dg.gen_load_T0_LR_aligned();
412 dg.gen_set_PC_T0();
413 }
414 dg.gen_mov_32_T0_im(selector);
415 dg.gen_jmp(native_op_trampoline);
416 cg_context.done_compile = true;
417 status = COMPILE_EPILOGUE_OK;
418 break;
419 #endif
420 // Invoke NativeOp handler
421 if (!FN_field::test(opcode)) {
422 typedef void (*func_t)(dyngen_cpu_base, uint32);
423 func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
424 dg.gen_invoke_CPU_im(func, selector);
425 cg_context.done_compile = false;
426 status = COMPILE_CODE_OK;
427 }
428 // Otherwise, let it generate a call to execute_sheep() which
429 // will cause necessary updates to the program counter
430 break;
431 }
432
433 default: { // EMUL_OP
434 uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
435 #if PPC_REENTRANT_JIT
436 // Try to execute EmulOp trampoline
437 dg.gen_set_PC_im(cg_context.pc + 4);
438 dg.gen_mov_32_T0_im(emul_op);
439 dg.gen_jmp(emul_op_trampoline);
440 cg_context.done_compile = true;
441 status = COMPILE_EPILOGUE_OK;
442 break;
443 #endif
444 // Invoke EmulOp handler
445 typedef void (*func_t)(dyngen_cpu_base, uint32);
446 func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
447 dg.gen_invoke_CPU_im(func, emul_op);
448 cg_context.done_compile = false;
449 status = COMPILE_CODE_OK;
450 break;
451 }
452 }
453 return status;
454 }
455 #endif
456
457 // Handle MacOS interrupt
458 void sheepshaver_cpu::interrupt(uint32 entry)
459 {
460 #if EMUL_TIME_STATS
461 ppc_interrupt_count++;
462 const clock_t interrupt_start = clock();
463 #endif
464
465 // Save program counters and branch registers
466 uint32 saved_pc = pc();
467 uint32 saved_lr = lr();
468 uint32 saved_ctr= ctr();
469 uint32 saved_sp = gpr(1);
470
471 // Initialize stack pointer to SheepShaver alternate stack base
472 gpr(1) = SignalStackBase() - 64;
473
474 // Build trampoline to return from interrupt
475 SheepVar32 trampoline = POWERPC_EXEC_RETURN;
476
477 // Prepare registers for nanokernel interrupt routine
478 kernel_data->v[0x004 >> 2] = htonl(gpr(1));
479 kernel_data->v[0x018 >> 2] = htonl(gpr(6));
480
481 gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
482 assert(gpr(6) != 0);
483 WriteMacInt32(gpr(6) + 0x13c, gpr(7));
484 WriteMacInt32(gpr(6) + 0x144, gpr(8));
485 WriteMacInt32(gpr(6) + 0x14c, gpr(9));
486 WriteMacInt32(gpr(6) + 0x154, gpr(10));
487 WriteMacInt32(gpr(6) + 0x15c, gpr(11));
488 WriteMacInt32(gpr(6) + 0x164, gpr(12));
489 WriteMacInt32(gpr(6) + 0x16c, gpr(13));
490
491 gpr(1) = KernelDataAddr;
492 gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
493 gpr(8) = 0;
494 gpr(10) = trampoline.addr();
495 gpr(12) = trampoline.addr();
496 gpr(13) = get_cr();
497
498 // rlwimi. r7,r7,8,0,0
499 uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
500 record_cr0(result);
501 gpr(7) = result;
502
503 gpr(11) = 0xf072; // MSR (SRR1)
504 cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000));
505
506 // Enter nanokernel
507 execute(entry);
508
509 // Restore program counters and branch registers
510 pc() = saved_pc;
511 lr() = saved_lr;
512 ctr()= saved_ctr;
513 gpr(1) = saved_sp;
514
515 #if EMUL_TIME_STATS
516 interrupt_time += (clock() - interrupt_start);
517 #endif
518 }
519
520 // Execute 68k routine
521 void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
522 {
523 #if EMUL_TIME_STATS
524 exec68k_count++;
525 const clock_t exec68k_start = clock();
526 #endif
527
528 #if SAFE_EXEC_68K
529 if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
530 printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
531 #endif
532
533 // Save program counters and branch registers
534 uint32 saved_pc = pc();
535 uint32 saved_lr = lr();
536 uint32 saved_ctr= ctr();
537 uint32 saved_cr = get_cr();
538
539 // Create MacOS stack frame
540 // FIXME: make sure MacOS doesn't expect PPC registers to live on top
541 uint32 sp = gpr(1);
542 gpr(1) -= 56;
543 WriteMacInt32(gpr(1), sp);
544
545 // Save PowerPC registers
546 uint32 saved_GPRs[19];
547 memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
548 #if SAVE_FP_EXEC_68K
549 double saved_FPRs[18];
550 memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
551 #endif
552
553 // Setup registers for 68k emulator
554 cr().set(CR_SO_field<2>::mask()); // Supervisor mode
555 for (int i = 0; i < 8; i++) // d[0]..d[7]
556 gpr(8 + i) = r->d[i];
557 for (int i = 0; i < 7; i++) // a[0]..a[6]
558 gpr(16 + i) = r->a[i];
559 gpr(23) = 0;
560 gpr(24) = entry;
561 gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR
562 gpr(26) = 0;
563 gpr(28) = 0; // VBR
564 gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table
565 gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator
566 gpr(31) = KernelDataAddr + 0x1000;
567
568 // Push return address (points to EXEC_RETURN opcode) on stack
569 gpr(1) -= 4;
570 WriteMacInt32(gpr(1), XLM_EXEC_RETURN_OPCODE);
571
572 // Rentering 68k emulator
573 WriteMacInt32(XLM_RUN_MODE, MODE_68K);
574
575 // Set r0 to 0 for 68k emulator
576 gpr(0) = 0;
577
578 // Execute 68k opcode
579 uint32 opcode = ReadMacInt16(gpr(24));
580 gpr(27) = (int32)(int16)ReadMacInt16(gpr(24) += 2);
581 gpr(29) += opcode * 8;
582 execute(gpr(29));
583
584 // Save r25 (contains current 68k interrupt level)
585 WriteMacInt32(XLM_68K_R25, gpr(25));
586
587 // Reentering EMUL_OP mode
588 WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
589
590 // Save 68k registers
591 for (int i = 0; i < 8; i++) // d[0]..d[7]
592 r->d[i] = gpr(8 + i);
593 for (int i = 0; i < 7; i++) // a[0]..a[6]
594 r->a[i] = gpr(16 + i);
595
596 // Restore PowerPC registers
597 memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
598 #if SAVE_FP_EXEC_68K
599 memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
600 #endif
601
602 // Cleanup stack
603 gpr(1) += 56;
604
605 // Restore program counters and branch registers
606 pc() = saved_pc;
607 lr() = saved_lr;
608 ctr()= saved_ctr;
609 set_cr(saved_cr);
610
611 #if EMUL_TIME_STATS
612 exec68k_time += (clock() - exec68k_start);
613 #endif
614 }
615
616 // Call MacOS PPC code
617 uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
618 {
619 #if EMUL_TIME_STATS
620 macos_exec_count++;
621 const clock_t macos_exec_start = clock();
622 #endif
623
624 // Save program counters and branch registers
625 uint32 saved_pc = pc();
626 uint32 saved_lr = lr();
627 uint32 saved_ctr= ctr();
628
629 // Build trampoline with EXEC_RETURN
630 SheepVar32 trampoline = POWERPC_EXEC_RETURN;
631 lr() = trampoline.addr();
632
633 gpr(1) -= 64; // Create stack frame
634 uint32 proc = ReadMacInt32(tvect); // Get routine address
635 uint32 toc = ReadMacInt32(tvect + 4); // Get TOC pointer
636
637 // Save PowerPC registers
638 uint32 regs[8];
639 regs[0] = gpr(2);
640 for (int i = 0; i < nargs; i++)
641 regs[i + 1] = gpr(i + 3);
642
643 // Prepare and call MacOS routine
644 gpr(2) = toc;
645 for (int i = 0; i < nargs; i++)
646 gpr(i + 3) = args[i];
647 execute(proc);
648 uint32 retval = gpr(3);
649
650 // Restore PowerPC registers
651 for (int i = 0; i <= nargs; i++)
652 gpr(i + 2) = regs[i];
653
654 // Cleanup stack
655 gpr(1) += 64;
656
657 // Restore program counters and branch registers
658 pc() = saved_pc;
659 lr() = saved_lr;
660 ctr()= saved_ctr;
661
662 #if EMUL_TIME_STATS
663 macos_exec_time += (clock() - macos_exec_start);
664 #endif
665
666 return retval;
667 }
668
669 // Execute ppc routine
670 inline void sheepshaver_cpu::execute_ppc(uint32 entry)
671 {
672 // Save branch registers
673 uint32 saved_lr = lr();
674
675 SheepVar32 trampoline = POWERPC_EXEC_RETURN;
676 WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
677 lr() = trampoline.addr();
678
679 execute(entry);
680
681 // Restore branch registers
682 lr() = saved_lr;
683 }
684
685 // Resource Manager thunk
686 inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
687 {
688 uint32 type = gpr(3);
689 int16 id = gpr(4);
690
691 // Create stack frame
692 gpr(1) -= 56;
693
694 // Call old routine
695 execute_ppc(old_get_resource);
696
697 // Call CheckLoad()
698 uint32 handle = gpr(3);
699 check_load_invoc(type, id, handle);
700 gpr(3) = handle;
701
702 // Cleanup stack
703 gpr(1) += 56;
704 }
705
706
707 /**
708 * SheepShaver CPU engine interface
709 **/
710
711 // PowerPC CPU emulator
712 static sheepshaver_cpu *ppc_cpu = NULL;
713
714 void FlushCodeCache(uintptr start, uintptr end)
715 {
716 D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
717 ppc_cpu->invalidate_cache_range(start, end);
718 }
719
720 // Dump PPC registers
721 static void dump_registers(void)
722 {
723 ppc_cpu->dump_registers();
724 }
725
726 // Dump log
727 static void dump_log(void)
728 {
729 ppc_cpu->dump_log();
730 }
731
732 /*
733 * Initialize CPU emulation
734 */
735
736 sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
737 {
738 #if ENABLE_VOSF
739 // Handle screen fault
740 extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
741 if (Screen_fault_handler(fault_address, fault_instruction))
742 return SIGSEGV_RETURN_SUCCESS;
743 #endif
744
745 const uintptr addr = (uintptr)fault_address;
746 #if HAVE_SIGSEGV_SKIP_INSTRUCTION
747 // Ignore writes to ROM
748 if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
749 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
750
751 // Get program counter of target CPU
752 sheepshaver_cpu * const cpu = ppc_cpu;
753 const uint32 pc = cpu->pc();
754
755 // Fault in Mac ROM or RAM?
756 bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
757 if (mac_fault) {
758
759 // "VM settings" during MacOS 8 installation
760 if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
761 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
762
763 // MacOS 8.5 installation
764 else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
765 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
766
767 // MacOS 8 serial drivers on startup
768 else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
769 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
770
771 // MacOS 8.1 serial drivers on startup
772 else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
773 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
774 else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
775 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
776
777 // MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
778 else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
779 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
780 else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
781 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
782
783 // Ignore writes to the zero page
784 else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
785 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
786
787 // Ignore all other faults, if requested
788 if (PrefsFindBool("ignoresegv"))
789 return SIGSEGV_RETURN_SKIP_INSTRUCTION;
790 }
791 #else
792 #error "FIXME: You don't have the capability to skip instruction within signal handlers"
793 #endif
794
795 fprintf(stderr, "SIGSEGV\n");
796 fprintf(stderr, " pc %p\n", fault_instruction);
797 fprintf(stderr, " ea %p\n", fault_address);
798 dump_registers();
799 ppc_cpu->dump_log();
800 enter_mon();
801 QuitEmulator();
802
803 return SIGSEGV_RETURN_FAILURE;
804 }
805
806 void init_emul_ppc(void)
807 {
808 // Get pointer to KernelData in host address space
809 kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
810
811 // Initialize main CPU emulator
812 ppc_cpu = new sheepshaver_cpu();
813 ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
814 ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
815 WriteMacInt32(XLM_RUN_MODE, MODE_68K);
816
817 #if ENABLE_MON
818 // Install "regs" command in cxmon
819 mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
820 mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n");
821 #endif
822
823 #if EMUL_TIME_STATS
824 emul_start_time = clock();
825 #endif
826 }
827
828 /*
829 * Deinitialize emulation
830 */
831
832 void exit_emul_ppc(void)
833 {
834 #if EMUL_TIME_STATS
835 clock_t emul_end_time = clock();
836
837 printf("### Statistics for SheepShaver emulation parts\n");
838 const clock_t emul_time = emul_end_time - emul_start_time;
839 printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
840 printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
841 (double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
842 printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
843 (double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
844
845 #define PRINT_STATS(LABEL, VAR_PREFIX) do { \
846 printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
847 printf("Total " LABEL " time : %.1f sec (%.1f%%)\n", \
848 double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC), \
849 100.0 * double(VAR_PREFIX##_time) / double(emul_time)); \
850 } while (0)
851
852 PRINT_STATS("Execute68k[Trap] execution", exec68k);
853 PRINT_STATS("NativeOp execution", native_exec);
854 PRINT_STATS("MacOS routine execution", macos_exec);
855
856 #undef PRINT_STATS
857 printf("\n");
858 #endif
859
860 delete ppc_cpu;
861 ppc_cpu = NULL;
862 }
863
864 #if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
865 // Initialize EmulOp trampolines
866 void init_emul_op_trampolines(basic_dyngen & dg)
867 {
868 typedef void (*func_t)(dyngen_cpu_base, uint32);
869 func_t func;
870
871 // EmulOp
872 emul_op_trampoline = dg.gen_start();
873 func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
874 dg.gen_invoke_CPU_T0(func);
875 dg.gen_exec_return();
876 dg.gen_end();
877
878 // NativeOp
879 native_op_trampoline = dg.gen_start();
880 func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
881 dg.gen_invoke_CPU_T0(func);
882 dg.gen_exec_return();
883 dg.gen_end();
884
885 D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
886 D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
887 }
888 #endif
889
890 /*
891 * Emulation loop
892 */
893
894 void emul_ppc(uint32 entry)
895 {
896 #if 0
897 ppc_cpu->start_log();
898 #endif
899 // start emulation loop and enable code translation or caching
900 ppc_cpu->execute(entry);
901 }
902
903 /*
904 * Handle PowerPC interrupt
905 */
906
907 void TriggerInterrupt(void)
908 {
909 idle_resume();
910 #if 0
911 WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
912 #else
913 // Trigger interrupt to main cpu only
914 if (ppc_cpu)
915 ppc_cpu->trigger_interrupt();
916 #endif
917 }
918
919 void HandleInterrupt(powerpc_registers *r)
920 {
921 #ifdef USE_SDL_VIDEO
922 // We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
923 SDL_PumpEvents();
924 #endif
925
926 // Do nothing if interrupts are disabled
927 if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
928 return;
929
930 // Update interrupt count
931 #if EMUL_TIME_STATS
932 interrupt_count++;
933 #endif
934
935 // Interrupt action depends on current run mode
936 switch (ReadMacInt32(XLM_RUN_MODE)) {
937 case MODE_68K:
938 // 68k emulator active, trigger 68k interrupt level 1
939 WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
940 r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
941 break;
942
943 #if INTERRUPTS_IN_NATIVE_MODE
944 case MODE_NATIVE:
945 // 68k emulator inactive, in nanokernel?
946 if (r->gpr[1] != KernelDataAddr) {
947
948 // Prepare for 68k interrupt level 1
949 WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
950 WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
951 ReadMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc)
952 | tswap32(kernel_data->v[0x674 >> 2]));
953
954 // Execute nanokernel interrupt routine (this will activate the 68k emulator)
955 DisableInterrupt();
956 if (ROMType == ROMTYPE_NEWWORLD)
957 ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
958 else
959 ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
960 }
961 break;
962 #endif
963
964 #if INTERRUPTS_IN_EMUL_OP_MODE
965 case MODE_EMUL_OP:
966 // 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
967 if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
968 #if EMUL_TIME_STATS
969 const clock_t interrupt_start = clock();
970 #endif
971 #if 1
972 // Execute full 68k interrupt routine
973 M68kRegisters r;
974 uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
975 WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
976 static const uint8 proc_template[] = {
977 0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
978 0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
979 0x40, 0xe7, // move sr,-(sp) (saved SR)
980 0x20, 0x78, 0x00, 0x064, // move.l $64,a0
981 0x4e, 0xd0, // jmp (a0)
982 M68K_RTS >> 8, M68K_RTS & 0xff // @1
983 };
984 BUILD_SHEEPSHAVER_PROCEDURE(proc);
985 Execute68k(proc, &r);
986 WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
987 #else
988 // Only update cursor
989 if (HasMacStarted()) {
990 if (InterruptFlags & INTFLAG_VIA) {
991 ClearInterruptFlag(INTFLAG_VIA);
992 ADBInterrupt();
993 ExecuteNative(NATIVE_VIDEO_VBL);
994 }
995 }
996 #endif
997 #if EMUL_TIME_STATS
998 interrupt_time += (clock() - interrupt_start);
999 #endif
1000 }
1001 break;
1002 #endif
1003 }
1004 }
1005
1006 // Execute NATIVE_OP routine
1007 void sheepshaver_cpu::execute_native_op(uint32 selector)
1008 {
1009 #if EMUL_TIME_STATS
1010 native_exec_count++;
1011 const clock_t native_exec_start = clock();
1012 #endif
1013
1014 switch (selector) {
1015 case NATIVE_PATCH_NAME_REGISTRY:
1016 DoPatchNameRegistry();
1017 break;
1018 case NATIVE_VIDEO_INSTALL_ACCEL:
1019 VideoInstallAccel();
1020 break;
1021 case NATIVE_VIDEO_VBL:
1022 VideoVBL();
1023 break;
1024 case NATIVE_VIDEO_DO_DRIVER_IO:
1025 gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1026 break;
1027 case NATIVE_ETHER_AO_GET_HWADDR:
1028 AO_get_ethernet_address(gpr(3));
1029 break;
1030 case NATIVE_ETHER_AO_ADD_MULTI:
1031 AO_enable_multicast(gpr(3));
1032 break;
1033 case NATIVE_ETHER_AO_DEL_MULTI:
1034 AO_disable_multicast(gpr(3));
1035 break;
1036 case NATIVE_ETHER_AO_SEND_PACKET:
1037 AO_transmit_packet(gpr(3));
1038 break;
1039 case NATIVE_ETHER_IRQ:
1040 EtherIRQ();
1041 break;
1042 case NATIVE_ETHER_INIT:
1043 gpr(3) = InitStreamModule((void *)gpr(3));
1044 break;
1045 case NATIVE_ETHER_TERM:
1046 TerminateStreamModule();
1047 break;
1048 case NATIVE_ETHER_OPEN:
1049 gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1050 break;
1051 case NATIVE_ETHER_CLOSE:
1052 gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5));
1053 break;
1054 case NATIVE_ETHER_WPUT:
1055 gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4));
1056 break;
1057 case NATIVE_ETHER_RSRV:
1058 gpr(3) = ether_rsrv((queue_t *)gpr(3));
1059 break;
1060 case NATIVE_NQD_SYNC_HOOK:
1061 gpr(3) = NQD_sync_hook(gpr(3));
1062 break;
1063 case NATIVE_NQD_UNKNOWN_HOOK:
1064 gpr(3) = NQD_unknown_hook(gpr(3));
1065 break;
1066 case NATIVE_NQD_BITBLT_HOOK:
1067 gpr(3) = NQD_bitblt_hook(gpr(3));
1068 break;
1069 case NATIVE_NQD_BITBLT:
1070 NQD_bitblt(gpr(3));
1071 break;
1072 case NATIVE_NQD_FILLRECT_HOOK:
1073 gpr(3) = NQD_fillrect_hook(gpr(3));
1074 break;
1075 case NATIVE_NQD_INVRECT:
1076 NQD_invrect(gpr(3));
1077 break;
1078 case NATIVE_NQD_FILLRECT:
1079 NQD_fillrect(gpr(3));
1080 break;
1081 case NATIVE_SERIAL_NOTHING:
1082 case NATIVE_SERIAL_OPEN:
1083 case NATIVE_SERIAL_PRIME_IN:
1084 case NATIVE_SERIAL_PRIME_OUT:
1085 case NATIVE_SERIAL_CONTROL:
1086 case NATIVE_SERIAL_STATUS:
1087 case NATIVE_SERIAL_CLOSE: {
1088 typedef int16 (*SerialCallback)(uint32, uint32);
1089 static const SerialCallback serial_callbacks[] = {
1090 SerialNothing,
1091 SerialOpen,
1092 SerialPrimeIn,
1093 SerialPrimeOut,
1094 SerialControl,
1095 SerialStatus,
1096 SerialClose
1097 };
1098 gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1099 break;
1100 }
1101 case NATIVE_GET_RESOURCE:
1102 get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1103 break;
1104 case NATIVE_GET_1_RESOURCE:
1105 get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1106 break;
1107 case NATIVE_GET_IND_RESOURCE:
1108 get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1109 break;
1110 case NATIVE_GET_1_IND_RESOURCE:
1111 get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1112 break;
1113 case NATIVE_R_GET_RESOURCE:
1114 get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1115 break;
1116 case NATIVE_MAKE_EXECUTABLE:
1117 MakeExecutable(0, gpr(4), gpr(5));
1118 break;
1119 case NATIVE_CHECK_LOAD_INVOC:
1120 check_load_invoc(gpr(3), gpr(4), gpr(5));
1121 break;
1122 case NATIVE_NAMED_CHECK_LOAD_INVOC:
1123 named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1124 break;
1125 default:
1126 printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1127 QuitEmulator();
1128 break;
1129 }
1130
1131 #if EMUL_TIME_STATS
1132 native_exec_time += (clock() - native_exec_start);
1133 #endif
1134 }
1135
1136 /*
1137 * Execute 68k subroutine (must be ended with EXEC_RETURN)
1138 * This must only be called by the emul_thread when in EMUL_OP mode
1139 * r->a[7] is unused, the routine runs on the caller's stack
1140 */
1141
1142 void Execute68k(uint32 pc, M68kRegisters *r)
1143 {
1144 ppc_cpu->execute_68k(pc, r);
1145 }
1146
1147 /*
1148 * Execute 68k A-Trap from EMUL_OP routine
1149 * r->a[7] is unused, the routine runs on the caller's stack
1150 */
1151
1152 void Execute68kTrap(uint16 trap, M68kRegisters *r)
1153 {
1154 SheepVar proc_var(4);
1155 uint32 proc = proc_var.addr();
1156 WriteMacInt16(proc, trap);
1157 WriteMacInt16(proc + 2, M68K_RTS);
1158 Execute68k(proc, r);
1159 }
1160
1161 /*
1162 * Call MacOS PPC code
1163 */
1164
1165 uint32 call_macos(uint32 tvect)
1166 {
1167 return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1168 }
1169
1170 uint32 call_macos1(uint32 tvect, uint32 arg1)
1171 {
1172 const uint32 args[] = { arg1 };
1173 return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1174 }
1175
1176 uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1177 {
1178 const uint32 args[] = { arg1, arg2 };
1179 return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1180 }
1181
1182 uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1183 {
1184 const uint32 args[] = { arg1, arg2, arg3 };
1185 return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1186 }
1187
1188 uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1189 {
1190 const uint32 args[] = { arg1, arg2, arg3, arg4 };
1191 return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1192 }
1193
1194 uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1195 {
1196 const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1197 return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1198 }
1199
1200 uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1201 {
1202 const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1203 return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1204 }
1205
1206 uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1207 {
1208 const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1209 return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1210 }