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root/cebix/SheepShaver/src/rom_patches.cpp
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Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.9 by gbeauche, 2003-09-29T20:30:19Z vs.
Revision 1.14 by gbeauche, 2003-10-06T21:00:48Z

# Line 449 | Line 449 | static const uint8 cdrom_driver[] = {  //
449  
450   #if EMULATED_PPC
451   #define SERIAL_TRAMPOLINES 1
452 < static uint32 serial_nothing_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_NOTHING), 0};
453 < static uint32 serial_open_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_OPEN), 0};
454 < static uint32 serial_prime_in_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_IN), 0};
455 < static uint32 serial_prime_out_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_OUT), 0};
456 < static uint32 serial_control_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CONTROL), 0};
457 < static uint32 serial_status_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_STATUS), 0};
458 < static uint32 serial_close_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CLOSE), 0};
452 > static uint32 serial_nothing_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_NOTHING)), 0};
453 > static uint32 serial_open_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_OPEN)), 0};
454 > static uint32 serial_prime_in_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_IN)), 0};
455 > static uint32 serial_prime_out_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_OUT)), 0};
456 > static uint32 serial_control_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CONTROL)), 0};
457 > static uint32 serial_status_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_STATUS)), 0};
458 > static uint32 serial_close_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CLOSE)), 0};
459   #elif defined(__linux__)
460   #define SERIAL_TRAMPOLINES 1
461   static uint32 serial_nothing_tvect[2] = {(uint32)SerialNothing, 0};
# Line 718 | Line 718 | bool PatchROM(void)
718                  ROMType = ROMTYPE_ZANZIBAR;
719          else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gazelle", 12))
720                  ROMType = ROMTYPE_GAZELLE;
721 +        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gossamer", 13))
722 +                ROMType = ROMTYPE_GOSSAMER;
723          else if (!memcmp((void *)(ROM_BASE + 0x30d064), "NewWorld", 8))
724                  ROMType = ROMTYPE_NEWWORLD;
725          else
726                  return false;
727  
728 +        // Check that other ROM addresses point to really free regions
729 +        printf("%08x\n", ntohl(*(uint32 *)(ROM_BASE + CHECK_LOAD_PATCH_SPACE)));
730 +        if (ntohl(*(uint32 *)(ROM_BASE + CHECK_LOAD_PATCH_SPACE)) != 0x6b636b63)
731 +                return false;
732 +        if (ntohl(*(uint32 *)(ROM_BASE + PUT_SCRAP_PATCH_SPACE)) != 0x6b636b63)
733 +                return false;
734 +        if (ntohl(*(uint32 *)(ROM_BASE + GET_SCRAP_PATCH_SPACE)) != 0x6b636b63)
735 +                return false;
736 +        if (ntohl(*(uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE)) != 0x6b636b63)
737 +                return false;
738 +
739          // Apply patches
740          if (!patch_nanokernel_boot()) return false;
741          if (!patch_68k_emul()) return false;
# Line 767 | Line 780 | static bool patch_nanokernel_boot(void)
780          lp[0xfd8 >> 2] = htonl(ROM_BASE + 0x2a);                // 68k reset vector
781  
782          // Skip SR/BAT/SDR init
783 <        if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_NEWWORLD) {
783 >        if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_GOSSAMER || ROMType == ROMTYPE_NEWWORLD) {
784                  lp = (uint32 *)(ROM_BASE + 0x310000);
785                  *lp++ = htonl(POWERPC_NOP);
786                  *lp = htonl(0x38000000);
787          }
788 <        static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x310200};
788 >        static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x3101fc, 0x310200};
789          lp = (uint32 *)(ROM_BASE + 0x310008);
790          *lp = htonl(0x48000000 | (sr_init_loc[ROMType] - 8) & 0xffff);  // b            ROM_BASE+0x3101b0
791          lp = (uint32 *)(ROM_BASE + sr_init_loc[ROMType]);
# Line 782 | Line 795 | static bool patch_nanokernel_boot(void)
795          *lp = htonl(0x3de00010);                // lis  r15,0x0010      (size of kernel memory)
796  
797          // Don't read PVR
798 <        static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310438};
798 >        static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310430, 0x310438};
799          lp = (uint32 *)(ROM_BASE + pvr_loc[ROMType]);
800          *lp = htonl(0x81800000 + XLM_PVR);      // lwz  r12,(theoretical PVR)
801  
# Line 930 | Line 943 | static bool patch_nanokernel_boot(void)
943          *lp = htonl(POWERPC_NOP);
944  
945          // Don't read PVR
946 <        static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148};
946 >        static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148, 0x148};
947          lp = (uint32 *)(ROM_BASE + loc + pvr_ofs[ROMType]);
948          *lp = htonl(0x82e00000 + XLM_PVR);              // lwz  r23,(theoretical PVR)
949          lp = (uint32 *)(ROM_BASE + loc + 0x170);
950 <        if (ntohl(*lp) == 0x7eff42a6)   // NewWorld ROM
950 >        if (ntohl(*lp) == 0x7eff42a6)   // NewWorld or Gossamer ROM
951                  *lp = htonl(0x82e00000 + XLM_PVR);      // lwz  r23,(theoretical PVR)
952          lp = (uint32 *)(ROM_BASE + 0x313134);
953          if (ntohl(*lp) == 0x7e5f42a6)
# Line 947 | Line 960 | static bool patch_nanokernel_boot(void)
960                  *lp = htonl(0x81200000 + XLM_PVR);      // lzw  r9,(theoritical PVR)
961  
962          // Don't read SDR1
963 <        static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c};
963 >        static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c, 0x19c};
964          lp = (uint32 *)(ROM_BASE + loc + sdr1_ofs[ROMType]);
965          *lp++ = htonl(0x3d00dead);              // lis  r8,0xdead               (pointer to page table)
966          *lp++ = htonl(0x3ec0001f);              // lis  r22,0x001f      (size of page table)
967          *lp = htonl(POWERPC_NOP);
968  
969          // Don't clear page table
970 <        static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c4};
970 >        static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c0, 0x1c4};
971          lp = (uint32 *)(ROM_BASE + loc + pgtb_ofs[ROMType]);
972          *lp = htonl(POWERPC_NOP);
973  
974          // Don't invalidate TLB
975 <        static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1cc};
975 >        static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1c8, 0x1cc};
976          lp = (uint32 *)(ROM_BASE + loc + tlb_ofs[ROMType]);
977          *lp = htonl(POWERPC_NOP);
978  
979          // Don't create RAM descriptor table
980 <        static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x37c};
980 >        static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x378, 0x37c};
981          lp = (uint32 *)(ROM_BASE + loc + desc_ofs[ROMType]);
982          *lp = htonl(POWERPC_NOP);
983  
984          // Don't load SRs and BATs
985 <        static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x404};
985 >        static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x400, 0x404};
986          lp = (uint32 *)(ROM_BASE + loc + sr_ofs[ROMType]);
987          *lp = htonl(POWERPC_NOP);
988  
989          // Don't mess with SRs
990 <        static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4};
990 >        static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4};
991          lp = (uint32 *)(ROM_BASE + sr2_ofs[ROMType]);
992          *lp = htonl(POWERPC_BLR);
993  
994          // Don't check performance monitor
995 <        static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313218};
995 >        static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313158, 0x313218};
996          lp = (uint32 *)(ROM_BASE + pm_ofs[ROMType]);
997          while (ntohl(*lp) != 0x7e58eba6) lp++;
998          *lp++ = htonl(POWERPC_NOP);
# Line 1015 | Line 1028 | static bool patch_nanokernel_boot(void)
1028          *lp++ = htonl(POWERPC_NOP);
1029  
1030          // Jump to 68k emulator
1031 <        static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x438};
1031 >        static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x434, 0x438};
1032          lp = (uint32 *)(ROM_BASE + loc + jump68k_ofs[ROMType]);
1033          *lp++ = htonl(0x80610634);              // lwz  r3,0x0634(r1)   (pointer to Emulator Data)
1034          *lp++ = htonl(0x8081119c);              // lwz  r4,0x119c(r1)   (pointer to opcode table)
# Line 1036 | Line 1049 | static bool patch_68k_emul(void)
1049          uint32 base;
1050  
1051          // Overwrite twi instructions
1052 <        static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740};
1052 >        static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740, 0x36e740};
1053          base = twi_loc[ROMType];
1054          lp = (uint32 *)(ROM_BASE + base);
1055          *lp++ = htonl(0x48000000 + 0x36f900 - base);            // b 0x36f900 (Emulator start)
# Line 1418 | Line 1431 | static bool patch_68k(void)
1431                  lp[0x28 >> 2] = htonl(0x00000861);
1432                  lp[0x58 >> 2] = htonl(0x30200000);
1433                  lp[0x60 >> 2] = htonl(0x0000003d);
1434 +        } else if (ROMType == ROMTYPE_GOSSAMER) {
1435 +                base = 0x12d20;
1436 +                lp = (uint32 *)(ROM_BASE + base - 0x14);
1437 +                lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1438 +                lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1439 +                lp[0x14 >> 2] = htonl(0x3fff0401);
1440 +                lp[0x18 >> 2] = htonl(0x0300001c);
1441 +                lp[0x1c >> 2] = htonl(0x000108c4);
1442 +                lp[0x24 >> 2] = htonl(0xc301bf26);
1443 +                lp[0x28 >> 2] = htonl(0x00000861);
1444 +                lp[0x58 >> 2] = htonl(0x30410000);
1445 +                lp[0x60 >> 2] = htonl(0x0000003d);
1446          }
1447  
1448          // Construct AddrMap for NewWorld ROM
1449 <        if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR) {
1449 >        if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) {
1450                  lp = (uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE);
1451                  memset(lp - 10, 0, 0x128);
1452                  lp[-10] = htonl(0x0300001c);
# Line 1547 | Line 1572 | static bool patch_68k(void)
1572                  *wp++ = htons(M68K_EMUL_OP_XPRAM2);
1573                  *wp = htons(0x4ed3);                    // jmp  (a3)
1574  
1575 <                static const uint32 nvram3_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0};
1576 <                wp = (uint16 *)(ROM_BASE + nvram3_loc[ROMType]);
1575 >                static const uint8 nvram3_dat[] = {0x4e, 0xd3, 0x06, 0x41, 0x13, 0x00};
1576 >                if ((base = find_rom_data(0x7000, 0xb000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1577 >                D(bug("nvram3 %08lx\n", base));
1578 >                wp = (uint16 *)(ROM_BASE + base + 2);
1579 >                *wp++ = htons(M68K_EMUL_OP_XPRAM3);
1580 >                *wp = htons(0x4ed3);                    // jmp  (a3)
1581 >
1582 >                static const uint32 nvram4_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0x538d0, 0};
1583 >                wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1584                  *wp++ = htons(0x202f);                  // move.l       4(sp),d0
1585                  *wp++ = htons(0x0004);
1586                  *wp++ = htons(M68K_EMUL_OP_NVRAM1);
# Line 1561 | Line 1593 | static bool patch_68k(void)
1593                          *wp = htons(0x0004);
1594                  }
1595  
1596 <                static const uint32 nvram4_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0};
1597 <                wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1596 >                static const uint32 nvram5_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0x53a20, 0};
1597 >                wp = (uint16 *)(ROM_BASE + nvram5_loc[ROMType]);
1598                  if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GAZELLE) {
1599                          *wp++ = htons(0x202f);                  // move.l       4(sp),d0
1600                          *wp++ = htons(0x0004);
# Line 1739 | Line 1771 | static bool patch_68k(void)
1771                  if ((base = find_rom_data(0x13000, 0x20000, gc_mask2_dat, sizeof(gc_mask2_dat))) == 0) return false;
1772                  D(bug("gc_mask2 %08lx\n", base));
1773                  wp = (uint16 *)(ROM_BASE + base);
1774 +                if (ROMType == ROMTYPE_GOSSAMER)
1775 +                        *wp++ = htons(M68K_NOP);
1776                  for (int i=0; i<5; i++) {
1777                          *wp++ = htons(M68K_NOP);
1778                          *wp++ = htons(M68K_NOP);
# Line 1746 | Line 1780 | static bool patch_68k(void)
1780                          *wp++ = htons(M68K_NOP);
1781                          wp += 2;
1782                  }
1783 <                if (ROMType == ROMTYPE_ZANZIBAR) {
1783 >                if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) {
1784                          for (int i=0; i<6; i++) {
1785                                  *wp++ = htons(M68K_NOP);
1786                                  *wp++ = htons(M68K_NOP);
# Line 1819 | Line 1853 | static bool patch_68k(void)
1853          *wp = htons(M68K_RTS);
1854  
1855          // Don't install Time Manager task for 60Hz interrupt (Enable60HzInts, via 0x2b8)
1856 <        if (ROMType == ROMTYPE_NEWWORLD) {
1856 >        if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
1857                  static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9};
1858 <                if ((base = find_rom_data(0x2e0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1858 >                if ((base = find_rom_data(0x2a0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1859                  D(bug("tm_task %08lx\n", base));
1860                  wp = (uint16 *)(ROM_BASE + base + 28);
1861                  *wp++ = htons(M68K_NOP);
# Line 1841 | Line 1875 | static bool patch_68k(void)
1875          }
1876  
1877          // Don't read PVR from 0x5fffef80 in DriverServicesLib (via 0x316)
1878 <        if (ROMType != ROMTYPE_NEWWORLD) {
1878 >        if (ROMType != ROMTYPE_NEWWORLD && ROMType != ROMTYPE_GOSSAMER) {
1879                  uint32 dsl_offset = find_rom_resource(FOURCC('n','l','i','b'), -16401);
1880                  if (ROMType == ROMTYPE_ZANZIBAR) {
1881                          static const uint8 dsl_pvr_dat[] = {0x40, 0x82, 0x00, 0x40, 0x38, 0x60, 0xef, 0x80, 0x3c, 0x63, 0x60, 0x00, 0x80, 0x83, 0x00, 0x00, 0x54, 0x84, 0x84, 0x3e};
# Line 1927 | Line 1961 | static bool patch_68k(void)
1961                          D(bug("scsi_var2 %08lx\n", base));
1962                          wp = (uint16 *)(ROM_BASE + base);
1963                          *wp++ = htons(0x7000);  // moveq #0,d0
1964 <                        *wp = htons(M68K_RTS);  // bra
1964 >                        *wp = htons(M68K_RTS);
1965 >                }
1966 >        }
1967 >        else if (ROMType == ROMTYPE_GOSSAMER) {
1968 >                static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
1969 >                if ((base = find_rom_data(0x1d700, 0x1d800, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
1970 >                        D(bug("scsi_var %08lx\n", base));
1971 >                        wp = (uint16 *)(ROM_BASE + base + 12);
1972 >                        *wp = htons(0x6000);    // bra
1973 >                }
1974 >
1975 >                static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x5a, 0x48, 0xe7, 0x1f, 0x38};
1976 >                if ((base = find_rom_data(0x1d900, 0x1da00, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
1977 >                        D(bug("scsi_var2 %08lx\n", base));
1978 >                        wp = (uint16 *)(ROM_BASE + base);
1979 >                        *wp++ = htons(0x7000);  // moveq #0,d0
1980 >                        *wp = htons(M68K_RTS);
1981                  }
1982          }
1983   #endif
# Line 2007 | Line 2057 | static bool patch_68k(void)
2057          *wp = htons(M68K_RTS);
2058  
2059          // Don't install serial drivers from ROM
2060 <        if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD) {
2060 >        if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
2061                  wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('S','E','R','D'), 0));
2062                  *wp = htons(M68K_RTS);
2063          } else {
# Line 2191 | Line 2241 | void InstallDrivers(void)
2241          uint8 pb[SIZEOF_IOParam];
2242  
2243          // Install floppy driver
2244 <        if (ROMType == ROMTYPE_NEWWORLD) {
2244 >        if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
2245  
2246 <                // Force installation of floppy driver with NewWorld ROMs
2246 >                // Force installation of floppy driver with NewWorld and Gossamer ROMs
2247                  r.a[0] = ROM_BASE + sony_offset;
2248                  r.d[0] = (uint32)SonyRefNum;
2249                  Execute68kTrap(0xa43d, &r);             // DrvrInstallRsrvMem()

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