[ViewVC] Diff of: cebix/SheepShaver/src/rom

Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.23 by gbeauche, 2003-12-15T15:27:01Z vs.
Revision 1.31 by gbeauche, 2004-06-29T20:25:54Z

#	Line 1 \| Line 1
1		/*
2		* rom_patches.cpp - ROM patches
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 847 \| Line 847 \| static bool patch_nanokernel_boot(void)
847		lp[7] = htonl(0x00040004); // Inst cache assoc/Data cache assoc
848		lp[8] = htonl(0x00400002); // TLB total size/TLB assoc
849		break;
850	<	case 8: // 750
850	>	case 8: // 750, 750FX
851	>	case 0x7000:
852		lp[0] = htonl(0x1000); // Page size
853		lp[1] = htonl(0x8000); // Data cache size
854		lp[2] = htonl(0x8000); // Inst cache size
#	Line 871 \| Line 872 \| static bool patch_nanokernel_boot(void)
872		lp[8] = htonl(0x00800002); // TLB total size/TLB assoc
873		break;
874		// case 11: // X704?
875	<	case 12: // ???
875	>	case 12: // 7400, 7410, 7450, 7455, 7457
876	>	case 0x800c:
877	>	case 0x8000:
878	>	case 0x8001:
879	>	case 0x8002:
880		lp[0] = htonl(0x1000); // Page size
881		lp[1] = htonl(0x8000); // Data cache size
882		lp[2] = htonl(0x8000); // Inst cache size
#	Line 1057 \| Line 1062 \| static bool patch_nanokernel_boot(void)
1062		static bool patch_68k_emul(void)
1063		{
1064		uint32 *lp;
1065	<	uint32 base;
1065	>	uint32 base, loc;
1066
1067		// Overwrite twi instructions
1068		static const uint8 twi_dat[] = {0x0f, 0xff, 0x00, 0x00, 0x0f, 0xff, 0x00, 0x01, 0x0f, 0xff, 0x00, 0x02};
#	Line 1121 \| Line 1126 \| static bool patch_68k_emul(void)
1126		// Extra routine for 68k emulator start
1127		lp = (uint32 *)(ROM_BASE + 0x36f900);
1128		*lp++ = htonl(0x7c2903a6); // mtctr r1
1124	–	#if EMULATED_PPC
1125	–	*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
1126	–	#else
1129		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST
1130		*lp++ = htonl(0x38210001); // addi r1,r1,1
1131		*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST
1130	–	#endif
1132		*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA
1133		*lp++ = htonl(0x90c10018); // stw r6,0x18(r1)
1134		*lp++ = htonl(0x7cc902a6); // mfctr r6
#	Line 1155 \| Line 1156 \| static bool patch_68k_emul(void)
1156		// Extra routine for Mixed Mode
1157		lp = (uint32 *)(ROM_BASE + 0x36fa00);
1158		*lp++ = htonl(0x7c2903a6); // mtctr r1
1158	–	#if EMULATED_PPC
1159	–	*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
1160	–	#else
1159		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST
1160		*lp++ = htonl(0x38210001); // addi r1,r1,1
1161		*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST
1164	–	#endif
1162		*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA
1163		*lp++ = htonl(0x90c10018); // stw r6,0x18(r1)
1164		*lp++ = htonl(0x7cc902a6); // mfctr r6
#	Line 1189 \| Line 1186 \| static bool patch_68k_emul(void)
1186		// Extra routine for Reset/FC1E opcode
1187		lp = (uint32 *)(ROM_BASE + 0x36fb00);
1188		*lp++ = htonl(0x7c2903a6); // mtctr r1
1192	–	#if EMULATED_PPC
1193	–	*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
1194	–	#else
1189		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST
1190		*lp++ = htonl(0x38210001); // addi r1,r1,1
1191		*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST
1198	–	#endif
1192		*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA
1193		*lp++ = htonl(0x90c10018); // stw r6,0x18(r1)
1194		*lp++ = htonl(0x7cc902a6); // mfctr r6
#	Line 1223 \| Line 1216 \| static bool patch_68k_emul(void)
1216		// Extra routine for FE0A opcode (QuickDraw 3D needs this)
1217		lp = (uint32 *)(ROM_BASE + 0x36fc00);
1218		*lp++ = htonl(0x7c2903a6); // mtctr r1
1226	–	#if EMULATED_PPC
1227	–	*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
1228	–	#else
1219		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST
1220		*lp++ = htonl(0x38210001); // addi r1,r1,1
1221		*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST
1232	–	#endif
1222		*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA
1223		*lp++ = htonl(0x90c10018); // stw r6,0x18(r1)
1224		*lp++ = htonl(0x7cc902a6); // mfctr r6
#	Line 1265 \| Line 1254 \| static bool patch_68k_emul(void)
1254		return false;
1255		dr_found:
1256		lp++;
1257	<	*lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff)); // b DR_CACHE_BASE+0x1f000
1258	<	lp = (uint32 *)(ROM_BASE + 0x37f000);
1259	<	*lp++ = htonl(0x3c000000 + ((ROM_BASE + 0x46d0a4) >> 16)); // lis r0,xxx
1260	<	*lp++ = htonl(0x60000000 + ((ROM_BASE + 0x46d0a4) & 0xffff)); // ori r0,r0,xxx
1261	<	*lp++ = htonl(0x7c0903a6); // mtctr r0
1262	<	*lp = htonl(POWERPC_BCTR); // bctr
1257	>	loc = (uint32)lp - ROM_BASE;
1258	>	if ((base = powerpc_branch_target(ROM_BASE + loc)) == 0) base = ROM_BASE + loc;
1259	>	static const uint8 dr_ret_dat[] = {0x80, 0xbf, 0x08, 0x14, 0x53, 0x19, 0x4d, 0xac, 0x7c, 0xa8, 0x03, 0xa6};
1260	>	if ((base = find_rom_data(base - ROM_BASE, 0x380000, dr_ret_dat, sizeof(dr_ret_dat))) == 0) return false;
1261	>	D(bug("dr_ret %08lx\n", base));
1262	>	if (base != loc) {
1263	>	// OldWorld ROMs contain an absolute branch
1264	>	D(bug(" patching absolute branch at %08x\n", (uint32)lp - ROM_BASE));
1265	>	*lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff)); // b DR_CACHE_BASE+0x1f000
1266	>	lp = (uint32 *)(ROM_BASE + 0x37f000);
1267	>	*lp++ = htonl(0x3c000000 + ((ROM_BASE + base) >> 16)); // lis r0,xxx
1268	>	*lp++ = htonl(0x60000000 + ((ROM_BASE + base) & 0xffff)); // ori r0,r0,xxx
1269	>	*lp++ = htonl(0x7c0803a6); // mtlr r0
1270	>	*lp = htonl(POWERPC_BLR); // blr
1271	>	}
1272		return true;
1273		}
1274
#	Line 1387 \| Line 1385 \| static bool patch_nanokernel(void)
1385		uint32 npc = (uint32)(lp + 1) - ROM_BASE;
1386
1387		lp = (uint32 *)(ROM_BASE + 0x318000);
1390	–	#if EMULATED_PPC
1391	–	*lp++ = htonl(NativeOpcode(NATIVE_ENABLE_INTERRUPT));
1392	–	*lp = htonl(0x48000000 + ((npc - 0x318004) & 0x03fffffc)); // b ROM_BASE+0x312c2c
1393	–	#else
1388		*lp++ = htonl(0x81400000 + XLM_IRQ_NEST); // lwz r10,XLM_IRQ_NEST
1389		*lp++ = htonl(0x394affff); // subi r10,r10,1
1390		*lp++ = htonl(0x91400000 + XLM_IRQ_NEST); // stw r10,XLM_IRQ_NEST
1391		*lp = htonl(0x48000000 + ((npc - 0x31800c) & 0x03fffffc)); // b ROM_BASE+0x312c2c
1398	–	#endif
1392
1393		/*
1394		// Disable FE0A/FE06 opcodes
#	Line 2227 \| Line 2220 \| static bool patch_68k(void)
2220		lp = (uint32 )(ROM_BASE + ntohl(lp));
2221		lp[0xa9fd & 0x3ff] = htonl(GET_SCRAP_PATCH_SPACE);
2222
2230	–	#if __BEOS__
2223		// Patch SynchIdleTime()
2224		if (PrefsFindBool("idlewait")) {
2225		wp = (uint16 *)(ROM_BASE + find_rom_trap(0xabf7) + 4); // SynchIdleTime()
2226		D(bug("SynchIdleTime at %08lx\n", wp));
2227	<	if (ntohs(*wp) == 0x2078) {
2227	>	if (ntohs(*wp) == 0x2078) { // movea.l ExpandMem,a0
2228		*wp++ = htons(M68K_EMUL_OP_IDLE_TIME);
2229		*wp = htons(M68K_NOP);
2230	<	} else {
2230	>	}
2231	>	else if (ntohs(*wp) == 0x70fe) // moveq #-2,d0
2232	>	*wp++ = htons(M68K_EMUL_OP_IDLE_TIME_2);
2233	>	else {
2234		D(bug("SynchIdleTime patch not installed\n"));
2235		}
2236		}
2242	–	#endif
2237
2238		// Construct list of all sifters used by sound components in ROM
2239		D(bug("Searching for sound components with type sdev in ROM\n"));
#	Line 2304 \| Line 2298 \| void InstallDrivers(void)
2298		WriteMacInt16(dce + dCtlFlags, SonyDriverFlags);
2299		}
2300
2301	<	#if DISABLE_SCSI && 0
2301	>	#if DISABLE_SCSI && HAVE_SIGSEGV_SKIP_INSTRUCTION
2302		// Fake SCSIGlobals
2303		WriteMacInt32(0xc0c, SheepMem::ZeroPage());
2304		#endif

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Comparing SheepShaver/src/rom_patches.cpp (file contents): Revision 1.23 by gbeauche, 2003-12-15T15:27:01Z vs. Revision 1.31 by gbeauche, 2004-06-29T20:25:54Z

Diff Legend

Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.23 by gbeauche, 2003-12-15T15:27:01Z vs.
Revision 1.31 by gbeauche, 2004-06-29T20:25:54Z