1122 |
|
// Extra routine for 68k emulator start |
1123 |
|
lp = (uint32 *)(ROM_BASE + 0x36f900); |
1124 |
|
*lp++ = htonl(0x7c2903a6); // mtctr r1 |
1125 |
– |
#if EMULATED_PPC |
1126 |
– |
*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT)); |
1127 |
– |
#else |
1125 |
|
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST |
1126 |
|
*lp++ = htonl(0x38210001); // addi r1,r1,1 |
1127 |
|
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST |
1131 |
– |
#endif |
1128 |
|
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA |
1129 |
|
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1) |
1130 |
|
*lp++ = htonl(0x7cc902a6); // mfctr r6 |
1152 |
|
// Extra routine for Mixed Mode |
1153 |
|
lp = (uint32 *)(ROM_BASE + 0x36fa00); |
1154 |
|
*lp++ = htonl(0x7c2903a6); // mtctr r1 |
1159 |
– |
#if EMULATED_PPC |
1160 |
– |
*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT)); |
1161 |
– |
#else |
1155 |
|
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST |
1156 |
|
*lp++ = htonl(0x38210001); // addi r1,r1,1 |
1157 |
|
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST |
1165 |
– |
#endif |
1158 |
|
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA |
1159 |
|
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1) |
1160 |
|
*lp++ = htonl(0x7cc902a6); // mfctr r6 |
1182 |
|
// Extra routine for Reset/FC1E opcode |
1183 |
|
lp = (uint32 *)(ROM_BASE + 0x36fb00); |
1184 |
|
*lp++ = htonl(0x7c2903a6); // mtctr r1 |
1193 |
– |
#if EMULATED_PPC |
1194 |
– |
*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT)); |
1195 |
– |
#else |
1185 |
|
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST |
1186 |
|
*lp++ = htonl(0x38210001); // addi r1,r1,1 |
1187 |
|
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST |
1199 |
– |
#endif |
1188 |
|
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA |
1189 |
|
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1) |
1190 |
|
*lp++ = htonl(0x7cc902a6); // mfctr r6 |
1212 |
|
// Extra routine for FE0A opcode (QuickDraw 3D needs this) |
1213 |
|
lp = (uint32 *)(ROM_BASE + 0x36fc00); |
1214 |
|
*lp++ = htonl(0x7c2903a6); // mtctr r1 |
1227 |
– |
#if EMULATED_PPC |
1228 |
– |
*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT)); |
1229 |
– |
#else |
1215 |
|
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST |
1216 |
|
*lp++ = htonl(0x38210001); // addi r1,r1,1 |
1217 |
|
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST |
1233 |
– |
#endif |
1218 |
|
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA |
1219 |
|
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1) |
1220 |
|
*lp++ = htonl(0x7cc902a6); // mfctr r6 |
1381 |
|
uint32 npc = (uint32)(lp + 1) - ROM_BASE; |
1382 |
|
|
1383 |
|
lp = (uint32 *)(ROM_BASE + 0x318000); |
1400 |
– |
#if EMULATED_PPC |
1401 |
– |
*lp++ = htonl(NativeOpcode(NATIVE_ENABLE_INTERRUPT)); |
1402 |
– |
*lp = htonl(0x48000000 + ((npc - 0x318004) & 0x03fffffc)); // b ROM_BASE+0x312c2c |
1403 |
– |
#else |
1384 |
|
*lp++ = htonl(0x81400000 + XLM_IRQ_NEST); // lwz r10,XLM_IRQ_NEST |
1385 |
|
*lp++ = htonl(0x394affff); // subi r10,r10,1 |
1386 |
|
*lp++ = htonl(0x91400000 + XLM_IRQ_NEST); // stw r10,XLM_IRQ_NEST |
1387 |
|
*lp = htonl(0x48000000 + ((npc - 0x31800c) & 0x03fffffc)); // b ROM_BASE+0x312c2c |
1408 |
– |
#endif |
1388 |
|
|
1389 |
|
/* |
1390 |
|
// Disable FE0A/FE06 opcodes |