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root/cebix/SheepShaver/src/rom_patches.cpp
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Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.29 by gbeauche, 2004-05-31T09:04:42Z vs.
Revision 1.46 by asvitkine, 2009-08-18T18:26:10Z

# Line 1 | Line 1
1   /*
2   *  rom_patches.cpp - ROM patches
3   *
4 < *  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2008 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 148 | Line 148 | bool DecodeROM(uint8 *data, uint32 size)
148   {
149          if (size == ROM_SIZE) {
150                  // Plain ROM image
151 <                memcpy((void *)ROM_BASE, data, ROM_SIZE);
151 >                memcpy(ROMBaseHost, data, ROM_SIZE);
152                  return true;
153          }
154          else if (strncmp((char *)data, "<CHRP-BOOT>", 11) == 0) {
# Line 186 | Line 186 | bool DecodeROM(uint8 *data, uint32 size)
186                  if (rom_signature == FOURCC('p','r','c','l')) {
187                          D(bug("Offset of parcels data: %08x\n", image_offset));
188                          D(bug("Size of parcels data: %08x\n", image_size));
189 <                        decode_parcels(data + image_offset, (uint8 *)ROM_BASE, image_size);
189 >                        decode_parcels(data + image_offset, ROMBaseHost, image_size);
190                  }
191                  else {
192                          D(bug("Offset of compressed data: %08x\n", image_offset));
193                          D(bug("Size of compressed data: %08x\n", image_size));
194 <                        decode_lzss(data + image_offset, (uint8 *)ROM_BASE, image_size);
194 >                        decode_lzss(data + image_offset, ROMBaseHost, image_size);
195                  }
196                  return true;
197          }
# Line 207 | Line 207 | static uint32 find_rom_data(uint32 start
207   {
208          uint32 ofs = start;
209          while (ofs < end) {
210 <                if (!memcmp((void *)(ROM_BASE + ofs), data, data_len))
210 >                if (!memcmp(ROMBaseHost + ofs, data, data_len))
211                          return ofs;
212                  ofs++;
213          }
# Line 224 | Line 224 | static uint32 rsrc_ptr = 0;
224   // id = 4711 means "find any ID"
225   static uint32 find_rom_resource(uint32 s_type, int16 s_id = 4711, bool cont = false)
226   {
227 <        uint32 *lp = (uint32 *)(ROM_BASE + 0x1a);
228 <        uint32 x = ntohl(*lp);
229 <        uint8 *bp = (uint8 *)(ROM_BASE + x + 5);
230 <        uint32 header_size = *bp;
227 >        uint32 lp = ROMBase + 0x1a;
228 >        uint32 x = ReadMacInt32(lp);
229 >        uint32 header_size = ReadMacInt8(ROMBase + x + 5);
230  
231          if (!cont)
232                  rsrc_ptr = x;
# Line 235 | Line 234 | static uint32 find_rom_resource(uint32 s
234                  return 0;
235  
236          for (;;) {
237 <                lp = (uint32 *)(ROM_BASE + rsrc_ptr);
238 <                rsrc_ptr = ntohl(*lp);
237 >                lp = ROMBase + rsrc_ptr;
238 >                rsrc_ptr = ReadMacInt32(lp);
239                  if (rsrc_ptr == 0)
240                          break;
241  
242                  rsrc_ptr += header_size;
243  
244 <                lp = (uint32 *)(ROM_BASE + rsrc_ptr + 4);
245 <                uint32 data = ntohl(*lp); lp++;
246 <                uint32 type = ntohl(*lp); lp++;
247 <                int16 id = ntohs(*(int16 *)lp);
244 >                lp = ROMBase + rsrc_ptr + 4;
245 >                uint32 data = ReadMacInt32(lp);
246 >                uint32 type = ReadMacInt32(lp + 4);
247 >                int16 id = ReadMacInt16(lp + 8);
248                  if (type == s_type && (id == s_id || s_id == 4711))
249                          return data;
250          }
# Line 259 | Line 258 | static uint32 find_rom_resource(uint32 s
258  
259   static uint32 find_rom_trap(uint16 trap)
260   {
261 <        uint32 *lp = (uint32 *)(ROM_BASE + 0x22);
263 <        lp = (uint32 *)(ROM_BASE + ntohl(*lp));
261 >        uint32 lp = ROMBase + ReadMacInt32(ROMBase + 0x22);
262  
263          if (trap > 0xa800)
264 <                return ntohl(lp[trap & 0x3ff]);
264 >                return ReadMacInt32(lp + 4 * (trap & 0x3ff));
265          else
266 <                return ntohl(lp[(trap & 0xff) + 0x400]);
266 >                return ReadMacInt32(lp + 4 * ((trap & 0xff) + 0x400));
267   }
268  
269  
# Line 274 | Line 272 | static uint32 find_rom_trap(uint16 trap)
272   *  there is no such instruction
273   */
274  
275 < static uint32 powerpc_branch_target(uintptr addr)
275 > static uint32 rom_powerpc_branch_target(uint32 addr)
276   {
277 <        uint32 opcode = ntohl(*(uint32 *)addr);
277 >        uint32 opcode = ntohl(*(uint32 *)(ROMBaseHost + addr));
278          uint32 primop = opcode >> 26;
279          uint32 target = 0;
280  
# Line 303 | Line 301 | static uint32 powerpc_branch_target(uint
301   static uint32 find_rom_powerpc_branch(uint32 start, uint32 end, uint32 target)
302   {
303          for (uint32 addr = start; addr < end; addr += 4) {
304 <                if (powerpc_branch_target(ROM_BASE + addr) == ROM_BASE + target)
304 >                if (rom_powerpc_branch_target(addr) == target)
305                          return addr;
306          }
307          return 0;
# Line 318 | Line 316 | static bool check_rom_patch_space(uint32
316   {
317          size = (size + 3) & -4;
318          for (int i = 0; i < size; i += 4) {
319 <                uint32 x = ntohl(*(uint32 *)(ROM_BASE + base + i));
319 >                uint32 x = ntohl(*(uint32 *)(ROMBaseHost + base + i));
320                  if (x != 0x6b636b63 && x != 0)
321                          return false;
322          }
# Line 689 | Line 687 | static inline void memcpy_powerpc_code(v
687   bool PatchROM(void)
688   {
689          // Print ROM info
690 <        D(bug("Checksum: %08lx\n", ntohl(*(uint32 *)ROM_BASE)));
691 <        D(bug("Version: %04x\n", ntohs(*(uint16 *)(ROM_BASE + 8))));
692 <        D(bug("Sub Version: %04x\n", ntohs(*(uint16 *)(ROM_BASE + 18))));
693 <        D(bug("Nanokernel ID: %s\n", (char *)ROM_BASE + 0x30d064));
694 <        D(bug("Resource Map at %08lx\n", ntohl(*(uint32 *)(ROM_BASE + 26))));
695 <        D(bug("Trap Tables at %08lx\n\n", ntohl(*(uint32 *)(ROM_BASE + 34))));
690 >        D(bug("Checksum: %08lx\n", ntohl(*(uint32 *)ROMBaseHost)));
691 >        D(bug("Version: %04x\n", ntohs(*(uint16 *)(ROMBaseHost + 8))));
692 >        D(bug("Sub Version: %04x\n", ntohs(*(uint16 *)(ROMBaseHost + 18))));
693 >        D(bug("Nanokernel ID: %s\n", (char *)ROMBaseHost + 0x30d064));
694 >        D(bug("Resource Map at %08lx\n", ntohl(*(uint32 *)(ROMBaseHost + 26))));
695 >        D(bug("Trap Tables at %08lx\n\n", ntohl(*(uint32 *)(ROMBaseHost + 34))));
696  
697          // Detect ROM type
698 <        if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot TNT", 8))
698 >        if (!memcmp(ROMBaseHost + 0x30d064, "Boot TNT", 8))
699                  ROMType = ROMTYPE_TNT;
700 <        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Alchemy", 12))
700 >        else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Alchemy", 12))
701                  ROMType = ROMTYPE_ALCHEMY;
702 <        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Zanzibar", 13))
702 >        else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Zanzibar", 13))
703                  ROMType = ROMTYPE_ZANZIBAR;
704 <        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gazelle", 12))
704 >        else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Gazelle", 12))
705                  ROMType = ROMTYPE_GAZELLE;
706 <        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gossamer", 13))
706 >        else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Gossamer", 13))
707                  ROMType = ROMTYPE_GOSSAMER;
708 <        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "NewWorld", 8))
708 >        else if (!memcmp(ROMBaseHost + 0x30d064, "NewWorld", 8))
709                  ROMType = ROMTYPE_NEWWORLD;
710          else
711                  return false;
# Line 730 | Line 728 | bool PatchROM(void)
728  
729   #ifdef M68K_BREAK_POINT
730          // Install 68k breakpoint
731 <        uint16 *wp = (uint16 *)(ROM_BASE + M68K_BREAK_POINT);
731 >        uint16 *wp = (uint16 *)(ROMBaseHost + M68K_BREAK_POINT);
732          *wp++ = htons(M68K_EMUL_BREAK);
733          *wp = htons(M68K_EMUL_RETURN);
734   #endif
735  
736   #ifdef POWERPC_BREAK_POINT
737          // Install PowerPC breakpoint
738 <        uint32 *lp = (uint32 *)(ROM_BASE + POWERPC_BREAK_POINT);
738 >        uint32 *lp = (uint32 *)(ROMBaseHost + POWERPC_BREAK_POINT);
739          *lp = htonl(0);
740   #endif
741  
742          // Copy 68k emulator to 2MB boundary
743 <        memcpy((void *)(ROM_BASE + ROM_SIZE), (void *)(ROM_BASE + ROM_SIZE - 0x100000), 0x100000);
743 >        memcpy(ROMBaseHost + ROM_SIZE, ROMBaseHost + (ROM_SIZE - 0x100000), 0x100000);
744          return true;
745   }
746  
# Line 757 | Line 755 | static bool patch_nanokernel_boot(void)
755          uint32 base, loc;
756  
757          // ROM boot structure patches
758 <        lp = (uint32 *)(ROM_BASE + 0x30d000);
758 >        lp = (uint32 *)(ROMBaseHost + 0x30d000);
759          lp[0x9c >> 2] = htonl(KernelDataAddr);                  // LA_InfoRecord
760          lp[0xa0 >> 2] = htonl(KernelDataAddr);                  // LA_KernelData
761          lp[0xa4 >> 2] = htonl(KernelDataAddr + 0x1000); // LA_EmulatorData
762 <        lp[0xa8 >> 2] = htonl(ROM_BASE + 0x480000);             // LA_DispatchTable
763 <        lp[0xac >> 2] = htonl(ROM_BASE + 0x460000);             // LA_EmulatorCode
762 >        lp[0xa8 >> 2] = htonl(ROMBase + 0x480000);              // LA_DispatchTable
763 >        lp[0xac >> 2] = htonl(ROMBase + 0x460000);              // LA_EmulatorCode
764          lp[0x360 >> 2] = htonl(0);                                              // Physical RAM base (? on NewWorld ROM, this contains -1)
765 <        lp[0xfd8 >> 2] = htonl(ROM_BASE + 0x2a);                // 68k reset vector
765 >        lp[0xfd8 >> 2] = htonl(ROMBase + 0x2a);         // 68k reset vector
766  
767          // Skip SR/BAT/SDR init
768          loc = 0x310000;
769          if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_GOSSAMER || ROMType == ROMTYPE_NEWWORLD) {
770 <                lp = (uint32 *)(ROM_BASE + loc);
770 >                lp = (uint32 *)(ROMBaseHost + loc);
771                  *lp++ = htonl(POWERPC_NOP);
772                  *lp = htonl(0x38000000);
773          }
774          static const uint8 sr_init_dat[] = {0x35, 0x4a, 0xff, 0xfc, 0x7d, 0x86, 0x50, 0x2e};
775          if ((base = find_rom_data(0x3101b0, 0x3105b0, sr_init_dat, sizeof(sr_init_dat))) == 0) return false;
776          D(bug("sr_init %08lx\n", base));
777 <        lp = (uint32 *)(ROM_BASE + loc + 8);
778 <        *lp = htonl(0x48000000 | ((base - loc - 8) & 0x3fffffc));       // b            ROM_BASE+0x3101b0
779 <        lp = (uint32 *)(ROM_BASE + base);
777 >        lp = (uint32 *)(ROMBaseHost + loc + 8);
778 >        *lp = htonl(0x48000000 | ((base - loc - 8) & 0x3fffffc));       // b            ROMBase+0x3101b0
779 >        lp = (uint32 *)(ROMBaseHost + base);
780          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);            // lwz  r1,(pointer to Kernel Data)
781          *lp++ = htonl(0x3da0dead);              // lis  r13,0xdead      (start of kernel memory)
782          *lp++ = htonl(0x3dc00010);              // lis  r14,0x0010      (size of page table)
# Line 788 | Line 786 | static bool patch_nanokernel_boot(void)
786          static const uint8 pvr_read_dat[] = {0x7d, 0x9f, 0x42, 0xa6};
787          if ((base = find_rom_data(0x3103b0, 0x3108b0, pvr_read_dat, sizeof(pvr_read_dat))) == 0) return false;
788          D(bug("pvr_read %08lx\n", base));
789 <        lp = (uint32 *)(ROM_BASE + base);
789 >        lp = (uint32 *)(ROMBaseHost + base);
790          *lp = htonl(0x81800000 + XLM_PVR);      // lwz  r12,(theoretical PVR)
791  
792          // Set CPU specific data (even if ROM doesn't have support for that CPU)
# Line 797 | Line 795 | static bool patch_nanokernel_boot(void)
795          uint32 ofs = ntohl(lp[7]) & 0xffff;
796          D(bug("ofs %08lx\n", ofs));
797          lp[8] = htonl((ntohl(lp[8]) & 0xffff) | 0x48000000);    // beq -> b
798 <        loc = (ntohl(lp[8]) & 0xffff) + (uint32)(lp+8) - ROM_BASE;
798 >        loc = (ntohl(lp[8]) & 0xffff) + (uintptr)(lp+8) - (uintptr)ROMBaseHost;
799          D(bug("loc %08lx\n", loc));
800 <        lp = (uint32 *)(ROM_BASE + ofs + 0x310000);
800 >        lp = (uint32 *)(ROMBaseHost + ofs + 0x310000);
801          switch (PVR >> 16) {
802                  case 1:         // 601
803                          lp[0] = htonl(0x1000);          // Page size
# Line 847 | Line 845 | static bool patch_nanokernel_boot(void)
845                          lp[7] = htonl(0x00040004);      // Inst cache assoc/Data cache assoc
846                          lp[8] = htonl(0x00400002);      // TLB total size/TLB assoc
847                          break;
848 <                case 8:         // 750
848 >                case 8:         // 750, 750FX
849 >                case 0x7000:
850                          lp[0] = htonl(0x1000);          // Page size
851                          lp[1] = htonl(0x8000);          // Data cache size
852                          lp[2] = htonl(0x8000);          // Inst cache size
# Line 871 | Line 870 | static bool patch_nanokernel_boot(void)
870                          lp[8] = htonl(0x00800002);      // TLB total size/TLB assoc
871                          break;
872   //              case 11:        // X704?
873 <                case 12:        // 7400, 7410
873 >                case 12:        // 7400, 7410, 7450, 7455, 7457
874                  case 0x800c:
875 +                case 0x8000:
876 +                case 0x8001:
877 +                case 0x8002:
878                          lp[0] = htonl(0x1000);          // Page size
879                          lp[1] = htonl(0x8000);          // Data cache size
880                          lp[2] = htonl(0x8000);          // Inst cache size
# Line 907 | Line 909 | static bool patch_nanokernel_boot(void)
909                          lp[7] = htonl(0x00080008);      // Inst cache assoc/Data cache assoc
910                          lp[8] = htonl(0x00800004);      // TLB total size/TLB assoc
911                          break;
912 +                case 0x39:      // 970
913 +                        lp[0] = htonl(0x1000);          // Page size
914 +                        lp[1] = htonl(0x8000);          // Data cache size
915 +                        lp[2] = htonl(0x10000);         // Inst cache size
916 +                        lp[3] = htonl(0x00200020);      // Coherency block size/Reservation granule size
917 +                        lp[4] = htonl(0x00010020);      // Unified caches/Inst cache line size
918 +                        lp[5] = htonl(0x00200020);      // Data cache line size/Data cache block size touch
919 +                        lp[6] = htonl(0x00800080);      // Inst cache block size/Data cache block size
920 +                        lp[7] = htonl(0x00020002);      // Inst cache assoc/Data cache assoc
921 +                        lp[8] = htonl(0x02000004);      // TLB total size/TLB assoc
922 +                        break;
923                  default:
924                          printf("WARNING: Unknown CPU type\n");
925                          break;
# Line 916 | Line 929 | static bool patch_nanokernel_boot(void)
929          static const uint8 sprg3_mq_dat[] = {0x7d, 0x13, 0x43, 0xa6, 0x3d, 0x00, 0x00, 0x04, 0x7d, 0x00, 0x03, 0xa6, 0x39, 0x00, 0x00, 0x00, 0x7d, 0x00, 0x02, 0xa6};
930          if ((base = find_rom_data(loc + 0x20, loc + 0x60, sprg3_mq_dat, sizeof(sprg3_mq_dat))) == 0) return false;
931          D(bug("sprg3/mq %08lx\n", base));
932 <        lp = (uint32 *)(ROM_BASE + base);
932 >        lp = (uint32 *)(ROMBaseHost + base);
933          lp[0] = htonl(POWERPC_NOP);
934          lp[2] = htonl(POWERPC_NOP);
935          lp[4] = htonl(POWERPC_NOP);
# Line 925 | Line 938 | static bool patch_nanokernel_boot(void)
938          static const uint8 msr_dat[] = {0x7d, 0xc0, 0x00, 0xa6};
939          if ((base = find_rom_data(loc + 0x40, loc + 0x80, msr_dat, sizeof(msr_dat))) == 0) return false;
940          D(bug("msr %08lx\n", base));
941 <        lp = (uint32 *)(ROM_BASE + base);
941 >        lp = (uint32 *)(ROMBaseHost + base);
942          *lp = htonl(0x39c00000);                // li   r14,0
943  
944          // Don't write to DEC
945 <        lp = (uint32 *)(ROM_BASE + loc + 0x70);
945 >        lp = (uint32 *)(ROMBaseHost + loc + 0x70);
946          *lp++ = htonl(POWERPC_NOP);
947 <        loc = (ntohl(lp[0]) & 0xffff) + (uint32)lp - ROM_BASE;
947 >        loc = (ntohl(lp[0]) & 0xffff) + (uintptr)lp - (uintptr)ROMBaseHost;
948          D(bug("loc %08lx\n", loc));
949  
950          // Don't set SPRG3
951          static const uint8 sprg3_dat[] = {0x39, 0x21, 0x03, 0x60, 0x7d, 0x33, 0x43, 0xa6, 0x39, 0x01, 0x04, 0x20};
952          if ((base = find_rom_data(0x310000, 0x314000, sprg3_dat, sizeof(sprg3_dat))) == 0) return false;
953          D(bug("sprg3 %08lx\n", base + 4));
954 <        lp = (uint32 *)(ROM_BASE + base + 4);
954 >        lp = (uint32 *)(ROMBaseHost + base + 4);
955          *lp = htonl(POWERPC_NOP);
956  
957          // Don't read PVR
958          static const uint8 pvr_read2_dat[] = {0x7e, 0xff, 0x42, 0xa6, 0x56, 0xf7, 0x84, 0x3e};
959          if ((base = find_rom_data(0x310000, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) == 0) return false;
960          D(bug("pvr_read2 %08lx\n", base));
961 <        lp = (uint32 *)(ROM_BASE + base);
961 >        lp = (uint32 *)(ROMBaseHost + base);
962          *lp = htonl(0x82e00000 + XLM_PVR);              // lwz  r23,(theoretical PVR)
963          if ((base = find_rom_data(base + 4, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) != 0) {
964                  D(bug("pvr_read2 %08lx\n", base));
965 <                lp = (uint32 *)(ROM_BASE + base);
965 >                lp = (uint32 *)(ROMBaseHost + base);
966                  *lp = htonl(0x82e00000 + XLM_PVR);      // lwz  r23,(theoretical PVR)
967          }
968          static const uint8 pvr_read3_dat[] = {0x7e, 0x5f, 0x42, 0xa6, 0x56, 0x52, 0x84, 0x3e};
969          if ((base = find_rom_data(0x310000, 0x320000, pvr_read3_dat, sizeof(pvr_read3_dat))) != 0) {
970                  D(bug("pvr_read3 %08lx\n", base));
971 <                lp = (uint32 *)(ROM_BASE + base);
971 >                lp = (uint32 *)(ROMBaseHost + base);
972                  *lp = htonl(0x82400000 + XLM_PVR);      // lwz  r18,(theoretical PVR)
973          }
974          static const uint8 pvr_read4_dat[] = {0x7d, 0x3f, 0x42, 0xa6, 0x55, 0x29, 0x84, 0x3e};
975          if ((base = find_rom_data(0x310000, 0x320000, pvr_read4_dat, sizeof(pvr_read4_dat))) != 0) {
976                  D(bug("pvr_read4 %08lx\n", base));
977 <                lp = (uint32 *)(ROM_BASE + base);
977 >                lp = (uint32 *)(ROMBaseHost + base);
978                  *lp = htonl(0x81200000 + XLM_PVR);      // lzw  r9,(theoritical PVR)
979          }
980  
# Line 969 | Line 982 | static bool patch_nanokernel_boot(void)
982          static const uint8 sdr1_read_dat[] = {0x7d, 0x19, 0x02, 0xa6, 0x55, 0x16, 0x81, 0xde};
983          if ((base = find_rom_data(0x310000, 0x320000, sdr1_read_dat, sizeof(sdr1_read_dat))) == 0) return false;
984          D(bug("sdr1_read %08lx\n", base));
985 <        lp = (uint32 *)(ROM_BASE + base);
985 >        lp = (uint32 *)(ROMBaseHost + base);
986          *lp++ = htonl(0x3d00dead);              // lis  r8,0xdead               (pointer to page table)
987          *lp++ = htonl(0x3ec0001f);              // lis  r22,0x001f      (size of page table)
988          *lp = htonl(POWERPC_NOP);
# Line 978 | Line 991 | static bool patch_nanokernel_boot(void)
991          static const uint8 pgtb_clear_dat[] = {0x36, 0xd6, 0xff, 0xfc, 0x7e, 0xe8, 0xb1, 0x2e, 0x41, 0x81, 0xff, 0xf8};
992          if ((base = find_rom_data(0x310000, 0x320000, pgtb_clear_dat, sizeof(pgtb_clear_dat))) == 0) return false;
993          D(bug("pgtb_clear %08lx\n", base + 4));
994 <        lp = (uint32 *)(ROM_BASE + base + 4);
994 >        lp = (uint32 *)(ROMBaseHost + base + 4);
995          *lp = htonl(POWERPC_NOP);
996          D(bug("tblie %08lx\n", base + 12));
997 <        lp = (uint32 *)(ROM_BASE + base + 12);
997 >        lp = (uint32 *)(ROMBaseHost + base + 12);
998          *lp = htonl(POWERPC_NOP);
999  
1000          // Don't create RAM descriptor table
1001          static const uint8 desc_create_dat[] = {0x97, 0xfd, 0x00, 0x04, 0x3b, 0xff, 0x10, 0x00, 0x4b, 0xff, 0xff, 0xdc};
1002          if ((base = find_rom_data(0x310000, 0x320000, desc_create_dat, sizeof(desc_create_dat))) == 0) return false;
1003          D(bug("desc_create %08lx\n", base))
1004 <        lp = (uint32 *)(ROM_BASE + base);
1004 >        lp = (uint32 *)(ROMBaseHost + base);
1005          *lp = htonl(POWERPC_NOP);
1006  
1007          // Don't load SRs and BATs
# Line 998 | Line 1011 | static bool patch_nanokernel_boot(void)
1011          if ((base = find_rom_data(0x310000, 0x320000, sr_load_caller, sizeof(sr_load_caller))) == 0) return false;
1012          if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false;
1013          D(bug("sr_load %08lx, called from %08lx\n", loc, base));
1014 <        lp = (uint32 *)(ROM_BASE + base);
1014 >        lp = (uint32 *)(ROMBaseHost + base);
1015          *lp = htonl(POWERPC_NOP);
1016  
1017          // Don't mess with SRs
1018          static const uint8 sr_load2_dat[] = {0x83, 0xa1, 0x05, 0xe8, 0x57, 0x7c, 0x3e, 0x78, 0x7f, 0xbd, 0xe0, 0x2e};
1019          if ((base = find_rom_data(0x310000, 0x320000, sr_load2_dat, sizeof(sr_load2_dat))) == 0) return false;
1020          D(bug("sr_load2 %08lx\n", base));
1021 <        lp = (uint32 *)(ROM_BASE + base);
1021 >        lp = (uint32 *)(ROMBaseHost + base);
1022          *lp = htonl(POWERPC_BLR);
1023  
1024          // Don't check performance monitor
1025          static const uint8 pm_check_dat[] = {0x7e, 0x58, 0xeb, 0xa6, 0x7e, 0x53, 0x90, 0xf8, 0x7e, 0x78, 0xea, 0xa6};
1026          if ((base = find_rom_data(0x310000, 0x320000, pm_check_dat, sizeof(pm_check_dat))) == 0) return false;
1027          D(bug("pm_check %08lx\n", base));
1028 <        lp = (uint32 *)(ROM_BASE + base);
1028 >        lp = (uint32 *)(ROMBaseHost + base);
1029          
1030          static const int spr_check_list[] = {
1031                  952 /* mmcr0 */, 953 /* pmc1 */, 954 /* pmc2 */, 955 /* sia */,
# Line 1041 | Line 1054 | static bool patch_nanokernel_boot(void)
1054          if ((base = find_rom_data(0x310000, 0x320000, jump68k_caller_dat, sizeof(jump68k_caller_dat))) == 0) return false;
1055          if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false;
1056          D(bug("jump68k %08lx, called from %08lx\n", loc, base));
1057 <        lp = (uint32 *)(ROM_BASE + base);
1057 >        lp = (uint32 *)(ROMBaseHost + base);
1058          *lp++ = htonl(0x80610634);              // lwz  r3,0x0634(r1)   (pointer to Emulator Data)
1059          *lp++ = htonl(0x8081119c);              // lwz  r4,0x119c(r1)   (pointer to opcode table)
1060          *lp++ = htonl(0x80011184);              // lwz  r0,0x1184(r1)   (pointer to emulator init routine)
# Line 1064 | Line 1077 | static bool patch_68k_emul(void)
1077          static const uint8 twi_dat[] = {0x0f, 0xff, 0x00, 0x00, 0x0f, 0xff, 0x00, 0x01, 0x0f, 0xff, 0x00, 0x02};
1078          if ((base = find_rom_data(0x36e600, 0x36ea00, twi_dat, sizeof(twi_dat))) == 0) return false;
1079          D(bug("twi %08lx\n", base));
1080 <        lp = (uint32 *)(ROM_BASE + base);
1080 >        lp = (uint32 *)(ROMBaseHost + base);
1081          *lp++ = htonl(0x48000000 + 0x36f900 - base);            // b 0x36f900 (Emulator start)
1082          *lp++ = htonl(0x48000000 + 0x36fa00 - base - 4);        // b 0x36fa00 (Mixed mode)
1083          *lp++ = htonl(0x48000000 + 0x36fb00 - base - 8);        // b 0x36fb00 (Reset/FC1E opcode)
1084          *lp++ = htonl(0x48000000 + 0x36fc00 - base - 12);       // FE0A opcode
1085          *lp++ = htonl(POWERPC_ILLEGAL);                                         // Interrupt
1086 <        *lp++ = htonl(POWERPC_ILLEGAL);                                         // ?
1086 >        *lp++ = htonl(0x48000000 + 0x36fd00 - base - 20);       // FE0F opcode
1087          *lp++ = htonl(POWERPC_ILLEGAL);
1088          *lp++ = htonl(POWERPC_ILLEGAL);
1089          *lp++ = htonl(POWERPC_ILLEGAL);
# Line 1084 | Line 1097 | static bool patch_68k_emul(void)
1097  
1098   #if EMULATED_PPC
1099          // Install EMUL_RETURN, EXEC_RETURN, EXEC_NATIVE and EMUL_OP opcodes
1100 <        lp = (uint32 *)(ROM_BASE + 0x380000 + (M68K_EMUL_RETURN << 3));
1100 >        lp = (uint32 *)(ROMBaseHost + 0x380000 + (M68K_EMUL_RETURN << 3));
1101          *lp++ = htonl(POWERPC_EMUL_OP);
1102          *lp++ = htonl(0x4bf66e80);                                                      // b    0x366084
1103          *lp++ = htonl(POWERPC_EMUL_OP | 1);
# Line 1097 | Line 1110 | static bool patch_68k_emul(void)
1110          }
1111   #else
1112          // Install EMUL_RETURN, EXEC_RETURN and EMUL_OP opcodes
1113 <        lp = (uint32 *)(ROM_BASE + 0x380000 + (M68K_EMUL_RETURN << 3));
1113 >        lp = (uint32 *)(ROMBaseHost + 0x380000 + (M68K_EMUL_RETURN << 3));
1114          *lp++ = htonl(0x80000000 + XLM_EMUL_RETURN_PROC);       // lwz  r0,XLM_EMUL_RETURN_PROC
1115          *lp++ = htonl(0x4bf705fc);                                                      // b    0x36f800
1116          *lp++ = htonl(0x80000000 + XLM_EXEC_RETURN_PROC);       // lwz  r0,XLM_EXEC_RETURN_PROC
# Line 1110 | Line 1123 | static bool patch_68k_emul(void)
1123          }
1124  
1125          // Extra routines for EMUL_RETURN/EXEC_RETURN/EMUL_OP
1126 <        lp = (uint32 *)(ROM_BASE + 0x36f800);
1126 >        lp = (uint32 *)(ROMBaseHost + 0x36f800);
1127          *lp++ = htonl(0x7c0803a6);                                              // mtlr r0
1128          *lp++ = htonl(0x4e800020);                                              // blr
1129  
# Line 1120 | Line 1133 | static bool patch_68k_emul(void)
1133   #endif
1134  
1135          // Extra routine for 68k emulator start
1136 <        lp = (uint32 *)(ROM_BASE + 0x36f900);
1136 >        lp = (uint32 *)(ROMBaseHost + 0x36f900);
1137          *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1125 #if EMULATED_PPC
1126        *lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
1127 #else
1138          *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1139          *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1140          *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1131 #endif
1141          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1142          *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1143          *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
# Line 1154 | Line 1163 | static bool patch_68k_emul(void)
1163          *lp = htonl(0x4e800020);                                        // blr
1164  
1165          // Extra routine for Mixed Mode
1166 <        lp = (uint32 *)(ROM_BASE + 0x36fa00);
1166 >        lp = (uint32 *)(ROMBaseHost + 0x36fa00);
1167          *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1159 #if EMULATED_PPC
1160        *lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
1161 #else
1168          *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1169          *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1170          *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1165 #endif
1171          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1172          *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1173          *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
# Line 1188 | Line 1193 | static bool patch_68k_emul(void)
1193          *lp = htonl(0x4e800020);                                        // blr
1194  
1195          // Extra routine for Reset/FC1E opcode
1196 <        lp = (uint32 *)(ROM_BASE + 0x36fb00);
1196 >        lp = (uint32 *)(ROMBaseHost + 0x36fb00);
1197          *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1193 #if EMULATED_PPC
1194        *lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
1195 #else
1198          *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1199          *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1200          *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1199 #endif
1201          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1202          *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1203          *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
# Line 1222 | Line 1223 | static bool patch_68k_emul(void)
1223          *lp = htonl(0x4e800020);                                        // blr
1224  
1225          // Extra routine for FE0A opcode (QuickDraw 3D needs this)
1226 <        lp = (uint32 *)(ROM_BASE + 0x36fc00);
1226 >        lp = (uint32 *)(ROMBaseHost + 0x36fc00);
1227          *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1227 #if EMULATED_PPC
1228        *lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
1229 #else
1228          *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1229          *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1230          *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1233 #endif
1231          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1232          *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1233          *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
# Line 1255 | Line 1252 | static bool patch_68k_emul(void)
1252          *lp++ = htonl(0x50e7deb4);                                      // rlwimi       r7,r7,27,$00000020
1253          *lp = htonl(0x4e800020);                                        // blr
1254  
1255 +        // Extra routine for FE0F opcode (power management)
1256 +        lp = (uint32 *)(ROMBaseHost + 0x36fd00);
1257 +        *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1258 +        *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1259 +        *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1260 +        *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1261 +        *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1262 +        *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1263 +        *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
1264 +        *lp++ = htonl(0x90c10004);                                      // stw          r6,$0004(r1)
1265 +        *lp++ = htonl(0x80c1065c);                                      // lwz          r6,$065c(r1)
1266 +        *lp++ = htonl(0x90e6013c);                                      // stw          r7,$013c(r6)
1267 +        *lp++ = htonl(0x91060144);                                      // stw          r8,$0144(r6)
1268 +        *lp++ = htonl(0x9126014c);                                      // stw          r9,$014c(r6)
1269 +        *lp++ = htonl(0x91460154);                                      // stw          r10,$0154(r6)
1270 +        *lp++ = htonl(0x9166015c);                                      // stw          r11,$015c(r6)
1271 +        *lp++ = htonl(0x91860164);                                      // stw          r12,$0164(r6)
1272 +        *lp++ = htonl(0x91a6016c);                                      // stw          r13,$016c(r6)
1273 +        *lp++ = htonl(0x7da00026);                                      // mfcr         r13
1274 +        *lp++ = htonl(0x80e10660);                                      // lwz          r7,$0660(r1)
1275 +        *lp++ = htonl(0x7d8802a6);                                      // mflr         r12
1276 +        *lp++ = htonl(0x50e74001);                                      // rlwimi.      r7,r7,8,$80000000
1277 +        *lp++ = htonl(0x81410604);                                      // lwz          r10,0x0604(r1)
1278 +        *lp++ = htonl(0x7d4803a6);                                      // mtlr         r10
1279 +        *lp++ = htonl(0x7d8a6378);                                      // mr           r10,r12
1280 +        *lp++ = htonl(0x3d600002);                                      // lis          r11,0x0002
1281 +        *lp++ = htonl(0x616bf072);                                      // ori          r11,r11,0xf072 (MSR)
1282 +        *lp++ = htonl(0x50e7deb4);                                      // rlwimi       r7,r7,27,$00000020
1283 +        *lp = htonl(0x4e800020);                                        // blr
1284 +
1285          // Patch DR emulator to jump to right address when an interrupt occurs
1286 <        lp = (uint32 *)(ROM_BASE + 0x370000);
1287 <        while (lp < (uint32 *)(ROM_BASE + 0x380000)) {
1286 >        lp = (uint32 *)(ROMBaseHost + 0x370000);
1287 >        while (lp < (uint32 *)(ROMBaseHost + 0x380000)) {
1288                  if (ntohl(*lp) == 0x4ca80020)           // bclr         5,8
1289                          goto dr_found;
1290                  lp++;
# Line 1266 | Line 1293 | static bool patch_68k_emul(void)
1293          return false;
1294   dr_found:
1295          lp++;
1296 <        loc = (uint32)lp - ROM_BASE;
1297 <        if ((base = powerpc_branch_target(ROM_BASE + loc)) == 0) base = ROM_BASE + loc;
1296 >        loc = (uintptr)lp - (uintptr)ROMBaseHost;
1297 >        if ((base = rom_powerpc_branch_target(loc)) == 0) base = loc;
1298          static const uint8 dr_ret_dat[] = {0x80, 0xbf, 0x08, 0x14, 0x53, 0x19, 0x4d, 0xac, 0x7c, 0xa8, 0x03, 0xa6};
1299 <        if ((base = find_rom_data(base - ROM_BASE, 0x380000, dr_ret_dat, sizeof(dr_ret_dat))) == 0) return false;
1299 >        if ((base = find_rom_data(base, 0x380000, dr_ret_dat, sizeof(dr_ret_dat))) == 0) return false;
1300          D(bug("dr_ret %08lx\n", base));
1301          if (base != loc) {
1302                  // OldWorld ROMs contain an absolute branch
1303 <                D(bug(" patching absolute branch at %08x\n", (uint32)lp - ROM_BASE));
1304 <                *lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff));          // b    DR_CACHE_BASE+0x1f000
1305 <                lp = (uint32 *)(ROM_BASE + 0x37f000);
1306 <                *lp++ = htonl(0x3c000000 + ((ROM_BASE + base) >> 16));                  // lis  r0,xxx
1307 <                *lp++ = htonl(0x60000000 + ((ROM_BASE + base) & 0xffff));               // ori  r0,r0,xxx
1303 >                D(bug(" patching absolute branch at %08x\n", loc));
1304 >                *lp = htonl(0x48000000 + 0xf000 - (loc & 0xffff));                              // b    DR_CACHE_BASE+0x1f000
1305 >                lp = (uint32 *)(ROMBaseHost + 0x37f000);
1306 >                *lp++ = htonl(0x3c000000 + ((ROMBase + base) >> 16));                   // lis  r0,xxx
1307 >                *lp++ = htonl(0x60000000 + ((ROMBase + base) & 0xffff));                // ori  r0,r0,xxx
1308                  *lp++ = htonl(0x7c0803a6);                                                                              // mtlr r0
1309                  *lp = htonl(POWERPC_BLR);                                                                               // blr
1310          }
# Line 1298 | Line 1325 | static bool patch_nanokernel(void)
1325          static const uint8 virt2phys_dat[] = {0x7d, 0x1b, 0x43, 0x78, 0x3b, 0xa1, 0x03, 0x20};
1326          if ((base = find_rom_data(0x313000, 0x314000, virt2phys_dat, sizeof(virt2phys_dat))) == 0) return false;
1327          D(bug("virt2phys %08lx\n", base + 8));
1328 <        lp = (uint32 *)(ROM_BASE + base + 8);   // Don't translate virtual->physical
1328 >        lp = (uint32 *)(ROMBaseHost + base + 8);        // Don't translate virtual->physical
1329          lp[0] = htonl(0x7f7fdb78);                                      // mr           r31,r27
1330          lp[2] = htonl(POWERPC_NOP);
1331  
1332          static const uint8 ppc_excp_tbl_dat[] = {0x39, 0x01, 0x04, 0x20, 0x7d, 0x13, 0x43, 0xa6};
1333          if ((base = find_rom_data(0x313000, 0x314000, ppc_excp_tbl_dat, sizeof(ppc_excp_tbl_dat))) == 0) return false;
1334          D(bug("ppc_excp_tbl %08lx\n", base));
1335 <        lp = (uint32 *)(ROM_BASE + base);               // Don't activate PPC exception table
1335 >        lp = (uint32 *)(ROMBaseHost + base);            // Don't activate PPC exception table
1336          *lp++ = htonl(0x39000000 + MODE_NATIVE);        // li   r8,MODE_NATIVE
1337          *lp = htonl(0x91000000 + XLM_RUN_MODE);         // stw  r8,XLM_RUN_MODE
1338  
1339          static const uint8 save_fpu_dat[] = {0x7d, 0x00, 0x00, 0xa6, 0x61, 0x08, 0x20, 0x00, 0x7d, 0x00, 0x01, 0x24};
1340          if ((base = find_rom_data(0x310000, 0x314000, save_fpu_dat, sizeof(save_fpu_dat))) == 0) return false;
1341          D(bug("save_fpu %08lx\n", base));
1342 <        lp = (uint32 *)(ROM_BASE + base);               // Don't modify MSR to turn on FPU
1342 >        lp = (uint32 *)(ROMBaseHost + base);            // Don't modify MSR to turn on FPU
1343          if (ntohl(lp[4]) != 0x556b04e2) return false;
1344 <        loc = ROM_BASE + base;
1344 >        loc = base;
1345   #if 1
1346          // FIXME: is that really intended?
1347          *lp++ = htonl(POWERPC_NOP);
# Line 1332 | Line 1359 | static bool patch_nanokernel(void)
1359          static const uint8 save_fpu_caller_dat[] = {0x93, 0xa6, 0x01, 0xec, 0x93, 0xc6, 0x01, 0xf4, 0x93, 0xe6, 0x01, 0xfc, 0x40};
1360          if ((base = find_rom_data(0x310000, 0x314000, save_fpu_caller_dat, sizeof(save_fpu_caller_dat))) == 0) return false;
1361          D(bug("save_fpu_caller %08lx\n", base + 12));
1362 <        if (powerpc_branch_target(ROM_BASE + base + 12) != loc) return false;
1363 <        lp = (uint32 *)(ROM_BASE + base + 12);  // Always save FPU state
1362 >        if (rom_powerpc_branch_target(base + 12) != loc) return false;
1363 >        lp = (uint32 *)(ROMBaseHost + base + 12);       // Always save FPU state
1364          *lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312e88
1365  
1366          static const uint8 mdec_dat[] = {0x7f, 0xf6, 0x02, 0xa6, 0x2c, 0x08, 0x00, 0x00, 0x93, 0xe1, 0x06, 0x68, 0x7d, 0x16, 0x03, 0xa6};
1367          if ((base = find_rom_data(0x310000, 0x314000, mdec_dat, sizeof(mdec_dat))) == 0) return false;
1368          D(bug("mdec %08lx\n", base));
1369 <        lp = (uint32 *)(ROM_BASE + base);               // Don't modify DEC
1369 >        lp = (uint32 *)(ROMBaseHost + base);            // Don't modify DEC
1370          lp[0] = htonl(0x3be00000);                                      // li   r31,0
1371   #if 1
1372          lp[3] = htonl(POWERPC_NOP);
# Line 1352 | Line 1379 | static bool patch_nanokernel(void)
1379          static const uint8 restore_fpu_caller_dat[] = {0x81, 0x06, 0x00, 0xf4, 0x81, 0x46, 0x00, 0xfc, 0x7d, 0x09, 0x03, 0xa6, 0x40};
1380          if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller_dat, sizeof(restore_fpu_caller_dat))) == 0) return false;
1381          D(bug("restore_fpu_caller %08lx\n", base + 12));
1382 <        lp = (uint32 *)(ROM_BASE + base + 12);  // Always restore FPU state
1382 >        lp = (uint32 *)(ROMBaseHost + base + 12);       // Always restore FPU state
1383          *lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312ddc
1384  
1385          static const uint8 m68k_excp_tbl_dat[] = {0x81, 0x21, 0x06, 0x58, 0x39, 0x01, 0x03, 0x60, 0x7d, 0x13, 0x43, 0xa6};
1386          if ((base = find_rom_data(0x310000, 0x314000, m68k_excp_tbl_dat, sizeof(m68k_excp_tbl_dat))) == 0) return false;
1387          D(bug("m68k_excp %08lx\n", base + 4));
1388 <        lp = (uint32 *)(ROM_BASE + base + 4);   // Don't activate 68k exception table
1388 >        lp = (uint32 *)(ROMBaseHost + base + 4);        // Don't activate 68k exception table
1389          *lp++ = htonl(0x39000000 + MODE_68K);           // li   r8,MODE_68K
1390          *lp = htonl(0x91000000 + XLM_RUN_MODE);         // stw  r8,XLM_RUN_MODE
1391  
# Line 1366 | Line 1393 | static bool patch_nanokernel(void)
1393          static const uint8 restore_fpu_caller2_dat[] = {0x81, 0x86, 0x00, 0x8c, 0x80, 0x66, 0x00, 0x94, 0x80, 0x86, 0x00, 0x9c, 0x40};
1394          if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller2_dat, sizeof(restore_fpu_caller2_dat))) == 0) return false;
1395          D(bug("restore_fpu_caller2 %08lx\n", base + 12));
1396 <        loc = powerpc_branch_target(ROM_BASE + base + 12) - ROM_BASE;
1397 <        lp = (uint32 *)(ROM_BASE + base + 12);  // Always restore FPU state
1396 >        loc = rom_powerpc_branch_target(base + 12);
1397 >        lp = (uint32 *)(ROMBaseHost + base + 12);       // Always restore FPU state
1398          *lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312dd4
1399  
1400          static const uint8 restore_fpu_dat[] = {0x55, 0x68, 0x04, 0xa5, 0x4c, 0x82, 0x00, 0x20, 0x81, 0x06, 0x00, 0xe4};
1401          if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_dat, sizeof(restore_fpu_dat))) == 0) return false;
1402          D(bug("restore_fpu %08lx\n", base));
1403          if (base != loc) return false;
1404 <        lp = (uint32 *)(ROM_BASE + base + 4);   // Don't modify MSR to turn on FPU
1404 >        lp = (uint32 *)(ROMBaseHost + base + 4);        // Don't modify MSR to turn on FPU
1405          *lp++ = htonl(POWERPC_NOP);
1406          lp += 2;
1407          *lp++ = htonl(POWERPC_NOP);
# Line 1383 | Line 1410 | static bool patch_nanokernel(void)
1410          *lp++ = htonl(POWERPC_NOP);
1411          *lp = htonl(POWERPC_NOP);
1412  
1413 +        // Disable suspend (FE0F opcode)
1414 +        // TODO: really suspend SheepShaver?
1415 +        static const uint8 suspend_dat[] = {0x7c, 0x88, 0x68, 0x39, 0x41, 0x9d};
1416 +        if ((base = find_rom_data(0x315000, 0x316000, suspend_dat, sizeof(suspend_dat))) == 0) return false;
1417 +        D(bug("suspend %08lx\n", base));
1418 +        lp = (uint32 *)(ROMBaseHost + base + 4);
1419 +        *lp = htonl((ntohl(*lp) & 0xffff) | 0x48000000);        // bgt -> b
1420 +
1421          // Patch trap return routine
1422          static const uint8 trap_return_dat[] = {0x80, 0xc1, 0x00, 0x18, 0x80, 0x21, 0x00, 0x04, 0x4c, 0x00, 0x00, 0x64};
1423          if ((base = find_rom_data(0x312000, 0x320000, trap_return_dat, sizeof(trap_return_dat))) == 0) return false;
1424          D(bug("trap_return %08lx\n", base + 8));
1425 <        lp = (uint32 *)(ROM_BASE + base + 8);   // Replace rfi
1425 >        lp = (uint32 *)(ROMBaseHost + base + 8);        // Replace rfi
1426          *lp = htonl(POWERPC_BCTR);
1427  
1428          while (ntohl(*lp) != 0x7d5a03a6) lp--;
1429          *lp++ = htonl(0x7d4903a6);                                      // mtctr        r10
1430          *lp++ = htonl(0x7daff120);                                      // mtcr r13
1431 <        *lp = htonl(0x48000000 + ((0x318000 - ((uint32)lp - ROM_BASE)) & 0x03fffffc));  // b            ROM_BASE+0x318000
1432 <        uint32 npc = (uint32)(lp + 1) - ROM_BASE;
1431 >        *lp = htonl(0x48000000 + ((0x318000 - ((uintptr)lp - (uintptr)ROMBaseHost)) & 0x03fffffc));     // b            ROMBase+0x318000
1432 >        uint32 npc = (uintptr)(lp + 1) - (uintptr)ROMBaseHost;
1433  
1434 <        lp = (uint32 *)(ROM_BASE + 0x318000);
1400 < #if EMULATED_PPC
1401 <        *lp++ = htonl(NativeOpcode(NATIVE_ENABLE_INTERRUPT));
1402 <        *lp = htonl(0x48000000 + ((npc - 0x318004) & 0x03fffffc));      // b            ROM_BASE+0x312c2c
1403 < #else
1434 >        lp = (uint32 *)(ROMBaseHost + 0x318000);
1435          *lp++ = htonl(0x81400000 + XLM_IRQ_NEST);       // lwz  r10,XLM_IRQ_NEST
1436          *lp++ = htonl(0x394affff);                                      // subi r10,r10,1
1437          *lp++ = htonl(0x91400000 + XLM_IRQ_NEST);       // stw  r10,XLM_IRQ_NEST
1438 <        *lp = htonl(0x48000000 + ((npc - 0x31800c) & 0x03fffffc));      // b            ROM_BASE+0x312c2c
1439 < #endif
1438 >        *lp = htonl(0x48000000 + ((npc - 0x31800c) & 0x03fffffc));      // b            ROMBase+0x312c2c
1439 >
1440 >        // Patch FEOA opcode, selector 0x0A (virtual->physical page index)
1441 >        static const uint8 fe0a_0a_dat[] = {0x55, 0x23, 0xa3, 0x3e, 0x4b};
1442 >        if ((base = find_rom_data(0x314000, 0x318000, fe0a_0a_dat, sizeof(fe0a_0a_dat))) == 0) return false;
1443 >        loc = rom_powerpc_branch_target(base - 8);
1444 >        static const uint8 fe0a_dat[] = {0x7e, 0x04, 0x48, 0x40, 0x81, 0xe1, 0x06, 0xb0, 0x54, 0x88, 0x10, 0x3a, 0x40, 0x90};
1445 >        if (find_rom_data(loc, 0x318000, fe0a_dat, sizeof(fe0a_dat)) != loc) return false;
1446 >        D(bug("fe0a_0a %08lx\n", base - 8));
1447 >        lp = (uint32 *)(ROMBaseHost + base - 8);
1448 >        *lp++ = htonl(0x7c832378);                                      // mr   r3,r4
1449 >        *lp++ = htonl(POWERPC_NOP);
1450 >        *lp = htonl(POWERPC_NOP);
1451 >
1452 >        // Disable FE0A opcode, selector 0x11 (init page tables?)
1453 >        static const uint8 fe0a_11_dat[] = {0x56, 0x07, 0x06, 0x74, 0x2c, 0x07, 0x00, 0x60, 0x40};
1454 >        if ((base = find_rom_data(0x314000, 0x318000, fe0a_11_dat, sizeof(fe0a_11_dat))) == 0) return false;
1455 >        loc = rom_powerpc_branch_target(base - 4);
1456 >        if (find_rom_data(0x314000, 0x318000, fe0a_dat, sizeof(fe0a_dat)) != loc) return false;
1457 >        D(bug("fe0a_11 %08lx\n", base - 4));
1458 >        lp = (uint32 *)(ROMBaseHost + base - 4);
1459 >        *lp++ = htonl(POWERPC_NOP);
1460 >        *lp++ = htonl(POWERPC_NOP);
1461 >        *lp++ = htonl(POWERPC_NOP);
1462 >        *lp = htonl(ntohl(*lp) | 0x02800000);           // bf => ba
1463 >
1464 >        // Patch FE0A opcode to fake a page table entry so that V=P for RAM and ROM
1465 >        static const uint8 pg_lookup_dat[] = {0x7e, 0x0f, 0x40, 0x6e, 0x81, 0xc1, 0x06, 0xa4, 0x7e, 0x00, 0x71, 0x20};
1466 >        if ((base = find_rom_data(0x310000, 0x320000, pg_lookup_dat, sizeof(pg_lookup_dat))) == 0) return false;
1467 >        D(bug("fe0a_pgtb_lookup %08lx\n", base - 12));
1468 >        lp = (uint32 *)(ROMBaseHost + base - 12);
1469 >        if (ntohl(lp[0]) != 0x81e106b0)                         // lwz  r15,$06b0(r1)
1470 >                return false;
1471 >        lp[0] = htonl(0x54906026);                                      // slwi r16,r4,12
1472 >        lp[3] = htonl(0x62100121);                                      // ori  r16,r16,0x121
1473 >
1474 >        // Patch FE0A opcode to not write to kernel memory
1475 >        static const uint8 krnl_write_dat[] = {0x38, 0xe0, 0x00, 0x01, 0x7e, 0x10, 0x38, 0x78, 0x92, 0x0f, 0x00, 0x00};
1476 >        if ((base = find_rom_data(0x310000, 0x320000, krnl_write_dat, sizeof(krnl_write_dat))) == 0) return false;
1477 >        D(bug("fe0a_krnl_write %08lx\n", base));
1478 >        lp = (uint32 *)(ROMBaseHost + base);
1479 >        lp[2] = htonl(POWERPC_NOP);
1480  
1481   /*
1482          // Disable FE0A/FE06 opcodes
1483 <        lp = (uint32 *)(ROM_BASE + 0x3144ac);
1483 >        lp = (uint32 *)(ROMBase + 0x3144ac);
1484          *lp++ = htonl(POWERPC_NOP);
1485          *lp += 8;
1486   */
# Line 1432 | Line 1503 | static bool patch_68k(void)
1503          static const uint8 reset_dat[] = {0x4e, 0x70};
1504          if ((base = find_rom_data(0xc8, 0x120, reset_dat, sizeof(reset_dat))) == 0) return false;
1505          D(bug("reset %08lx\n", base));
1506 <        wp = (uint16 *)(ROM_BASE + base);
1506 >        wp = (uint16 *)(ROMBaseHost + base);
1507          *wp = htons(M68K_NOP);
1508  
1509          // Fake reading PowerMac ID (via Universal)
1510          static const uint8 powermac_id_dat[] = {0x45, 0xf9, 0x5f, 0xff, 0xff, 0xfc, 0x20, 0x12, 0x72, 0x00};
1511          if ((base = find_rom_data(0xe000, 0x15000, powermac_id_dat, sizeof(powermac_id_dat))) == 0) return false;
1512          D(bug("powermac_id %08lx\n", base));
1513 <        wp = (uint16 *)(ROM_BASE + base);
1513 >        wp = (uint16 *)(ROMBaseHost + base);
1514          *wp++ = htons(0x203c);                  // move.l       #id,d0
1515          *wp++ = htons(0);
1516   //      if (ROMType == ROMTYPE_NEWWORLD)
# Line 1454 | Line 1525 | static bool patch_68k(void)
1525                  static const uint8 univ_info_dat[] = {0x3f, 0xff, 0x04, 0x00};
1526                  if ((base = find_rom_data(0x14000, 0x18000, univ_info_dat, sizeof(univ_info_dat))) == 0) return false;
1527                  D(bug("universal_info %08lx\n", base));
1528 <                lp = (uint32 *)(ROM_BASE + base - 0x14);
1528 >                lp = (uint32 *)(ROMBaseHost + base - 0x14);
1529                  lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1530                  lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1531                  lp[0x14 >> 2] = htonl(0x3fff0401);
# Line 1466 | Line 1537 | static bool patch_68k(void)
1537                  lp[0x60 >> 2] = htonl(0x0000003d);
1538          } else if (ROMType == ROMTYPE_ZANZIBAR) {
1539                  base = 0x12b70;
1540 <                lp = (uint32 *)(ROM_BASE + base - 0x14);
1540 >                lp = (uint32 *)(ROMBaseHost + base - 0x14);
1541                  lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1542                  lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1543                  lp[0x14 >> 2] = htonl(0x3fff0401);
# Line 1478 | Line 1549 | static bool patch_68k(void)
1549                  lp[0x60 >> 2] = htonl(0x0000003d);
1550          } else if (ROMType == ROMTYPE_GOSSAMER) {
1551                  base = 0x12d20;
1552 <                lp = (uint32 *)(ROM_BASE + base - 0x14);
1552 >                lp = (uint32 *)(ROMBaseHost + base - 0x14);
1553                  lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1554                  lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1555                  lp[0x14 >> 2] = htonl(0x3fff0401);
# Line 1492 | Line 1563 | static bool patch_68k(void)
1563  
1564          // Construct AddrMap for NewWorld ROM
1565          if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) {
1566 <                lp = (uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE);
1566 >                lp = (uint32 *)(ROMBaseHost + ADDR_MAP_PATCH_SPACE);
1567                  memset(lp - 10, 0, 0x128);
1568                  lp[-10] = htonl(0x0300001c);
1569                  lp[-9] = htonl(0x000108c4);
# Line 1516 | Line 1587 | static bool patch_68k(void)
1587          static const uint8 via_init_dat[] = {0x08, 0x00, 0x00, 0x02, 0x67, 0x00, 0x00, 0x2c, 0x24, 0x68, 0x00, 0x08};
1588          if ((base = find_rom_data(0xe000, 0x15000, via_init_dat, sizeof(via_init_dat))) == 0) return false;
1589          D(bug("via_init %08lx\n", base));
1590 <        wp = (uint16 *)(ROM_BASE + base + 4);
1590 >        wp = (uint16 *)(ROMBaseHost + base + 4);
1591          *wp = htons(0x6000);                    // bra
1592  
1593          static const uint8 via_init2_dat[] = {0x24, 0x68, 0x00, 0x08, 0x00, 0x12, 0x00, 0x30, 0x4e, 0x71};
1594          if ((base = find_rom_data(0xa000, 0x10000, via_init2_dat, sizeof(via_init2_dat))) == 0) return false;
1595          D(bug("via_init2 %08lx\n", base));
1596 <        wp = (uint16 *)(ROM_BASE + base);
1596 >        wp = (uint16 *)(ROMBaseHost + base);
1597          *wp = htons(0x4ed6);                    // jmp  (a6)
1598  
1599          static const uint8 via_init3_dat[] = {0x22, 0x68, 0x00, 0x08, 0x28, 0x3c, 0x20, 0x00, 0x01, 0x00};
1600          if ((base = find_rom_data(0xa000, 0x10000, via_init3_dat, sizeof(via_init3_dat))) == 0) return false;
1601          D(bug("via_init3 %08lx\n", base));
1602 <        wp = (uint16 *)(ROM_BASE + base);
1602 >        wp = (uint16 *)(ROMBaseHost + base);
1603          *wp = htons(0x4ed6);                    // jmp  (a6)
1604  
1605          // Don't RunDiags, get BootGlobs pointer directly
# Line 1536 | Line 1607 | static bool patch_68k(void)
1607                  static const uint8 run_diags_dat[] = {0x60, 0xff, 0x00, 0x0c};
1608                  if ((base = find_rom_data(0x110, 0x128, run_diags_dat, sizeof(run_diags_dat))) == 0) return false;
1609                  D(bug("run_diags %08lx\n", base));
1610 <                wp = (uint16 *)(ROM_BASE + base);
1610 >                wp = (uint16 *)(ROMBaseHost + base);
1611                  *wp++ = htons(0x4df9);                  // lea  xxx,a6
1612                  *wp++ = htons((RAMBase + RAMSize - 0x1c) >> 16);
1613                  *wp = htons((RAMBase + RAMSize - 0x1c) & 0xffff);
# Line 1544 | Line 1615 | static bool patch_68k(void)
1615                  static const uint8 run_diags_dat[] = {0x74, 0x00, 0x2f, 0x0e};
1616                  if ((base = find_rom_data(0xd0, 0xf0, run_diags_dat, sizeof(run_diags_dat))) == 0) return false;
1617                  D(bug("run_diags %08lx\n", base));
1618 <                wp = (uint16 *)(ROM_BASE + base - 6);
1618 >                wp = (uint16 *)(ROMBaseHost + base - 6);
1619                  *wp++ = htons(0x4df9);                  // lea  xxx,a6
1620                  *wp++ = htons((RAMBase + RAMSize - 0x1c) >> 16);
1621                  *wp = htons((RAMBase + RAMSize - 0x1c) & 0xffff);
# Line 1554 | Line 1625 | static bool patch_68k(void)
1625          static const uint8 nvram1_dat[] = {0x48, 0xe7, 0x01, 0x0e, 0x24, 0x68, 0x00, 0x08, 0x08, 0x83, 0x00, 0x1f};
1626          if ((base = find_rom_data(0x7000, 0xc000, nvram1_dat, sizeof(nvram1_dat))) == 0) return false;
1627          D(bug("nvram1 %08lx\n", base));
1628 <        wp = (uint16 *)(ROM_BASE + base);
1628 >        wp = (uint16 *)(ROMBaseHost + base);
1629          *wp++ = htons(M68K_EMUL_OP_XPRAM1);
1630          *wp = htons(M68K_RTS);
1631  
# Line 1562 | Line 1633 | static bool patch_68k(void)
1633                  static const uint8 nvram2_dat[] = {0x48, 0xe7, 0x1c, 0xe0, 0x4f, 0xef, 0xff, 0xb4};
1634                  if ((base = find_rom_data(0xa000, 0xd000, nvram2_dat, sizeof(nvram2_dat))) == 0) return false;
1635                  D(bug("nvram2 %08lx\n", base));
1636 <                wp = (uint16 *)(ROM_BASE + base);
1636 >                wp = (uint16 *)(ROMBaseHost + base);
1637                  *wp++ = htons(M68K_EMUL_OP_XPRAM2);
1638                  *wp = htons(0x4ed3);                    // jmp  (a3)
1639  
1640                  static const uint8 nvram3_dat[] = {0x48, 0xe7, 0xdc, 0xe0, 0x4f, 0xef, 0xff, 0xb4};
1641                  if ((base = find_rom_data(0xa000, 0xd000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1642                  D(bug("nvram3 %08lx\n", base));
1643 <                wp = (uint16 *)(ROM_BASE + base);
1643 >                wp = (uint16 *)(ROMBaseHost + base);
1644                  *wp++ = htons(M68K_EMUL_OP_XPRAM3);
1645                  *wp = htons(0x4ed3);                    // jmp  (a3)
1646  
1647                  static const uint8 nvram4_dat[] = {0x4e, 0x56, 0xff, 0xa8, 0x48, 0xe7, 0x1f, 0x38, 0x16, 0x2e, 0x00, 0x13};
1648                  if ((base = find_rom_data(0xa000, 0xd000, nvram4_dat, sizeof(nvram4_dat))) == 0) return false;
1649                  D(bug("nvram4 %08lx\n", base));
1650 <                wp = (uint16 *)(ROM_BASE + base + 16);
1650 >                wp = (uint16 *)(ROMBaseHost + base + 16);
1651                  *wp++ = htons(0x1a2e);                  // move.b       ($000f,a6),d5
1652                  *wp++ = htons(0x000f);
1653                  *wp++ = htons(M68K_EMUL_OP_NVRAM3);
# Line 1589 | Line 1660 | static bool patch_68k(void)
1660                  static const uint8 nvram5_dat[] = {0x0c, 0x80, 0x03, 0x00, 0x00, 0x00, 0x66, 0x0a, 0x70, 0x00, 0x21, 0xf8, 0x02, 0x0c, 0x01, 0xe4};
1661                  if ((base = find_rom_data(0xa000, 0xd000, nvram5_dat, sizeof(nvram5_dat))) == 0) return false;
1662                  D(bug("nvram5 %08lx\n", base));
1663 <                wp = (uint16 *)(ROM_BASE + base + 6);
1663 >                wp = (uint16 *)(ROMBaseHost + base + 6);
1664                  *wp = htons(M68K_NOP);
1665  
1666                  static const uint8 nvram6_dat[] = {0x2f, 0x0a, 0x24, 0x48, 0x4f, 0xef, 0xff, 0xa0, 0x20, 0x0f};
1667                  if ((base = find_rom_data(0x9000, 0xb000, nvram6_dat, sizeof(nvram6_dat))) == 0) return false;
1668                  D(bug("nvram6 %08lx\n", base));
1669 <                wp = (uint16 *)(ROM_BASE + base);
1669 >                wp = (uint16 *)(ROMBaseHost + base);
1670                  *wp++ = htons(0x7000);                  // moveq        #0,d0
1671                  *wp++ = htons(0x2080);                  // move.l       d0,(a0)
1672                  *wp++ = htons(0x4228);                  // clr.b        4(a0)
# Line 1606 | Line 1677 | static bool patch_68k(void)
1677                  base = find_rom_data(0x9000, 0xb000, nvram7_dat, sizeof(nvram7_dat));
1678                  if (base) {
1679                          D(bug("nvram7 %08lx\n", base));
1680 <                        wp = (uint16 *)(ROM_BASE + base + 12);
1680 >                        wp = (uint16 *)(ROMBaseHost + base + 12);
1681                          *wp = htons(M68K_RTS);
1682                  }
1683          } else {
1684                  static const uint8 nvram2_dat[] = {0x4e, 0xd6, 0x06, 0x41, 0x13, 0x00};
1685                  if ((base = find_rom_data(0x7000, 0xb000, nvram2_dat, sizeof(nvram2_dat))) == 0) return false;
1686                  D(bug("nvram2 %08lx\n", base));
1687 <                wp = (uint16 *)(ROM_BASE + base + 2);
1687 >                wp = (uint16 *)(ROMBaseHost + base + 2);
1688                  *wp++ = htons(M68K_EMUL_OP_XPRAM2);
1689                  *wp = htons(0x4ed3);                    // jmp  (a3)
1690  
1691                  static const uint8 nvram3_dat[] = {0x4e, 0xd3, 0x06, 0x41, 0x13, 0x00};
1692                  if ((base = find_rom_data(0x7000, 0xb000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1693                  D(bug("nvram3 %08lx\n", base));
1694 <                wp = (uint16 *)(ROM_BASE + base + 2);
1694 >                wp = (uint16 *)(ROMBaseHost + base + 2);
1695                  *wp++ = htons(M68K_EMUL_OP_XPRAM3);
1696                  *wp = htons(0x4ed3);                    // jmp  (a3)
1697  
1698                  static const uint32 nvram4_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0x538d0, 0};
1699 <                wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1699 >                wp = (uint16 *)(ROMBaseHost + nvram4_loc[ROMType]);
1700                  *wp++ = htons(0x202f);                  // move.l       4(sp),d0
1701                  *wp++ = htons(0x0004);
1702                  *wp++ = htons(M68K_EMUL_OP_NVRAM1);
# Line 1639 | Line 1710 | static bool patch_68k(void)
1710                  }
1711  
1712                  static const uint32 nvram5_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0x53a20, 0};
1713 <                wp = (uint16 *)(ROM_BASE + nvram5_loc[ROMType]);
1713 >                wp = (uint16 *)(ROMBaseHost + nvram5_loc[ROMType]);
1714                  if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GAZELLE) {
1715                          *wp++ = htons(0x202f);                  // move.l       4(sp),d0
1716                          *wp++ = htons(0x0004);
# Line 1662 | Line 1733 | static bool patch_68k(void)
1733          static const uint8 mem_top_dat[] = {0x2c, 0x6c, 0xff, 0xec, 0x2a, 0x4c, 0xdb, 0xec, 0xff, 0xf4};
1734          if ((base = find_rom_data(0x120, 0x180, mem_top_dat, sizeof(mem_top_dat))) == 0) return false;
1735          D(bug("mem_top %08lx\n", base));
1736 <        wp = (uint16 *)(ROM_BASE + base);
1736 >        wp = (uint16 *)(ROMBaseHost + base);
1737          *wp++ = htons(M68K_EMUL_OP_FIX_MEMTOP);
1738          *wp = htons(M68K_NOP);
1739  
# Line 1670 | Line 1741 | static bool patch_68k(void)
1741          static const uint8 scc_init_caller_dat[] = {0x21, 0xce, 0x01, 0x08, 0x22, 0x78, 0x0d, 0xd8};
1742          if ((base = find_rom_data(0x180, 0x1f0, scc_init_caller_dat, sizeof(scc_init_caller_dat))) == 0) return false;
1743          D(bug("scc_init_caller %08lx\n", base + 12));
1744 <        wp = (uint16 *)(ROM_BASE + base + 12);
1745 <        loc = ntohs(wp[1]) + ((uintptr)wp - ROM_BASE) + 2;
1744 >        wp = (uint16 *)(ROMBaseHost + base + 12);
1745 >        loc = ntohs(wp[1]) + ((uintptr)wp - (uintptr)ROMBaseHost) + 2;
1746          static const uint8 scc_init_dat[] = {0x20, 0x78, 0x01, 0xdc, 0x22, 0x78, 0x01, 0xd8};
1747          if ((base = find_rom_data(loc, loc + 0x80, scc_init_dat, sizeof(scc_init_dat))) == 0) return false;
1748          D(bug("scc_init %08lx\n", base));
1749 <        wp = (uint16 *)(ROM_BASE + base);
1749 >        wp = (uint16 *)(ROMBaseHost + base);
1750          *wp++ = htons(M68K_EMUL_OP_RESET);
1751          *wp = htons(M68K_RTS);
1752  
# Line 1683 | Line 1754 | static bool patch_68k(void)
1754          static const uint8 ext_cache_dat[] = {0x4e, 0x7b, 0x00, 0x02};
1755          if ((base = find_rom_data(0x1d0, 0x230, ext_cache_dat, sizeof(ext_cache_dat))) == 0) return false;
1756          D(bug("ext_cache %08lx\n", base));
1757 <        lp = (uint32 *)(ROM_BASE + base + 6);
1758 <        wp = (uint16 *)(ROM_BASE + ntohl(*lp) + base + 6);
1757 >        loc = ReadMacInt32(ROMBase + base + 6);
1758 >        wp = (uint16 *)(ROMBaseHost + loc + base + 6);
1759          *wp = htons(M68K_RTS);
1760 <        lp = (uint32 *)(ROM_BASE + base + 12);
1761 <        wp = (uint16 *)(ROM_BASE + ntohl(*lp) + base + 12);
1760 >        loc = ReadMacInt32(ROMBase + base + 12);
1761 >        wp = (uint16 *)(ROMBaseHost + loc + base + 12);
1762          *wp = htons(M68K_RTS);
1763  
1764          // Fake CPU speed test (SetupTimeK)
1765          static const uint8 timek_dat[] = {0x0c, 0x38, 0x00, 0x04, 0x01, 0x2f, 0x6d, 0x3c};
1766          if ((base = find_rom_data(0x400, 0x500, timek_dat, sizeof(timek_dat))) == 0) return false;
1767          D(bug("timek %08lx\n", base));
1768 <        wp = (uint16 *)(ROM_BASE + base);
1768 >        wp = (uint16 *)(ROMBaseHost + base);
1769          *wp++ = htons(0x31fc);                  // move.w       #xxx,TimeDBRA
1770          *wp++ = htons(100);
1771          *wp++ = htons(0x0d00);
# Line 1713 | Line 1784 | static bool patch_68k(void)
1784          static const uint8 jump_tab_dat[] = {0x41, 0xfa, 0x00, 0x0e, 0x21, 0xc8, 0x20, 0x10, 0x4e, 0x75};
1785          if ((base = find_rom_data(0x3000, 0x6000, jump_tab_dat, sizeof(jump_tab_dat))) == 0) return false;
1786          D(bug("jump_tab %08lx\n", base));
1787 <        lp = (uint32 *)(ROM_BASE + base + 16);
1787 >        lp = (uint32 *)(ROMBaseHost + base + 16);
1788          for (;;) {
1789 <                D(bug(" %08lx\n", (uint32)lp - ROM_BASE));
1789 >                D(bug(" %08lx\n", (uintptr)lp - (uintptr)ROMBaseHost));
1790                  while ((ntohl(*lp) & 0xff000000) == 0xff000000) {
1791 <                        *lp = htonl((ntohl(*lp) & (ROM_SIZE-1)) + ROM_BASE);
1791 >                        *lp = htonl((ntohl(*lp) & (ROM_SIZE-1)) + ROMBase);
1792                          lp++;
1793                  }
1794                  while (!ntohl(*lp)) lp++;
# Line 1730 | Line 1801 | static bool patch_68k(void)
1801          static const uint8 sys_zone_dat[] = {0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x40, 0x00};
1802          if ((base = find_rom_data(0x600, 0x900, sys_zone_dat, sizeof(sys_zone_dat))) == 0) return false;
1803          D(bug("sys_zone %08lx\n", base));
1804 <        lp = (uint32 *)(ROM_BASE + base);
1804 >        lp = (uint32 *)(ROMBaseHost + base);
1805          *lp++ = htonl(RAMBase ? RAMBase : 0x3000);
1806          *lp = htonl(RAMBase ? RAMBase + 0x1800 : 0x4800);
1807  
# Line 1739 | Line 1810 | static bool patch_68k(void)
1810          static const uint8 boot_stack_dat[] = {0x08, 0x38, 0x00, 0x06, 0x24, 0x0b};
1811          if ((base = find_rom_data(0x580, 0x800, boot_stack_dat, sizeof(boot_stack_dat))) == 0) return false;
1812          D(bug("boot_stack %08lx\n", base));
1813 <        wp = (uint16 *)(ROM_BASE + base);
1813 >        wp = (uint16 *)(ROMBaseHost + base);
1814          *wp++ = htons(0x207c);                  // move.l       #RAMBase+0x3ffffe,a0
1815          *wp++ = htons((RAMBase + 0x3ffffe) >> 16);
1816          *wp++ = htons((RAMBase + 0x3ffffe) & 0xffff);
# Line 1750 | Line 1821 | static bool patch_68k(void)
1821          static const uint8 page_size_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x10};
1822          if ((base = find_rom_data(0xb000, 0x12000, page_size_dat, sizeof(page_size_dat))) == 0) return false;
1823          D(bug("page_size %08lx\n", base));
1824 <        wp = (uint16 *)(ROM_BASE + base);
1824 >        wp = (uint16 *)(ROMBaseHost + base);
1825          *wp++ = htons(0x203c);                  // move.l       #$1000,d0
1826          *wp++ = htons(0);
1827          *wp++ = htons(0x1000);
1828          *wp++ = htons(M68K_NOP);
1829          *wp = htons(M68K_NOP);
1830  
1831 <        // Gestalt PowerPC page size, RAM size (InitGestalt, via 0x25c)
1831 >        // Gestalt PowerPC page size, CPU type, RAM size (InitGestalt, via 0x25c)
1832          static const uint8 page_size2_dat[] = {0x26, 0x79, 0x5f, 0xff, 0xef, 0xd8, 0x25, 0x6b, 0x00, 0x10, 0x00, 0x1e};
1833          if ((base = find_rom_data(0x50000, 0x70000, page_size2_dat, sizeof(page_size2_dat))) == 0) return false;
1834          D(bug("page_size2 %08lx\n", base));
1835 <        wp = (uint16 *)(ROM_BASE + base);
1835 >        wp = (uint16 *)(ROMBaseHost + base);
1836          *wp++ = htons(0x257c);                  // move.l       #$1000,$1e(a2)
1837          *wp++ = htons(0);
1838          *wp++ = htons(0x1000);
1839          *wp++ = htons(0x001e);
1840          *wp++ = htons(0x157c);                  // move.b       #PVR,$1d(a2)
1841 <        *wp++ = htons(PVR >> 16);
1841 >        uint32 cput = (PVR >> 16);
1842 >        if (cput == 0x7000)
1843 >                cput |= 0x20;
1844 >        else if (cput >= 0x8000 && cput <= 0x8002)
1845 >                cput |= 0x10;
1846 >        cput &= 0xff;
1847 >        *wp++ = htons(cput);
1848          *wp++ = htons(0x001d);
1849          *wp++ = htons(0x263c);                  // move.l       #RAMSize,d3
1850          *wp++ = htons(RAMSize >> 16);
# Line 1776 | Line 1853 | static bool patch_68k(void)
1853          *wp++ = htons(M68K_NOP);
1854          *wp = htons(M68K_NOP);
1855          if (ROMType == ROMTYPE_NEWWORLD)
1856 <                wp = (uint16 *)(ROM_BASE + base + 0x4a);
1856 >                wp = (uint16 *)(ROMBaseHost + base + 0x4a);
1857          else
1858 <                wp = (uint16 *)(ROM_BASE + base + 0x28);
1858 >                wp = (uint16 *)(ROMBaseHost + base + 0x28);
1859          *wp++ = htons(M68K_NOP);
1860          *wp = htons(M68K_NOP);
1861  
1862          // Gestalt CPU/bus clock speed (InitGestalt, via 0x25c)
1863          if (ROMType == ROMTYPE_ZANZIBAR) {
1864 <                wp = (uint16 *)(ROM_BASE + 0x5d87a);
1864 >                wp = (uint16 *)(ROMBaseHost + 0x5d87a);
1865                  *wp++ = htons(0x203c);                  // move.l       #Hz,d0
1866                  *wp++ = htons(BusClockSpeed >> 16);
1867                  *wp++ = htons(BusClockSpeed & 0xffff);
1868                  *wp++ = htons(M68K_NOP);
1869                  *wp = htons(M68K_NOP);
1870 <                wp = (uint16 *)(ROM_BASE + 0x5d888);
1870 >                wp = (uint16 *)(ROMBaseHost + 0x5d888);
1871                  *wp++ = htons(0x203c);                  // move.l       #Hz,d0
1872                  *wp++ = htons(CPUClockSpeed >> 16);
1873                  *wp++ = htons(CPUClockSpeed & 0xffff);
# Line 1803 | Line 1880 | static bool patch_68k(void)
1880                  static const uint8 gc_mask_dat[] = {0x83, 0xa8, 0x00, 0x24, 0x4e, 0x71};
1881                  if ((base = find_rom_data(0x13000, 0x20000, gc_mask_dat, sizeof(gc_mask_dat))) == 0) return false;
1882                  D(bug("gc_mask %08lx\n", base));
1883 <                wp = (uint16 *)(ROM_BASE + base);
1883 >                wp = (uint16 *)(ROMBaseHost + base);
1884                  *wp++ = htons(M68K_NOP);
1885                  *wp = htons(M68K_NOP);
1886 <                wp = (uint16 *)(ROM_BASE + base + 0x40);
1886 >                wp = (uint16 *)(ROMBaseHost + base + 0x40);
1887                  *wp++ = htons(M68K_NOP);
1888                  *wp = htons(M68K_NOP);
1889 <                wp = (uint16 *)(ROM_BASE + base + 0x78);
1889 >                wp = (uint16 *)(ROMBaseHost + base + 0x78);
1890                  *wp++ = htons(M68K_NOP);
1891                  *wp = htons(M68K_NOP);
1892 <                wp = (uint16 *)(ROM_BASE + base + 0x96);
1892 >                wp = (uint16 *)(ROMBaseHost + base + 0x96);
1893                  *wp++ = htons(M68K_NOP);
1894                  *wp = htons(M68K_NOP);
1895  
1896                  static const uint8 gc_mask2_dat[] = {0x02, 0xa8, 0x00, 0x00, 0x00, 0x80, 0x00, 0x24};
1897                  if ((base = find_rom_data(0x13000, 0x20000, gc_mask2_dat, sizeof(gc_mask2_dat))) == 0) return false;
1898                  D(bug("gc_mask2 %08lx\n", base));
1899 <                wp = (uint16 *)(ROM_BASE + base);
1900 <                if (ROMType == ROMTYPE_GOSSAMER)
1899 >                wp = (uint16 *)(ROMBaseHost + base);
1900 >                if (ROMType == ROMTYPE_GOSSAMER) {
1901 >                        *wp++ = htons(M68K_NOP);
1902                          *wp++ = htons(M68K_NOP);
1903 +                        *wp++ = htons(M68K_NOP);
1904 +                        *wp++ = htons(M68K_NOP);
1905 +                }
1906                  for (int i=0; i<5; i++) {
1907                          *wp++ = htons(M68K_NOP);
1908                          *wp++ = htons(M68K_NOP);
# Line 1844 | Line 1925 | static bool patch_68k(void)
1925          static const uint8 cuda_init_dat[] = {0x08, 0xa9, 0x00, 0x04, 0x16, 0x00, 0x4e, 0x71, 0x13, 0x7c, 0x00, 0x84, 0x1c, 0x00, 0x4e, 0x71};
1926          if ((base = find_rom_data(0xa000, 0x12000, cuda_init_dat, sizeof(cuda_init_dat))) == 0) return false;
1927          D(bug("cuda_init %08lx\n", base));
1928 <        wp = (uint16 *)(ROM_BASE + base);
1928 >        wp = (uint16 *)(ROMBaseHost + base);
1929          *wp++ = htons(M68K_NOP);
1930          *wp++ = htons(M68K_NOP);
1931          *wp++ = htons(M68K_NOP);
# Line 1857 | Line 1938 | static bool patch_68k(void)
1938          static const uint8 cpu_speed_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x04, 0x4c, 0x7c};
1939          if ((base = find_rom_data(0x6000, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) == 0) return false;
1940          D(bug("cpu_speed %08lx\n", base));
1941 <        wp = (uint16 *)(ROM_BASE + base);
1941 >        wp = (uint16 *)(ROMBaseHost + base);
1942          *wp++ = htons(0x203c);                  // move.l       #(MHz<<16)|MHz,d0
1943          *wp++ = htons(CPUClockSpeed / 1000000);
1944          *wp++ = htons(CPUClockSpeed / 1000000);
1945          *wp = htons(M68K_RTS);
1946          if ((base = find_rom_data(base, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) != 0) {
1947                  D(bug("cpu_speed2 %08lx\n", base));
1948 <                wp = (uint16 *)(ROM_BASE + base);
1948 >                wp = (uint16 *)(ROMBaseHost + base);
1949                  *wp++ = htons(0x203c);                  // move.l       #(MHz<<16)|MHz,d0
1950                  *wp++ = htons(CPUClockSpeed / 1000000);
1951                  *wp++ = htons(CPUClockSpeed / 1000000);
# Line 1875 | Line 1956 | static bool patch_68k(void)
1956          static const uint8 time_via_dat[] = {0x40, 0xe7, 0x00, 0x7c, 0x07, 0x00, 0x28, 0x78, 0x01, 0xd4, 0x43, 0xec, 0x10, 0x00};
1957          if ((base = find_rom_data(0x30000, 0x40000, time_via_dat, sizeof(time_via_dat))) == 0) return false;
1958          D(bug("time_via %08lx\n", base));
1959 <        wp = (uint16 *)(ROM_BASE + base);
1959 >        wp = (uint16 *)(ROMBaseHost + base);
1960          *wp++ = htons(0x4cdf);                  // movem.l      (sp)+,d0-d5/a0-a4
1961          *wp++ = htons(0x1f3f);
1962          *wp = htons(M68K_RTS);
# Line 1885 | Line 1966 | static bool patch_68k(void)
1966          static const uint8 open_firmware_dat[] = {0x2f, 0x79, 0xff, 0x80, 0x00, 0x00, 0x00, 0xfc};
1967          if ((base = find_rom_data(0x48000, 0x58000, open_firmware_dat, sizeof(open_firmware_dat))) == 0) return false;
1968          D(bug("open_firmware %08lx\n", base));
1969 <        wp = (uint16 *)(ROM_BASE + base);
1969 >        wp = (uint16 *)(ROMBaseHost + base);
1970          *wp++ = htons(0x2f7c);                  // move.l               #deadbeef,0xfc(a7)
1971          *wp++ = htons(0xdead);
1972          *wp++ = htons(0xbeef);
1973          *wp = htons(0x00fc);
1974 <        wp = (uint16 *)(ROM_BASE + base + 0x1a);
1974 >        wp = (uint16 *)(ROMBaseHost + base + 0x1a);
1975          *wp++ = htons(M68K_NOP);                // (FE03 opcode, tries to jump to 0xdeadbeef)
1976          *wp = htons(M68K_NOP);
1977  
# Line 1898 | Line 1979 | static bool patch_68k(void)
1979          static const uint8 ext_cache2_dat[] = {0x4f, 0xef, 0xff, 0xec, 0x20, 0x4f, 0x10, 0xbc, 0x00, 0x01, 0x11, 0x7c, 0x00, 0x1b};
1980          if ((base = find_rom_data(0x13000, 0x20000, ext_cache2_dat, sizeof(ext_cache2_dat))) == 0) return false;
1981          D(bug("ext_cache2 %08lx\n", base));
1982 <        wp = (uint16 *)(ROM_BASE + base);
1982 >        wp = (uint16 *)(ROMBaseHost + base);
1983          *wp = htons(M68K_RTS);
1984  
1985          // Don't install Time Manager task for 60Hz interrupt (Enable60HzInts, via 0x2b8)
# Line 1906 | Line 1987 | static bool patch_68k(void)
1987                  static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9};
1988                  if ((base = find_rom_data(0x2a0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1989                  D(bug("tm_task %08lx\n", base));
1990 <                wp = (uint16 *)(ROM_BASE + base + 28);
1990 >                wp = (uint16 *)(ROMBaseHost + base + 28);
1991                  *wp++ = htons(M68K_NOP);
1992                  *wp++ = htons(M68K_NOP);
1993                  *wp++ = htons(M68K_NOP);
# Line 1917 | Line 1998 | static bool patch_68k(void)
1998                  static const uint8 tm_task_dat[] = {0x20, 0x3c, 0x73, 0x79, 0x73, 0x61};
1999                  if ((base = find_rom_data(0x280, 0x300, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
2000                  D(bug("tm_task %08lx\n", base));
2001 <                wp = (uint16 *)(ROM_BASE + base - 6);
2001 >                wp = (uint16 *)(ROMBaseHost + base - 6);
2002                  *wp++ = htons(M68K_NOP);
2003                  *wp++ = htons(M68K_NOP);
2004                  *wp = htons(M68K_NOP);
# Line 1934 | Line 2015 | static bool patch_68k(void)
2015                          if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_pvr_dat, sizeof(dsl_pvr_dat))) == 0) return false;
2016                  }
2017                  D(bug("dsl_pvr %08lx\n", base));
2018 <                lp = (uint32 *)(ROM_BASE + base + 12);
2018 >                lp = (uint32 *)(ROMBaseHost + base + 12);
2019                  *lp = htonl(0x3c800000 | (PVR >> 16));  // lis  r4,PVR
2020  
2021                  // Don't read bus clock from 0x5fffef88 in DriverServicesLib (via 0x316)
# Line 1942 | Line 2023 | static bool patch_68k(void)
2023                          static const uint8 dsl_bus_dat[] = {0x81, 0x07, 0x00, 0x00, 0x39, 0x20, 0x42, 0x40, 0x81, 0x62, 0xff, 0x20};
2024                          if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_bus_dat, sizeof(dsl_bus_dat))) == 0) return false;
2025                          D(bug("dsl_bus %08lx\n", base));
2026 <                        lp = (uint32 *)(ROM_BASE + base);
2026 >                        lp = (uint32 *)(ROMBaseHost + base);
2027                          *lp = htonl(0x81000000 + XLM_BUS_CLOCK);        // lwz  r8,(bus clock speed)
2028                  } else {
2029                          static const uint8 dsl_bus_dat[] = {0x80, 0x83, 0xef, 0xe8, 0x80, 0x62, 0x00, 0x10, 0x7c, 0x04, 0x03, 0x96};
2030                          if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_bus_dat, sizeof(dsl_bus_dat))) == 0) return false;
2031                          D(bug("dsl_bus %08lx\n", base));
2032 <                        lp = (uint32 *)(ROM_BASE + base);
2032 >                        lp = (uint32 *)(ROMBaseHost + base);
2033                          *lp = htonl(0x80800000 + XLM_BUS_CLOCK);        // lwz  r4,(bus clock speed)
2034                  }
2035          }
2036  
2037          // Don't open InterruptTreeTNT in MotherBoardHAL init in DriverServicesLib init
2038          if (ROMType == ROMTYPE_ZANZIBAR) {
2039 <                lp = (uint32 *)(ROM_BASE + find_rom_resource(FOURCC('n','l','i','b'), -16408) + 0x16c);
2039 >                lp = (uint32 *)(ROMBaseHost + find_rom_resource(FOURCC('n','l','i','b'), -16408) + 0x16c);
2040                  *lp = htonl(0x38600000);                // li   r3,0
2041          }
2042  
2043 <        // FIXME: Fake reading from [HpChk]+4 (the callchain reports some function from DriverServicesLib)
2043 >        // Don't read from MacPgm in WipeOutMACPGMINFOProcPtrs (StdCLib)
2044          if (1) {
2045                  uint32 hpchk_offset = find_rom_resource(FOURCC('n','l','i','b'), 10);
2046                  static const uint8 hpchk_dat[] = {0x80, 0x80, 0x03, 0x16, 0x94, 0x21, 0xff, 0xb0, 0x83, 0xc4, 0x00, 0x04};
2047                  if ((base = find_rom_data(hpchk_offset, hpchk_offset + 0x3000, hpchk_dat, sizeof(hpchk_dat))) == 0) return false;
2048 <                D(bug("hpchk %08lx\n", base));
2049 <                lp = (uint32 *)(ROM_BASE + base);
2048 >                D(bug("macpgm %08lx\n", base));
2049 >                lp = (uint32 *)(ROMBaseHost + base);
2050                  *lp = htonl(0x80800000 + XLM_ZERO_PAGE);                // lwz  r4,(zero page)
2051          }
2052  
# Line 1973 | Line 2054 | static bool patch_68k(void)
2054          static const uint8 name_reg_dat[] = {0x70, 0xff, 0xab, 0xeb};
2055          if ((base = find_rom_data(0x300, 0x380, name_reg_dat, sizeof(name_reg_dat))) == 0) return false;
2056          D(bug("name_reg %08lx\n", base));
2057 <        wp = (uint16 *)(ROM_BASE + base);
2057 >        wp = (uint16 *)(ROMBaseHost + base);
2058          *wp = htons(M68K_EMUL_OP_NAME_REGISTRY);
2059  
2060   #if DISABLE_SCSI
# Line 1985 | Line 2066 | static bool patch_68k(void)
2066                  if ((base = find_rom_data(0x1c000, 0x28000, scsi_mgr_b_dat, sizeof(scsi_mgr_b_dat))) == 0) return false;
2067          }
2068          D(bug("scsi_mgr %08lx\n", base));
2069 <        wp = (uint16 *)(ROM_BASE + base);
2069 >        wp = (uint16 *)(ROMBaseHost + base);
2070          *wp++ = htons(0x21fc);                  // move.l       #xxx,0x624      (SCSIAtomic)
2071 <        *wp++ = htons((ROM_BASE + base + 18) >> 16);
2072 <        *wp++ = htons((ROM_BASE + base + 18) & 0xffff);
2071 >        *wp++ = htons((ROMBase + base + 18) >> 16);
2072 >        *wp++ = htons((ROMBase + base + 18) & 0xffff);
2073          *wp++ = htons(0x0624);
2074          *wp++ = htons(0x21fc);                  // move.l       #xxx,0xe54      (SCSIDispatch)
2075 <        *wp++ = htons((ROM_BASE + base + 22) >> 16);
2076 <        *wp++ = htons((ROM_BASE + base + 22) & 0xffff);
2075 >        *wp++ = htons((ROMBase + base + 22) >> 16);
2076 >        *wp++ = htons((ROMBase + base + 22) & 0xffff);
2077          *wp++ = htons(0x0e54);
2078          *wp++ = htons(M68K_RTS);
2079          *wp++ = htons(M68K_EMUL_OP_SCSI_ATOMIC);
2080          *wp++ = htons(M68K_RTS);
2081          *wp++ = htons(M68K_EMUL_OP_SCSI_DISPATCH);
2082          *wp = htons(0x4ed0);                    // jmp          (a0)
2083 <        wp = (uint16 *)(ROM_BASE + base + 0x20);
2083 >        wp = (uint16 *)(ROMBaseHost + base + 0x20);
2084          *wp++ = htons(0x7000);                  // moveq        #0,d0
2085          *wp = htons(M68K_RTS);
2086   #endif
# Line 2011 | Line 2092 | static bool patch_68k(void)
2092                  static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
2093                  if ((base = find_rom_data(0x1f500, 0x1f600, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
2094                          D(bug("scsi_var %08lx\n", base));
2095 <                        wp = (uint16 *)(ROM_BASE + base + 12);
2095 >                        wp = (uint16 *)(ROMBaseHost + base + 12);
2096                          *wp = htons(0x6000);    // bra
2097                  }
2098  
2099                  static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x58, 0x48, 0xe7, 0x1f, 0x38};
2100                  if ((base = find_rom_data(0x1f700, 0x1f800, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
2101                          D(bug("scsi_var2 %08lx\n", base));
2102 <                        wp = (uint16 *)(ROM_BASE + base);
2102 >                        wp = (uint16 *)(ROMBaseHost + base);
2103                          *wp++ = htons(0x7000);  // moveq #0,d0
2104                          *wp = htons(M68K_RTS);
2105                  }
# Line 2027 | Line 2108 | static bool patch_68k(void)
2108                  static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
2109                  if ((base = find_rom_data(0x1d700, 0x1d800, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
2110                          D(bug("scsi_var %08lx\n", base));
2111 <                        wp = (uint16 *)(ROM_BASE + base + 12);
2111 >                        wp = (uint16 *)(ROMBaseHost + base + 12);
2112                          *wp = htons(0x6000);    // bra
2113                  }
2114  
2115                  static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x5a, 0x48, 0xe7, 0x1f, 0x38};
2116                  if ((base = find_rom_data(0x1d900, 0x1da00, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
2117                          D(bug("scsi_var2 %08lx\n", base));
2118 <                        wp = (uint16 *)(ROM_BASE + base);
2118 >                        wp = (uint16 *)(ROMBaseHost + base);
2119                          *wp++ = htons(0x7000);  // moveq #0,d0
2120                          *wp = htons(M68K_RTS);
2121                  }
# Line 2045 | Line 2126 | static bool patch_68k(void)
2126          static const uint8 adb_init_dat[] = {0x08, 0x2b, 0x00, 0x05, 0x01, 0x5d, 0x66, 0xf8};
2127          if ((base = find_rom_data(0x31000, 0x3d000, adb_init_dat, sizeof(adb_init_dat))) == 0) return false;
2128          D(bug("adb_init %08lx\n", base));
2129 <        wp = (uint16 *)(ROM_BASE + base + 6);
2129 >        wp = (uint16 *)(ROMBaseHost + base + 6);
2130          *wp = htons(M68K_NOP);
2131  
2132          // Modify check in InitResources() so that addresses >0x80000000 work
2133          static const uint8 init_res_dat[] = {0x4a, 0xb8, 0x0a, 0x50, 0x6e, 0x20};
2134          if ((base = find_rom_data(0x78000, 0x8c000, init_res_dat, sizeof(init_res_dat))) == 0) return false;
2135          D(bug("init_res %08lx\n", base));
2136 <        bp = (uint8 *)(ROM_BASE + base + 4);
2136 >        bp = (uint8 *)(ROMBaseHost + base + 4);
2137          *bp = 0x66;
2138  
2139          // Modify vCheckLoad() so that we can patch resources (68k Resource Manager)
2140          static const uint8 check_load_dat[] = {0x20, 0x78, 0x07, 0xf0, 0x4e, 0xd0};
2141          if ((base = find_rom_data(0x78000, 0x8c000, check_load_dat, sizeof(check_load_dat))) == 0) return false;
2142          D(bug("check_load %08lx\n", base));
2143 <        wp = (uint16 *)(ROM_BASE + base);
2143 >        wp = (uint16 *)(ROMBaseHost + base);
2144          *wp++ = htons(M68K_JMP);
2145 <        *wp++ = htons((ROM_BASE + CHECK_LOAD_PATCH_SPACE) >> 16);
2146 <        *wp = htons((ROM_BASE + CHECK_LOAD_PATCH_SPACE) & 0xffff);
2147 <        wp = (uint16 *)(ROM_BASE + CHECK_LOAD_PATCH_SPACE);
2145 >        *wp++ = htons((ROMBase + CHECK_LOAD_PATCH_SPACE) >> 16);
2146 >        *wp = htons((ROMBase + CHECK_LOAD_PATCH_SPACE) & 0xffff);
2147 >        wp = (uint16 *)(ROMBaseHost + CHECK_LOAD_PATCH_SPACE);
2148          *wp++ = htons(0x2f03);                  // move.l       d3,-(a7)
2149          *wp++ = htons(0x2078);                  // move.l       $07f0,a0
2150          *wp++ = htons(0x07f0);
# Line 2079 | Line 2160 | static bool patch_68k(void)
2160                  sony_offset = find_rom_resource(FOURCC('n','d','r','v'), -20196);               // NewWorld 1.6 has "PCFloppy" ndrv
2161                  if (sony_offset == 0)
2162                          return false;
2163 <                lp = (uint32 *)(ROM_BASE + rsrc_ptr + 8);
2163 >                lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 8);
2164                  *lp = htonl(FOURCC('D','R','V','R'));
2165 <                wp = (uint16 *)(ROM_BASE + rsrc_ptr + 12);
2165 >                wp = (uint16 *)(ROMBaseHost + rsrc_ptr + 12);
2166                  *wp = htons(4);
2167          }
2168          D(bug("sony_offset %08lx\n", sony_offset));
2169 <        memcpy((void *)(ROM_BASE + sony_offset), sony_driver, sizeof(sony_driver));
2169 >        memcpy((void *)(ROMBaseHost + sony_offset), sony_driver, sizeof(sony_driver));
2170  
2171          // Install .Disk and .AppleCD drivers
2172 <        memcpy((void *)(ROM_BASE + sony_offset + 0x100), disk_driver, sizeof(disk_driver));
2173 <        memcpy((void *)(ROM_BASE + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2172 >        memcpy((void *)(ROMBaseHost + sony_offset + 0x100), disk_driver, sizeof(disk_driver));
2173 >        memcpy((void *)(ROMBaseHost + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2174  
2175          // Install serial drivers
2176 <        gen_ain_driver( ROM_BASE + sony_offset + 0x300);
2177 <        gen_aout_driver(ROM_BASE + sony_offset + 0x400);
2178 <        gen_bin_driver( ROM_BASE + sony_offset + 0x500);
2179 <        gen_bout_driver(ROM_BASE + sony_offset + 0x600);
2176 >        gen_ain_driver( ROMBase + sony_offset + 0x300);
2177 >        gen_aout_driver(ROMBase + sony_offset + 0x400);
2178 >        gen_bin_driver( ROMBase + sony_offset + 0x500);
2179 >        gen_bout_driver(ROMBase + sony_offset + 0x600);
2180  
2181          // Copy icons to ROM
2182 <        SonyDiskIconAddr = ROM_BASE + sony_offset + 0x800;
2183 <        memcpy((void *)(ROM_BASE + sony_offset + 0x800), SonyDiskIcon, sizeof(SonyDiskIcon));
2184 <        SonyDriveIconAddr = ROM_BASE + sony_offset + 0xa00;
2185 <        memcpy((void *)(ROM_BASE + sony_offset + 0xa00), SonyDriveIcon, sizeof(SonyDriveIcon));
2186 <        DiskIconAddr = ROM_BASE + sony_offset + 0xc00;
2187 <        memcpy((void *)(ROM_BASE + sony_offset + 0xc00), DiskIcon, sizeof(DiskIcon));
2188 <        CDROMIconAddr = ROM_BASE + sony_offset + 0xe00;
2189 <        memcpy((void *)(ROM_BASE + sony_offset + 0xe00), CDROMIcon, sizeof(CDROMIcon));
2182 >        SonyDiskIconAddr = ROMBase + sony_offset + 0x800;
2183 >        memcpy(ROMBaseHost + sony_offset + 0x800, SonyDiskIcon, sizeof(SonyDiskIcon));
2184 >        SonyDriveIconAddr = ROMBase + sony_offset + 0xa00;
2185 >        memcpy(ROMBaseHost + sony_offset + 0xa00, SonyDriveIcon, sizeof(SonyDriveIcon));
2186 >        DiskIconAddr = ROMBase + sony_offset + 0xc00;
2187 >        memcpy(ROMBaseHost + sony_offset + 0xc00, DiskIcon, sizeof(DiskIcon));
2188 >        CDROMIconAddr = ROMBase + sony_offset + 0xe00;
2189 >        memcpy(ROMBaseHost + sony_offset + 0xe00, CDROMIcon, sizeof(CDROMIcon));
2190  
2191          // Patch driver install routine
2192          static const uint8 drvr_install_dat[] = {0xa7, 0x1e, 0x21, 0xc8, 0x01, 0x1c, 0x4e, 0x75};
2193          if ((base = find_rom_data(0xb00, 0xd00, drvr_install_dat, sizeof(drvr_install_dat))) == 0) return false;
2194          D(bug("drvr_install %08lx\n", base));
2195 <        wp = (uint16 *)(ROM_BASE + base + 8);
2195 >        wp = (uint16 *)(ROMBaseHost + base + 8);
2196          *wp++ = htons(M68K_EMUL_OP_INSTALL_DRIVERS);
2197          *wp = htons(M68K_RTS);
2198  
2199          // Don't install serial drivers from ROM
2200          if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
2201 <                wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('S','E','R','D'), 0));
2201 >                wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('S','E','R','D'), 0));
2202                  *wp = htons(M68K_RTS);
2203          } else {
2204 <                wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0xc4);
2204 >                wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0xc4);
2205                  *wp++ = htons(M68K_NOP);
2206                  *wp++ = htons(M68K_NOP);
2207                  *wp++ = htons(M68K_NOP);
2208                  *wp++ = htons(M68K_NOP);
2209                  *wp = htons(0x7000);                    // moveq        #0,d0
2210 <                wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0x8ee);
2210 >                wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0x8ee);
2211                  *wp = htons(M68K_NOP);
2212          }
2213          uint32 nsrd_offset = find_rom_resource(FOURCC('n','s','r','d'), 1);
2214          if (nsrd_offset) {
2215 <                lp = (uint32 *)(ROM_BASE + rsrc_ptr + 8);
2215 >                lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 8);
2216                  *lp = htonl(FOURCC('x','s','r','d'));
2217          }
2218  
2219          // Replace ADBOp()
2220 <        memcpy((void *)(ROM_BASE + find_rom_trap(0xa07c)), adbop_patch, sizeof(adbop_patch));
2220 >        memcpy(ROMBaseHost + find_rom_trap(0xa07c), adbop_patch, sizeof(adbop_patch));
2221  
2222          // Replace Time Manager
2223 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa058));
2223 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa058));
2224          *wp++ = htons(M68K_EMUL_OP_INSTIME);
2225          *wp = htons(M68K_RTS);
2226 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa059));
2226 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa059));
2227          *wp++ = htons(0x40e7);          // move sr,-(sp)
2228          *wp++ = htons(0x007c);          // ori  #$0700,sr
2229          *wp++ = htons(0x0700);
2230          *wp++ = htons(M68K_EMUL_OP_RMVTIME);
2231          *wp++ = htons(0x46df);          // move (sp)+,sr
2232          *wp = htons(M68K_RTS);
2233 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa05a));
2233 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa05a));
2234          *wp++ = htons(0x40e7);          // move sr,-(sp)
2235          *wp++ = htons(0x007c);          // ori  #$0700,sr
2236          *wp++ = htons(0x0700);
2237          *wp++ = htons(M68K_EMUL_OP_PRIMETIME);
2238          *wp++ = htons(0x46df);          // move (sp)+,sr
2239          *wp = htons(M68K_RTS);
2240 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa093));
2240 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa093));
2241          *wp++ = htons(M68K_EMUL_OP_MICROSECONDS);
2242          *wp = htons(M68K_RTS);
2243  
# Line 2164 | Line 2245 | static bool patch_68k(void)
2245          static const uint8 egret_dat[] = {0x2f, 0x30, 0x81, 0xe2, 0x20, 0x10, 0x00, 0x18};
2246          if ((base = find_rom_data(0xa000, 0x10000, egret_dat, sizeof(egret_dat))) == 0) return false;
2247          D(bug("egret %08lx\n", base));
2248 <        wp = (uint16 *)(ROM_BASE + base);
2248 >        wp = (uint16 *)(ROMBaseHost + base);
2249          *wp++ = htons(0x7000);
2250          *wp = htons(M68K_RTS);
2251  
# Line 2172 | Line 2253 | static bool patch_68k(void)
2253          static const uint8 shutdown_dat[] = {0x40, 0xe7, 0x00, 0x7c, 0x07, 0x00, 0x48, 0xe7, 0x3f, 0x00, 0x2c, 0x00, 0x2e, 0x01};
2254          if ((base = find_rom_data(0x30000, 0x40000, shutdown_dat, sizeof(shutdown_dat))) == 0) return false;
2255          D(bug("shutdown %08lx\n", base));
2256 <        wp = (uint16 *)(ROM_BASE + base);
2256 >        wp = (uint16 *)(ROMBaseHost + base);
2257          if (ROMType == ROMTYPE_ZANZIBAR)
2258                  *wp = htons(M68K_RTS);
2259          else if (ntohs(wp[-4]) == 0x61ff)
# Line 2181 | Line 2262 | static bool patch_68k(void)
2262                  wp[-2] = htons(0x6000); // bra
2263  
2264          // Patch PowerOff()
2265 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa05b));      // PowerOff()
2265 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa05b));   // PowerOff()
2266          *wp = htons(M68K_EMUL_RETURN);
2267  
2268          // Patch VIA interrupt handler
2269          static const uint8 via_int_dat[] = {0x70, 0x7f, 0xc0, 0x29, 0x1a, 0x00, 0xc0, 0x29, 0x1c, 0x00};
2270          if ((base = find_rom_data(0x13000, 0x1c000, via_int_dat, sizeof(via_int_dat))) == 0) return false;
2271          D(bug("via_int %08lx\n", base));
2272 <        uint32 level1_int = ROM_BASE + base;
2273 <        wp = (uint16 *)level1_int;                      // Level 1 handler
2272 >        uint32 level1_int = ROMBase + base;
2273 >        wp = (uint16 *)(ROMBaseHost + base);    // Level 1 handler
2274          *wp++ = htons(0x7002);                  // moveq        #2,d0 (60Hz interrupt)
2275          *wp++ = htons(M68K_NOP);
2276          *wp++ = htons(M68K_NOP);
# Line 2199 | Line 2280 | static bool patch_68k(void)
2280          static const uint8 via_int2_dat[] = {0x13, 0x7c, 0x00, 0x02, 0x1a, 0x00, 0x4e, 0x71, 0x52, 0xb8, 0x01, 0x6a};
2281          if ((base = find_rom_data(0x10000, 0x18000, via_int2_dat, sizeof(via_int2_dat))) == 0) return false;
2282          D(bug("via_int2 %08lx\n", base));
2283 <        wp = (uint16 *)(ROM_BASE + base);       // 60Hz handler
2283 >        wp = (uint16 *)(ROMBaseHost + base);    // 60Hz handler
2284          *wp++ = htons(M68K_EMUL_OP_IRQ);
2285          *wp++ = htons(0x4a80);                  // tst.l        d0
2286          *wp++ = htons(0x6700);                  // beq          xxx
# Line 2209 | Line 2290 | static bool patch_68k(void)
2290                  static const uint8 via_int3_dat[] = {0x48, 0xe7, 0xf0, 0xf0, 0x76, 0x01, 0x60, 0x26};
2291                  if ((base = find_rom_data(0x15000, 0x19000, via_int3_dat, sizeof(via_int3_dat))) == 0) return false;
2292                  D(bug("via_int3 %08lx\n", base));
2293 <                wp = (uint16 *)(ROM_BASE + base);       // CHRP level 1 handler
2293 >                wp = (uint16 *)(ROMBaseHost + base);    // CHRP level 1 handler
2294                  *wp++ = htons(M68K_JMP);
2295                  *wp++ = htons((level1_int - 12) >> 16);
2296                  *wp = htons((level1_int - 12) & 0xffff);
# Line 2217 | Line 2298 | static bool patch_68k(void)
2298  
2299          // Patch PutScrap() for clipboard exchange with host OS
2300          uint32 put_scrap = find_rom_trap(0xa9fe);       // PutScrap()
2301 <        wp = (uint16 *)(ROM_BASE + PUT_SCRAP_PATCH_SPACE);
2301 >        wp = (uint16 *)(ROMBaseHost + PUT_SCRAP_PATCH_SPACE);
2302          *wp++ = htons(M68K_EMUL_OP_PUT_SCRAP);
2303          *wp++ = htons(M68K_JMP);
2304 <        *wp++ = htons((ROM_BASE + put_scrap) >> 16);
2305 <        *wp++ = htons((ROM_BASE + put_scrap) & 0xffff);
2306 <        lp = (uint32 *)(ROM_BASE + 0x22);
2307 <        lp = (uint32 *)(ROM_BASE + ntohl(*lp));
2227 <        lp[0xa9fe & 0x3ff] = htonl(PUT_SCRAP_PATCH_SPACE);
2304 >        *wp++ = htons((ROMBase + put_scrap) >> 16);
2305 >        *wp++ = htons((ROMBase + put_scrap) & 0xffff);
2306 >        base = ROMBase + ReadMacInt32(ROMBase + 0x22);
2307 >        WriteMacInt32(base + 4 * (0xa9fe & 0x3ff), PUT_SCRAP_PATCH_SPACE);
2308  
2309          // Patch GetScrap() for clipboard exchange with host OS
2310          uint32 get_scrap = find_rom_trap(0xa9fd);       // GetScrap()
2311 <        wp = (uint16 *)(ROM_BASE + GET_SCRAP_PATCH_SPACE);
2311 >        wp = (uint16 *)(ROMBaseHost + GET_SCRAP_PATCH_SPACE);
2312          *wp++ = htons(M68K_EMUL_OP_GET_SCRAP);
2313          *wp++ = htons(M68K_JMP);
2314 <        *wp++ = htons((ROM_BASE + get_scrap) >> 16);
2315 <        *wp++ = htons((ROM_BASE + get_scrap) & 0xffff);
2316 <        lp = (uint32 *)(ROM_BASE + 0x22);
2317 <        lp = (uint32 *)(ROM_BASE + ntohl(*lp));
2238 <        lp[0xa9fd & 0x3ff] = htonl(GET_SCRAP_PATCH_SPACE);
2314 >        *wp++ = htons((ROMBase + get_scrap) >> 16);
2315 >        *wp++ = htons((ROMBase + get_scrap) & 0xffff);
2316 >        base = ROMBase + ReadMacInt32(ROMBase + 0x22);
2317 >        WriteMacInt32(base + 4 * (0xa9fd & 0x3ff), GET_SCRAP_PATCH_SPACE);
2318  
2319          // Patch SynchIdleTime()
2320          if (PrefsFindBool("idlewait")) {
2321 <                wp = (uint16 *)(ROM_BASE + find_rom_trap(0xabf7) + 4);  // SynchIdleTime()
2322 <                D(bug("SynchIdleTime at %08lx\n", wp));
2321 >                base = find_rom_trap(0xabf7) + 4;                                               // SynchIdleTime()
2322 >                wp = (uint16 *)(ROMBaseHost + base);
2323 >                D(bug("SynchIdleTime at %08lx\n", base));
2324                  if (ntohs(*wp) == 0x2078) {                                                             // movea.l      ExpandMem,a0
2325                          *wp++ = htons(M68K_EMUL_OP_IDLE_TIME);
2326                          *wp = htons(M68K_NOP);
# Line 2256 | Line 2336 | static bool patch_68k(void)
2336          D(bug("Searching for sound components with type sdev in ROM\n"));
2337          uint32 thing = find_rom_resource(FOURCC('t','h','n','g'));
2338          while (thing) {
2339 <                thing += ROM_BASE;
2339 >                thing += ROMBase;
2340                  D(bug(" found %c%c%c%c %c%c%c%c\n", ReadMacInt8(thing), ReadMacInt8(thing + 1), ReadMacInt8(thing + 2), ReadMacInt8(thing + 3), ReadMacInt8(thing + 4), ReadMacInt8(thing + 5), ReadMacInt8(thing + 6), ReadMacInt8(thing + 7)));
2341                  if (ReadMacInt32(thing) == FOURCC('s','d','e','v') && ReadMacInt32(thing + 4) == FOURCC('s','i','n','g')) {
2342                          WriteMacInt32(thing + 4, FOURCC('a','w','g','c'));
# Line 2274 | Line 2354 | static bool patch_68k(void)
2354                  if ((thing = find_rom_resource(sifter_list[i].type, sifter_list[i].id)) != 0) {
2355                          D(bug(" patching type %08x, id %d\n", sifter_list[i].type, sifter_list[i].id));
2356                          // Install 68k glue code
2357 <                        uint16 *wp = (uint16 *)(ROM_BASE + thing);
2357 >                        uint16 *wp = (uint16 *)(ROMBaseHost + thing);
2358                          *wp++ = htons(0x4e56); *wp++ = htons(0x0000);   // link a6,#0
2359                          *wp++ = htons(0x48e7); *wp++ = htons(0x8018);   // movem.l d0/a3-a4,-(a7)
2360                          *wp++ = htons(0x266e); *wp++ = htons(0x000c);   // movea.l $c(a6),a3
# Line 2301 | Line 2381 | void InstallDrivers(void)
2381          SheepArray<SIZEOF_IOParam> pb_var;
2382          const uintptr pb = pb_var.addr();
2383  
2384 + #if DISABLE_SCSI
2385 +        // Setup fake SCSI Globals
2386 +        r.d[0] = 0x1000;
2387 +        Execute68kTrap(0xa71e, &r);             // NewPtrSysClear()
2388 +        uint32 scsi_globals = r.a[0];
2389 +        D(bug("Fake SCSI globals at %08lx\n", scsi_globals));
2390 +        WriteMacInt32(0xc0c, scsi_globals);     // Set SCSIGlobals
2391 + #endif
2392 +
2393          // Install floppy driver
2394          if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
2395  
2396                  // Force installation of floppy driver with NewWorld and Gossamer ROMs
2397 <                r.a[0] = ROM_BASE + sony_offset;
2397 >                r.a[0] = ROMBase + sony_offset;
2398                  r.d[0] = (uint32)SonyRefNum;
2399                  Execute68kTrap(0xa43d, &r);             // DrvrInstallRsrvMem()
2400                  r.a[0] = ReadMacInt32(ReadMacInt32(0x11c) + ~SonyRefNum * 4);   // Get driver handle from Unit Table
2401                  Execute68kTrap(0xa029, &r);             // HLock()
2402                  uint32 dce = ReadMacInt32(r.a[0]);
2403 <                WriteMacInt32(dce + dCtlDriver, ROM_BASE + sony_offset);
2403 >                WriteMacInt32(dce + dCtlDriver, ROMBase + sony_offset);
2404                  WriteMacInt16(dce + dCtlFlags, SonyDriverFlags);
2405          }
2406  
2318 #if DISABLE_SCSI && HAVE_SIGSEGV_SKIP_INSTRUCTION
2319        // Fake SCSIGlobals
2320        WriteMacInt32(0xc0c, SheepMem::ZeroPage());
2321 #endif
2322
2407          // Open .Sony driver
2408          SheepString sony_str("\005.Sony");
2409          WriteMacInt8(pb + ioPermssn, 0);
# Line 2328 | Line 2412 | void InstallDrivers(void)
2412          Execute68kTrap(0xa000, &r);             // Open()
2413  
2414          // Install disk driver
2415 <        r.a[0] = ROM_BASE + sony_offset + 0x100;
2415 >        r.a[0] = ROMBase + sony_offset + 0x100;
2416          r.d[0] = (uint32)DiskRefNum;
2417          Execute68kTrap(0xa43d, &r);             // DrvrInstallRsrvMem()
2418          r.a[0] = ReadMacInt32(ReadMacInt32(0x11c) + ~DiskRefNum * 4);   // Get driver handle from Unit Table
2419          Execute68kTrap(0xa029, &r);             // HLock()
2420          uint32 dce = ReadMacInt32(r.a[0]);
2421 <        WriteMacInt32(dce + dCtlDriver, ROM_BASE + sony_offset + 0x100);
2421 >        WriteMacInt32(dce + dCtlDriver, ROMBase + sony_offset + 0x100);
2422          WriteMacInt16(dce + dCtlFlags, DiskDriverFlags);
2423  
2424          // Open disk driver
# Line 2347 | Line 2431 | void InstallDrivers(void)
2431          if (!PrefsFindBool("nocdrom")) {
2432  
2433                  // Install CD-ROM driver
2434 <                r.a[0] = ROM_BASE + sony_offset + 0x200;
2434 >                r.a[0] = ROMBase + sony_offset + 0x200;
2435                  r.d[0] = (uint32)CDROMRefNum;
2436                  Execute68kTrap(0xa43d, &r);             // DrvrInstallRsrvMem()
2437                  r.a[0] = ReadMacInt32(ReadMacInt32(0x11c) + ~CDROMRefNum * 4);  // Get driver handle from Unit Table
2438                  Execute68kTrap(0xa029, &r);             // HLock()
2439                  dce = ReadMacInt32(r.a[0]);
2440 <                WriteMacInt32(dce + dCtlDriver, ROM_BASE + sony_offset + 0x200);
2440 >                WriteMacInt32(dce + dCtlDriver, ROMBase + sony_offset + 0x200);
2441                  WriteMacInt16(dce + dCtlFlags, CDROMDriverFlags);
2442  
2443                  // Open CD-ROM driver
# Line 2364 | Line 2448 | void InstallDrivers(void)
2448          }
2449  
2450          // Install serial drivers
2451 <        r.a[0] = ROM_BASE + sony_offset + 0x300;
2451 >        r.a[0] = ROMBase + sony_offset + 0x300;
2452          r.d[0] = (uint32)-6;
2453          Execute68kTrap(0xa43d, &r);             // DrvrInstallRsrvMem()
2454          r.a[0] = ReadMacInt32(ReadMacInt32(0x11c) + ~(-6) * 4); // Get driver handle from Unit Table
2455          Execute68kTrap(0xa029, &r);             // HLock()
2456          dce = ReadMacInt32(r.a[0]);
2457 <        WriteMacInt32(dce + dCtlDriver, ROM_BASE + sony_offset + 0x300);
2457 >        WriteMacInt32(dce + dCtlDriver, ROMBase + sony_offset + 0x300);
2458          WriteMacInt16(dce + dCtlFlags, 0x4d00);
2459  
2460 <        r.a[0] = ROM_BASE + sony_offset + 0x400;
2460 >        r.a[0] = ROMBase + sony_offset + 0x400;
2461          r.d[0] = (uint32)-7;
2462          Execute68kTrap(0xa43d, &r);             // DrvrInstallRsrvMem()
2463          r.a[0] = ReadMacInt32(ReadMacInt32(0x11c) + ~(-7) * 4); // Get driver handle from Unit Table
2464          Execute68kTrap(0xa029, &r);             // HLock()
2465          dce = ReadMacInt32(r.a[0]);
2466 <        WriteMacInt32(dce + dCtlDriver, ROM_BASE + sony_offset + 0x400);
2466 >        WriteMacInt32(dce + dCtlDriver, ROMBase + sony_offset + 0x400);
2467          WriteMacInt16(dce + dCtlFlags, 0x4e00);
2468  
2469 <        r.a[0] = ROM_BASE + sony_offset + 0x500;
2469 >        r.a[0] = ROMBase + sony_offset + 0x500;
2470          r.d[0] = (uint32)-8;
2471          Execute68kTrap(0xa43d, &r);             // DrvrInstallRsrvMem()
2472          r.a[0] = ReadMacInt32(ReadMacInt32(0x11c) + ~(-8) * 4); // Get driver handle from Unit Table
2473          Execute68kTrap(0xa029, &r);             // HLock()
2474          dce = ReadMacInt32(r.a[0]);
2475 <        WriteMacInt32(dce + dCtlDriver, ROM_BASE + sony_offset + 0x500);
2475 >        WriteMacInt32(dce + dCtlDriver, ROMBase + sony_offset + 0x500);
2476          WriteMacInt16(dce + dCtlFlags, 0x4d00);
2477  
2478 <        r.a[0] = ROM_BASE + sony_offset + 0x600;
2478 >        r.a[0] = ROMBase + sony_offset + 0x600;
2479          r.d[0] = (uint32)-9;
2480          Execute68kTrap(0xa43d, &r);             // DrvrInstallRsrvMem()
2481          r.a[0] = ReadMacInt32(ReadMacInt32(0x11c) + ~(-9) * 4); // Get driver handle from Unit Table
2482          Execute68kTrap(0xa029, &r);             // HLock()
2483          dce = ReadMacInt32(r.a[0]);
2484 <        WriteMacInt32(dce + dCtlDriver, ROM_BASE + sony_offset + 0x600);
2484 >        WriteMacInt32(dce + dCtlDriver, ROMBase + sony_offset + 0x600);
2485          WriteMacInt16(dce + dCtlFlags, 0x4e00);
2486   }

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