915 |
|
lp = (uint32 *)(ROM_BASE + 0x3131f4); |
916 |
|
if (ntohl(*lp) == 0x7e5f42a6) // NewWorld ROM |
917 |
|
*lp = htonl(0x82400000 + XLM_PVR); // lwz r18,(theoretical PVR) |
918 |
+ |
lp = (uint32 *)(ROM_BASE + 0x314600); |
919 |
+ |
if (ntohl(*lp) == 0x7d3f42a6) |
920 |
+ |
*lp = htonl(0x81200000 + XLM_PVR); // lzw r9,(theoritical PVR) |
921 |
|
|
922 |
|
// Don't read SDR1 |
923 |
|
static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c}; |
1123 |
|
*lp = htonl(0x4e800020); // blr |
1124 |
|
|
1125 |
|
// Extra routine for Reset/FC1E opcode |
1126 |
< |
lp = (uint32 *)(ROM_BASE + 0x36fc00); |
1126 |
> |
lp = (uint32 *)(ROM_BASE + 0x36fb00); |
1127 |
|
*lp++ = htonl(0x7c2903a6); // mtctr r1 |
1128 |
|
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST |
1129 |
|
*lp++ = htonl(0x38210001); // addi r1,r1,1 |
1144 |
|
*lp++ = htonl(0x80e10660); // lwz r7,$0660(r1) |
1145 |
|
*lp++ = htonl(0x7d8802a6); // mflr r12 |
1146 |
|
*lp++ = htonl(0x50e74001); // rlwimi. r7,r7,8,$80000000 |
1147 |
< |
*lp++ = htonl(0x814105f4); // lwz r10,0x05f8(r1) |
1147 |
> |
*lp++ = htonl(0x814105f8); // lwz r10,0x05f8(r1) |
1148 |
|
*lp++ = htonl(0x7d4803a6); // mtlr r10 |
1149 |
|
*lp++ = htonl(0x7d8a6378); // mr r10,r12 |
1150 |
|
*lp++ = htonl(0x3d600002); // lis r11,0x0002 |
1174 |
|
*lp++ = htonl(0x80e10660); // lwz r7,$0660(r1) |
1175 |
|
*lp++ = htonl(0x7d8802a6); // mflr r12 |
1176 |
|
*lp++ = htonl(0x50e74001); // rlwimi. r7,r7,8,$80000000 |
1177 |
< |
*lp++ = htonl(0x814105f4); // lwz r10,0x05fc(r1) |
1177 |
> |
*lp++ = htonl(0x814105fc); // lwz r10,0x05fc(r1) |
1178 |
|
*lp++ = htonl(0x7d4803a6); // mtlr r10 |
1179 |
|
*lp++ = htonl(0x7d8a6378); // mr r10,r12 |
1180 |
|
*lp++ = htonl(0x3d600002); // lis r11,0x0002 |
1341 |
|
// Patch UniversalInfo |
1342 |
|
if (ROMType == ROMTYPE_NEWWORLD) { |
1343 |
|
static const uint8 univ_info_dat[] = {0x3f, 0xff, 0x04, 0x00}; |
1344 |
< |
if ((base = find_rom_data(0x14000, 0x16000, univ_info_dat, sizeof(univ_info_dat))) == 0) return false; |
1344 |
> |
if ((base = find_rom_data(0x14000, 0x18000, univ_info_dat, sizeof(univ_info_dat))) == 0) return false; |
1345 |
|
D(bug("universal_info %08lx\n", base)); |
1346 |
|
lp = (uint32 *)(ROM_BASE + base - 0x14); |
1347 |
|
lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14)); |
1719 |
|
|
1720 |
|
// Patch GetCPUSpeed (via 0x27a) (some ROMs have two of them) |
1721 |
|
static const uint8 cpu_speed_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x04, 0x4c, 0x7c}; |
1722 |
< |
if ((base = find_rom_data(0x6000, 0x9000, cpu_speed_dat, sizeof(cpu_speed_dat))) == 0) return false; |
1722 |
> |
if ((base = find_rom_data(0x6000, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) == 0) return false; |
1723 |
|
D(bug("cpu_speed %08lx\n", base)); |
1724 |
|
wp = (uint16 *)(ROM_BASE + base); |
1725 |
|
*wp++ = htons(0x203c); // move.l #(MHz<<16)|MHz,d0 |
1726 |
|
*wp++ = htons(CPUClockSpeed / 1000000); |
1727 |
|
*wp++ = htons(CPUClockSpeed / 1000000); |
1728 |
|
*wp = htons(M68K_RTS); |
1729 |
< |
if ((base = find_rom_data(base, 0x9000, cpu_speed_dat, sizeof(cpu_speed_dat))) != 0) { |
1729 |
> |
if ((base = find_rom_data(base, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) != 0) { |
1730 |
|
D(bug("cpu_speed2 %08lx\n", base)); |
1731 |
|
wp = (uint16 *)(ROM_BASE + base); |
1732 |
|
*wp++ = htons(0x203c); // move.l #(MHz<<16)|MHz,d0 |
2043 |
|
|
2044 |
|
if (ROMType == ROMTYPE_NEWWORLD) { |
2045 |
|
static const uint8 via_int3_dat[] = {0x48, 0xe7, 0xf0, 0xf0, 0x76, 0x01, 0x60, 0x26}; |
2046 |
< |
if ((base = find_rom_data(0x15000, 0x18000, via_int3_dat, sizeof(via_int3_dat))) == 0) return false; |
2046 |
> |
if ((base = find_rom_data(0x15000, 0x19000, via_int3_dat, sizeof(via_int3_dat))) == 0) return false; |
2047 |
|
D(bug("via_int3 %08lx\n", base)); |
2048 |
|
wp = (uint16 *)(ROM_BASE + base); // CHRP level 1 handler |
2049 |
|
*wp++ = htons(M68K_JMP); |