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root/cebix/SheepShaver/src/rom_patches.cpp

Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.35 by gbeauche, 2004-07-14T08:24:07Z vs.
Revision 1.36 by gbeauche, 2004-11-13T14:09:15Z

#	Line 148 | Line 148 | bool DecodeROM(uint8 *data, uint32 size)
148		{
149		if (size == ROM_SIZE) {
150		// Plain ROM image
151	<	memcpy((void *)ROM_BASE, data, ROM_SIZE);
151	>	memcpy(ROMBaseHost, data, ROM_SIZE);
152		return true;
153		}
154		else if (strncmp((char *)data, "<CHRP-BOOT>", 11) == 0) {
#	Line 186 | Line 186 | bool DecodeROM(uint8 *data, uint32 size)
186		if (rom_signature == FOURCC('p','r','c','l')) {
187		D(bug("Offset of parcels data: %08x\n", image_offset));
188		D(bug("Size of parcels data: %08x\n", image_size));
189	<	decode_parcels(data + image_offset, (uint8 *)ROM_BASE, image_size);
189	>	decode_parcels(data + image_offset, ROMBaseHost, image_size);
190		}
191		else {
192		D(bug("Offset of compressed data: %08x\n", image_offset));
193		D(bug("Size of compressed data: %08x\n", image_size));
194	<	decode_lzss(data + image_offset, (uint8 *)ROM_BASE, image_size);
194	>	decode_lzss(data + image_offset, ROMBaseHost, image_size);
195		}
196		return true;
197		}
#	Line 207 | Line 207 | static uint32 find_rom_data(uint32 start
207		{
208		uint32 ofs = start;
209		while (ofs < end) {
210	<	if (!memcmp((void *)(ROM_BASE + ofs), data, data_len))
210	>	if (!memcmp(ROMBaseHost + ofs, data, data_len))
211		return ofs;
212		ofs++;
213		}
#	Line 224 | Line 224 | static uint32 rsrc_ptr = 0;
224		// id = 4711 means "find any ID"
225		static uint32 find_rom_resource(uint32 s_type, int16 s_id = 4711, bool cont = false)
226		{
227	<	uint32 *lp = (uint32 *)(ROM_BASE + 0x1a);
227	>	uint32 *lp = (uint32 *)(ROMBaseHost + 0x1a);
228		uint32 x = ntohl(*lp);
229	<	uint8 *bp = (uint8 *)(ROM_BASE + x + 5);
229	>	uint8 *bp = (uint8 *)(ROMBaseHost + x + 5);
230		uint32 header_size = *bp;
231
232		if (!cont)
#	Line 235 | Line 235 | static uint32 find_rom_resource(uint32 s
235		return 0;
236
237		for (;;) {
238	<	lp = (uint32 *)(ROM_BASE + rsrc_ptr);
238	>	lp = (uint32 *)(ROMBaseHost + rsrc_ptr);
239		rsrc_ptr = ntohl(*lp);
240		if (rsrc_ptr == 0)
241		break;
242
243		rsrc_ptr += header_size;
244
245	<	lp = (uint32 *)(ROM_BASE + rsrc_ptr + 4);
245	>	lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 4);
246		uint32 data = ntohl(*lp); lp++;
247		uint32 type = ntohl(*lp); lp++;
248		int16 id = ntohs(*(int16 *)lp);
#	Line 259 | Line 259 | static uint32 find_rom_resource(uint32 s
259
260		static uint32 find_rom_trap(uint16 trap)
261		{
262	<	uint32 *lp = (uint32 *)(ROM_BASE + 0x22);
263	<	lp = (uint32 *)(ROM_BASE + ntohl(*lp));
262	>	uint32 *lp = (uint32 *)(ROMBaseHost + 0x22);
263	>	lp = (uint32 *)(ROMBaseHost + ntohl(*lp));
264
265		if (trap > 0xa800)
266		return ntohl(lp[trap & 0x3ff]);
#	Line 274 | Line 274 | static uint32 find_rom_trap(uint16 trap)
274		*  there is no such instruction
275		*/
276
277	<	static uint32 powerpc_branch_target(uintptr addr)
277	>	static uint32 rom_powerpc_branch_target(uint32 addr)
278		{
279	<	uint32 opcode = ntohl(*(uint32 *)addr);
279	>	uint32 opcode = ntohl(*(uint32 *)(ROMBaseHost + addr));
280		uint32 primop = opcode >> 26;
281		uint32 target = 0;
282
#	Line 303 | Line 303 | static uint32 powerpc_branch_target(uint
303		static uint32 find_rom_powerpc_branch(uint32 start, uint32 end, uint32 target)
304		{
305		for (uint32 addr = start; addr < end; addr += 4) {
306	<	if (powerpc_branch_target(ROM_BASE + addr) == ROM_BASE + target)
306	>	if (rom_powerpc_branch_target(addr) == target)
307		return addr;
308		}
309		return 0;
#	Line 318 | Line 318 | static bool check_rom_patch_space(uint32
318		{
319		size = (size + 3) & -4;
320		for (int i = 0; i < size; i += 4) {
321	<	uint32 x = ntohl(*(uint32 *)(ROM_BASE + base + i));
321	>	uint32 x = ntohl(*(uint32 *)(ROMBaseHost + base + i));
322		if (x != 0x6b636b63 && x != 0)
323		return false;
324		}
#	Line 689 | Line 689 | static inline void memcpy_powerpc_code(v
689		bool PatchROM(void)
690		{
691		// Print ROM info
692	<	D(bug("Checksum: %08lx\n", ntohl(*(uint32 *)ROM_BASE)));
693	<	D(bug("Version: %04x\n", ntohs(*(uint16 *)(ROM_BASE + 8))));
694	<	D(bug("Sub Version: %04x\n", ntohs(*(uint16 *)(ROM_BASE + 18))));
695	<	D(bug("Nanokernel ID: %s\n", (char *)ROM_BASE + 0x30d064));
696	<	D(bug("Resource Map at %08lx\n", ntohl(*(uint32 *)(ROM_BASE + 26))));
697	<	D(bug("Trap Tables at %08lx\n\n", ntohl(*(uint32 *)(ROM_BASE + 34))));
692	>	D(bug("Checksum: %08lx\n", ntohl(*(uint32 *)ROMBaseHost)));
693	>	D(bug("Version: %04x\n", ntohs(*(uint16 *)(ROMBaseHost + 8))));
694	>	D(bug("Sub Version: %04x\n", ntohs(*(uint16 *)(ROMBaseHost + 18))));
695	>	D(bug("Nanokernel ID: %s\n", (char *)ROMBaseHost + 0x30d064));
696	>	D(bug("Resource Map at %08lx\n", ntohl(*(uint32 *)(ROMBaseHost + 26))));
697	>	D(bug("Trap Tables at %08lx\n\n", ntohl(*(uint32 *)(ROMBaseHost + 34))));
698
699		// Detect ROM type
700	<	if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot TNT", 8))
700	>	if (!memcmp(ROMBaseHost + 0x30d064, "Boot TNT", 8))
701		ROMType = ROMTYPE_TNT;
702	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Alchemy", 12))
702	>	else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Alchemy", 12))
703		ROMType = ROMTYPE_ALCHEMY;
704	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Zanzibar", 13))
704	>	else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Zanzibar", 13))
705		ROMType = ROMTYPE_ZANZIBAR;
706	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gazelle", 12))
706	>	else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Gazelle", 12))
707		ROMType = ROMTYPE_GAZELLE;
708	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gossamer", 13))
708	>	else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Gossamer", 13))
709		ROMType = ROMTYPE_GOSSAMER;
710	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "NewWorld", 8))
710	>	else if (!memcmp(ROMBaseHost + 0x30d064, "NewWorld", 8))
711		ROMType = ROMTYPE_NEWWORLD;
712		else
713		return false;
#	Line 730 | Line 730 | bool PatchROM(void)
730
731		#ifdef M68K_BREAK_POINT
732		// Install 68k breakpoint
733	<	uint16 *wp = (uint16 *)(ROM_BASE + M68K_BREAK_POINT);
733	>	uint16 *wp = (uint16 *)(ROMBaseHost + M68K_BREAK_POINT);
734		*wp++ = htons(M68K_EMUL_BREAK);
735		*wp = htons(M68K_EMUL_RETURN);
736		#endif
737
738		#ifdef POWERPC_BREAK_POINT
739		// Install PowerPC breakpoint
740	<	uint32 *lp = (uint32 *)(ROM_BASE + POWERPC_BREAK_POINT);
740	>	uint32 *lp = (uint32 *)(ROMBaseHost + POWERPC_BREAK_POINT);
741		*lp = htonl(0);
742		#endif
743
744		// Copy 68k emulator to 2MB boundary
745	<	memcpy((void *)(ROM_BASE + ROM_SIZE), (void *)(ROM_BASE + ROM_SIZE - 0x100000), 0x100000);
745	>	memcpy(ROMBaseHost + ROM_SIZE, ROMBaseHost + (ROM_SIZE - 0x100000), 0x100000);
746		return true;
747		}
748
#	Line 757 | Line 757 | static bool patch_nanokernel_boot(void)
757		uint32 base, loc;
758
759		// ROM boot structure patches
760	<	lp = (uint32 *)(ROM_BASE + 0x30d000);
760	>	lp = (uint32 *)(ROMBaseHost + 0x30d000);
761		lp[0x9c >> 2] = htonl(KernelDataAddr);                  // LA_InfoRecord
762		lp[0xa0 >> 2] = htonl(KernelDataAddr);                  // LA_KernelData
763		lp[0xa4 >> 2] = htonl(KernelDataAddr + 0x1000); // LA_EmulatorData
#	Line 769 | Line 769 | static bool patch_nanokernel_boot(void)
769		// Skip SR/BAT/SDR init
770		loc = 0x310000;
771		if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_GOSSAMER || ROMType == ROMTYPE_NEWWORLD) {
772	<	lp = (uint32 *)(ROM_BASE + loc);
772	>	lp = (uint32 *)(ROMBaseHost + loc);
773		*lp++ = htonl(POWERPC_NOP);
774		*lp = htonl(0x38000000);
775		}
776		static const uint8 sr_init_dat[] = {0x35, 0x4a, 0xff, 0xfc, 0x7d, 0x86, 0x50, 0x2e};
777		if ((base = find_rom_data(0x3101b0, 0x3105b0, sr_init_dat, sizeof(sr_init_dat))) == 0) return false;
778		D(bug("sr_init %08lx\n", base));
779	<	lp = (uint32 *)(ROM_BASE + loc + 8);
779	>	lp = (uint32 *)(ROMBaseHost + loc + 8);
780		*lp = htonl(0x48000000 | ((base - loc - 8) & 0x3fffffc));       // b            ROM_BASE+0x3101b0
781	<	lp = (uint32 *)(ROM_BASE + base);
781	>	lp = (uint32 *)(ROMBaseHost + base);
782		*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);            // lwz  r1,(pointer to Kernel Data)
783		*lp++ = htonl(0x3da0dead);              // lis  r13,0xdead      (start of kernel memory)
784		*lp++ = htonl(0x3dc00010);              // lis  r14,0x0010      (size of page table)
#	Line 788 | Line 788 | static bool patch_nanokernel_boot(void)
788		static const uint8 pvr_read_dat[] = {0x7d, 0x9f, 0x42, 0xa6};
789		if ((base = find_rom_data(0x3103b0, 0x3108b0, pvr_read_dat, sizeof(pvr_read_dat))) == 0) return false;
790		D(bug("pvr_read %08lx\n", base));
791	<	lp = (uint32 *)(ROM_BASE + base);
791	>	lp = (uint32 *)(ROMBaseHost + base);
792		*lp = htonl(0x81800000 + XLM_PVR);      // lwz  r12,(theoretical PVR)
793
794		// Set CPU specific data (even if ROM doesn't have support for that CPU)
#	Line 797 | Line 797 | static bool patch_nanokernel_boot(void)
797		uint32 ofs = ntohl(lp[7]) & 0xffff;
798		D(bug("ofs %08lx\n", ofs));
799		lp[8] = htonl((ntohl(lp[8]) & 0xffff) | 0x48000000);    // beq -> b
800	<	loc = (ntohl(lp[8]) & 0xffff) + (uint32)(lp+8) - ROM_BASE;
800	>	loc = (ntohl(lp[8]) & 0xffff) + (uintptr)(lp+8) - (uintptr)ROMBaseHost;
801		D(bug("loc %08lx\n", loc));
802	<	lp = (uint32 *)(ROM_BASE + ofs + 0x310000);
802	>	lp = (uint32 *)(ROMBaseHost + ofs + 0x310000);
803		switch (PVR >> 16) {
804		case 1:         // 601
805		lp[0] = htonl(0x1000);          // Page size
#	Line 931 | Line 931 | static bool patch_nanokernel_boot(void)
931		static const uint8 sprg3_mq_dat[] = {0x7d, 0x13, 0x43, 0xa6, 0x3d, 0x00, 0x00, 0x04, 0x7d, 0x00, 0x03, 0xa6, 0x39, 0x00, 0x00, 0x00, 0x7d, 0x00, 0x02, 0xa6};
932		if ((base = find_rom_data(loc + 0x20, loc + 0x60, sprg3_mq_dat, sizeof(sprg3_mq_dat))) == 0) return false;
933		D(bug("sprg3/mq %08lx\n", base));
934	<	lp = (uint32 *)(ROM_BASE + base);
934	>	lp = (uint32 *)(ROMBaseHost + base);
935		lp[0] = htonl(POWERPC_NOP);
936		lp[2] = htonl(POWERPC_NOP);
937		lp[4] = htonl(POWERPC_NOP);
#	Line 940 | Line 940 | static bool patch_nanokernel_boot(void)
940		static const uint8 msr_dat[] = {0x7d, 0xc0, 0x00, 0xa6};
941		if ((base = find_rom_data(loc + 0x40, loc + 0x80, msr_dat, sizeof(msr_dat))) == 0) return false;
942		D(bug("msr %08lx\n", base));
943	<	lp = (uint32 *)(ROM_BASE + base);
943	>	lp = (uint32 *)(ROMBaseHost + base);
944		*lp = htonl(0x39c00000);                // li   r14,0
945
946		// Don't write to DEC
947	<	lp = (uint32 *)(ROM_BASE + loc + 0x70);
947	>	lp = (uint32 *)(ROMBaseHost + loc + 0x70);
948		*lp++ = htonl(POWERPC_NOP);
949	<	loc = (ntohl(lp[0]) & 0xffff) + (uint32)lp - ROM_BASE;
949	>	loc = (ntohl(lp[0]) & 0xffff) + (uintptr)lp - (uintptr)ROMBaseHost;
950		D(bug("loc %08lx\n", loc));
951
952		// Don't set SPRG3
953		static const uint8 sprg3_dat[] = {0x39, 0x21, 0x03, 0x60, 0x7d, 0x33, 0x43, 0xa6, 0x39, 0x01, 0x04, 0x20};
954		if ((base = find_rom_data(0x310000, 0x314000, sprg3_dat, sizeof(sprg3_dat))) == 0) return false;
955		D(bug("sprg3 %08lx\n", base + 4));
956	<	lp = (uint32 *)(ROM_BASE + base + 4);
956	>	lp = (uint32 *)(ROMBaseHost + base + 4);
957		*lp = htonl(POWERPC_NOP);
958
959		// Don't read PVR
960		static const uint8 pvr_read2_dat[] = {0x7e, 0xff, 0x42, 0xa6, 0x56, 0xf7, 0x84, 0x3e};
961		if ((base = find_rom_data(0x310000, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) == 0) return false;
962		D(bug("pvr_read2 %08lx\n", base));
963	<	lp = (uint32 *)(ROM_BASE + base);
963	>	lp = (uint32 *)(ROMBaseHost + base);
964		*lp = htonl(0x82e00000 + XLM_PVR);              // lwz  r23,(theoretical PVR)
965		if ((base = find_rom_data(base + 4, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) != 0) {
966		D(bug("pvr_read2 %08lx\n", base));
967	<	lp = (uint32 *)(ROM_BASE + base);
967	>	lp = (uint32 *)(ROMBaseHost + base);
968		*lp = htonl(0x82e00000 + XLM_PVR);      // lwz  r23,(theoretical PVR)
969		}
970		static const uint8 pvr_read3_dat[] = {0x7e, 0x5f, 0x42, 0xa6, 0x56, 0x52, 0x84, 0x3e};
971		if ((base = find_rom_data(0x310000, 0x320000, pvr_read3_dat, sizeof(pvr_read3_dat))) != 0) {
972		D(bug("pvr_read3 %08lx\n", base));
973	<	lp = (uint32 *)(ROM_BASE + base);
973	>	lp = (uint32 *)(ROMBaseHost + base);
974		*lp = htonl(0x82400000 + XLM_PVR);      // lwz  r18,(theoretical PVR)
975		}
976		static const uint8 pvr_read4_dat[] = {0x7d, 0x3f, 0x42, 0xa6, 0x55, 0x29, 0x84, 0x3e};
977		if ((base = find_rom_data(0x310000, 0x320000, pvr_read4_dat, sizeof(pvr_read4_dat))) != 0) {
978		D(bug("pvr_read4 %08lx\n", base));
979	<	lp = (uint32 *)(ROM_BASE + base);
979	>	lp = (uint32 *)(ROMBaseHost + base);
980		*lp = htonl(0x81200000 + XLM_PVR);      // lzw  r9,(theoritical PVR)
981		}
982
#	Line 984 | Line 984 | static bool patch_nanokernel_boot(void)
984		static const uint8 sdr1_read_dat[] = {0x7d, 0x19, 0x02, 0xa6, 0x55, 0x16, 0x81, 0xde};
985		if ((base = find_rom_data(0x310000, 0x320000, sdr1_read_dat, sizeof(sdr1_read_dat))) == 0) return false;
986		D(bug("sdr1_read %08lx\n", base));
987	<	lp = (uint32 *)(ROM_BASE + base);
987	>	lp = (uint32 *)(ROMBaseHost + base);
988		*lp++ = htonl(0x3d00dead);              // lis  r8,0xdead               (pointer to page table)
989		*lp++ = htonl(0x3ec0001f);              // lis  r22,0x001f      (size of page table)
990		*lp = htonl(POWERPC_NOP);
#	Line 993 | Line 993 | static bool patch_nanokernel_boot(void)
993		static const uint8 pgtb_clear_dat[] = {0x36, 0xd6, 0xff, 0xfc, 0x7e, 0xe8, 0xb1, 0x2e, 0x41, 0x81, 0xff, 0xf8};
994		if ((base = find_rom_data(0x310000, 0x320000, pgtb_clear_dat, sizeof(pgtb_clear_dat))) == 0) return false;
995		D(bug("pgtb_clear %08lx\n", base + 4));
996	<	lp = (uint32 *)(ROM_BASE + base + 4);
996	>	lp = (uint32 *)(ROMBaseHost + base + 4);
997		*lp = htonl(POWERPC_NOP);
998		D(bug("tblie %08lx\n", base + 12));
999	<	lp = (uint32 *)(ROM_BASE + base + 12);
999	>	lp = (uint32 *)(ROMBaseHost + base + 12);
1000		*lp = htonl(POWERPC_NOP);
1001
1002		// Don't create RAM descriptor table
1003		static const uint8 desc_create_dat[] = {0x97, 0xfd, 0x00, 0x04, 0x3b, 0xff, 0x10, 0x00, 0x4b, 0xff, 0xff, 0xdc};
1004		if ((base = find_rom_data(0x310000, 0x320000, desc_create_dat, sizeof(desc_create_dat))) == 0) return false;
1005		D(bug("desc_create %08lx\n", base))
1006	<	lp = (uint32 *)(ROM_BASE + base);
1006	>	lp = (uint32 *)(ROMBaseHost + base);
1007		*lp = htonl(POWERPC_NOP);
1008
1009		// Don't load SRs and BATs
#	Line 1013 | Line 1013 | static bool patch_nanokernel_boot(void)
1013		if ((base = find_rom_data(0x310000, 0x320000, sr_load_caller, sizeof(sr_load_caller))) == 0) return false;
1014		if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false;
1015		D(bug("sr_load %08lx, called from %08lx\n", loc, base));
1016	<	lp = (uint32 *)(ROM_BASE + base);
1016	>	lp = (uint32 *)(ROMBaseHost + base);
1017		*lp = htonl(POWERPC_NOP);
1018
1019		// Don't mess with SRs
1020		static const uint8 sr_load2_dat[] = {0x83, 0xa1, 0x05, 0xe8, 0x57, 0x7c, 0x3e, 0x78, 0x7f, 0xbd, 0xe0, 0x2e};
1021		if ((base = find_rom_data(0x310000, 0x320000, sr_load2_dat, sizeof(sr_load2_dat))) == 0) return false;
1022		D(bug("sr_load2 %08lx\n", base));
1023	<	lp = (uint32 *)(ROM_BASE + base);
1023	>	lp = (uint32 *)(ROMBaseHost + base);
1024		*lp = htonl(POWERPC_BLR);
1025
1026		// Don't check performance monitor
1027		static const uint8 pm_check_dat[] = {0x7e, 0x58, 0xeb, 0xa6, 0x7e, 0x53, 0x90, 0xf8, 0x7e, 0x78, 0xea, 0xa6};
1028		if ((base = find_rom_data(0x310000, 0x320000, pm_check_dat, sizeof(pm_check_dat))) == 0) return false;
1029		D(bug("pm_check %08lx\n", base));
1030	<	lp = (uint32 *)(ROM_BASE + base);
1030	>	lp = (uint32 *)(ROMBaseHost + base);
1031
1032		static const int spr_check_list[] = {
1033		952 /* mmcr0 */, 953 /* pmc1 */, 954 /* pmc2 */, 955 /* sia */,
#	Line 1056 | Line 1056 | static bool patch_nanokernel_boot(void)
1056		if ((base = find_rom_data(0x310000, 0x320000, jump68k_caller_dat, sizeof(jump68k_caller_dat))) == 0) return false;
1057		if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false;
1058		D(bug("jump68k %08lx, called from %08lx\n", loc, base));
1059	<	lp = (uint32 *)(ROM_BASE + base);
1059	>	lp = (uint32 *)(ROMBaseHost + base);
1060		*lp++ = htonl(0x80610634);              // lwz  r3,0x0634(r1)   (pointer to Emulator Data)
1061		*lp++ = htonl(0x8081119c);              // lwz  r4,0x119c(r1)   (pointer to opcode table)
1062		*lp++ = htonl(0x80011184);              // lwz  r0,0x1184(r1)   (pointer to emulator init routine)
#	Line 1079 | Line 1079 | static bool patch_68k_emul(void)
1079		static const uint8 twi_dat[] = {0x0f, 0xff, 0x00, 0x00, 0x0f, 0xff, 0x00, 0x01, 0x0f, 0xff, 0x00, 0x02};
1080		if ((base = find_rom_data(0x36e600, 0x36ea00, twi_dat, sizeof(twi_dat))) == 0) return false;
1081		D(bug("twi %08lx\n", base));
1082	<	lp = (uint32 *)(ROM_BASE + base);
1082	>	lp = (uint32 *)(ROMBaseHost + base);
1083		*lp++ = htonl(0x48000000 + 0x36f900 - base);            // b 0x36f900 (Emulator start)
1084		*lp++ = htonl(0x48000000 + 0x36fa00 - base - 4);        // b 0x36fa00 (Mixed mode)
1085		*lp++ = htonl(0x48000000 + 0x36fb00 - base - 8);        // b 0x36fb00 (Reset/FC1E opcode)
#	Line 1099 | Line 1099 | static bool patch_68k_emul(void)
1099
1100		#if EMULATED_PPC
1101		// Install EMUL_RETURN, EXEC_RETURN, EXEC_NATIVE and EMUL_OP opcodes
1102	<	lp = (uint32 *)(ROM_BASE + 0x380000 + (M68K_EMUL_RETURN << 3));
1102	>	lp = (uint32 *)(ROMBaseHost + 0x380000 + (M68K_EMUL_RETURN << 3));
1103		*lp++ = htonl(POWERPC_EMUL_OP);
1104		*lp++ = htonl(0x4bf66e80);                                                      // b    0x366084
1105		*lp++ = htonl(POWERPC_EMUL_OP | 1);
#	Line 1112 | Line 1112 | static bool patch_68k_emul(void)
1112		}
1113		#else
1114		// Install EMUL_RETURN, EXEC_RETURN and EMUL_OP opcodes
1115	<	lp = (uint32 *)(ROM_BASE + 0x380000 + (M68K_EMUL_RETURN << 3));
1115	>	lp = (uint32 *)(ROMBaseHost + 0x380000 + (M68K_EMUL_RETURN << 3));
1116		*lp++ = htonl(0x80000000 + XLM_EMUL_RETURN_PROC);       // lwz  r0,XLM_EMUL_RETURN_PROC
1117		*lp++ = htonl(0x4bf705fc);                                                      // b    0x36f800
1118		*lp++ = htonl(0x80000000 + XLM_EXEC_RETURN_PROC);       // lwz  r0,XLM_EXEC_RETURN_PROC
#	Line 1125 | Line 1125 | static bool patch_68k_emul(void)
1125		}
1126
1127		// Extra routines for EMUL_RETURN/EXEC_RETURN/EMUL_OP
1128	<	lp = (uint32 *)(ROM_BASE + 0x36f800);
1128	>	lp = (uint32 *)(ROMBaseHost + 0x36f800);
1129		*lp++ = htonl(0x7c0803a6);                                              // mtlr r0
1130		*lp++ = htonl(0x4e800020);                                              // blr
1131
#	Line 1135 | Line 1135 | static bool patch_68k_emul(void)
1135		#endif
1136
1137		// Extra routine for 68k emulator start
1138	<	lp = (uint32 *)(ROM_BASE + 0x36f900);
1138	>	lp = (uint32 *)(ROMBaseHost + 0x36f900);
1139		*lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1140		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1141		*lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
#	Line 1165 | Line 1165 | static bool patch_68k_emul(void)
1165		*lp = htonl(0x4e800020);                                        // blr
1166
1167		// Extra routine for Mixed Mode
1168	<	lp = (uint32 *)(ROM_BASE + 0x36fa00);
1168	>	lp = (uint32 *)(ROMBaseHost + 0x36fa00);
1169		*lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1170		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1171		*lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
#	Line 1195 | Line 1195 | static bool patch_68k_emul(void)
1195		*lp = htonl(0x4e800020);                                        // blr
1196
1197		// Extra routine for Reset/FC1E opcode
1198	<	lp = (uint32 *)(ROM_BASE + 0x36fb00);
1198	>	lp = (uint32 *)(ROMBaseHost + 0x36fb00);
1199		*lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1200		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1201		*lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
#	Line 1225 | Line 1225 | static bool patch_68k_emul(void)
1225		*lp = htonl(0x4e800020);                                        // blr
1226
1227		// Extra routine for FE0A opcode (QuickDraw 3D needs this)
1228	<	lp = (uint32 *)(ROM_BASE + 0x36fc00);
1228	>	lp = (uint32 *)(ROMBaseHost + 0x36fc00);
1229		*lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1230		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1231		*lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
#	Line 1255 | Line 1255 | static bool patch_68k_emul(void)
1255		*lp = htonl(0x4e800020);                                        // blr
1256
1257		// Patch DR emulator to jump to right address when an interrupt occurs
1258	<	lp = (uint32 *)(ROM_BASE + 0x370000);
1259	<	while (lp < (uint32 *)(ROM_BASE + 0x380000)) {
1258	>	lp = (uint32 *)(ROMBaseHost + 0x370000);
1259	>	while (lp < (uint32 *)(ROMBaseHost + 0x380000)) {
1260		if (ntohl(*lp) == 0x4ca80020)           // bclr         5,8
1261		goto dr_found;
1262		lp++;
#	Line 1265 | Line 1265 | static bool patch_68k_emul(void)
1265		return false;
1266		dr_found:
1267		lp++;
1268	<	loc = (uint32)lp - ROM_BASE;
1269	<	if ((base = powerpc_branch_target(ROM_BASE + loc)) == 0) base = ROM_BASE + loc;
1268	>	loc = (uintptr)lp - (uintptr)ROMBaseHost;
1269	>	if ((base = rom_powerpc_branch_target(loc)) == 0) base = ROM_BASE + loc;
1270		static const uint8 dr_ret_dat[] = {0x80, 0xbf, 0x08, 0x14, 0x53, 0x19, 0x4d, 0xac, 0x7c, 0xa8, 0x03, 0xa6};
1271		if ((base = find_rom_data(base - ROM_BASE, 0x380000, dr_ret_dat, sizeof(dr_ret_dat))) == 0) return false;
1272		D(bug("dr_ret %08lx\n", base));
1273		if (base != loc) {
1274		// OldWorld ROMs contain an absolute branch
1275	<	D(bug(" patching absolute branch at %08x\n", (uint32)lp - ROM_BASE));
1276	<	*lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff));          // b    DR_CACHE_BASE+0x1f000
1277	<	lp = (uint32 *)(ROM_BASE + 0x37f000);
1275	>	D(bug(" patching absolute branch at %08x\n", loc));
1276	>	*lp = htonl(0x48000000 + 0xf000 - (loc & 0xffff));                              // b    DR_CACHE_BASE+0x1f000
1277	>	lp = (uint32 *)(ROMBaseHost + 0x37f000);
1278		*lp++ = htonl(0x3c000000 + ((ROM_BASE + base) >> 16));                  // lis  r0,xxx
1279		*lp++ = htonl(0x60000000 + ((ROM_BASE + base) & 0xffff));               // ori  r0,r0,xxx
1280		*lp++ = htonl(0x7c0803a6);                                                                              // mtlr r0
#	Line 1297 | Line 1297 | static bool patch_nanokernel(void)
1297		static const uint8 virt2phys_dat[] = {0x7d, 0x1b, 0x43, 0x78, 0x3b, 0xa1, 0x03, 0x20};
1298		if ((base = find_rom_data(0x313000, 0x314000, virt2phys_dat, sizeof(virt2phys_dat))) == 0) return false;
1299		D(bug("virt2phys %08lx\n", base + 8));
1300	<	lp = (uint32 *)(ROM_BASE + base + 8);   // Don't translate virtual->physical
1300	>	lp = (uint32 *)(ROMBaseHost + base + 8);        // Don't translate virtual->physical
1301		lp[0] = htonl(0x7f7fdb78);                                      // mr           r31,r27
1302		lp[2] = htonl(POWERPC_NOP);
1303
1304		static const uint8 ppc_excp_tbl_dat[] = {0x39, 0x01, 0x04, 0x20, 0x7d, 0x13, 0x43, 0xa6};
1305		if ((base = find_rom_data(0x313000, 0x314000, ppc_excp_tbl_dat, sizeof(ppc_excp_tbl_dat))) == 0) return false;
1306		D(bug("ppc_excp_tbl %08lx\n", base));
1307	<	lp = (uint32 *)(ROM_BASE + base);               // Don't activate PPC exception table
1307	>	lp = (uint32 *)(ROMBaseHost + base);            // Don't activate PPC exception table
1308		*lp++ = htonl(0x39000000 + MODE_NATIVE);        // li   r8,MODE_NATIVE
1309		*lp = htonl(0x91000000 + XLM_RUN_MODE);         // stw  r8,XLM_RUN_MODE
1310
1311		static const uint8 save_fpu_dat[] = {0x7d, 0x00, 0x00, 0xa6, 0x61, 0x08, 0x20, 0x00, 0x7d, 0x00, 0x01, 0x24};
1312		if ((base = find_rom_data(0x310000, 0x314000, save_fpu_dat, sizeof(save_fpu_dat))) == 0) return false;
1313		D(bug("save_fpu %08lx\n", base));
1314	<	lp = (uint32 *)(ROM_BASE + base);               // Don't modify MSR to turn on FPU
1314	>	lp = (uint32 *)(ROMBaseHost + base);            // Don't modify MSR to turn on FPU
1315		if (ntohl(lp[4]) != 0x556b04e2) return false;
1316	<	loc = ROM_BASE + base;
1316	>	loc = base;
1317		#if 1
1318		// FIXME: is that really intended?
1319		*lp++ = htonl(POWERPC_NOP);
#	Line 1331 | Line 1331 | static bool patch_nanokernel(void)
1331		static const uint8 save_fpu_caller_dat[] = {0x93, 0xa6, 0x01, 0xec, 0x93, 0xc6, 0x01, 0xf4, 0x93, 0xe6, 0x01, 0xfc, 0x40};
1332		if ((base = find_rom_data(0x310000, 0x314000, save_fpu_caller_dat, sizeof(save_fpu_caller_dat))) == 0) return false;
1333		D(bug("save_fpu_caller %08lx\n", base + 12));
1334	<	if (powerpc_branch_target(ROM_BASE + base + 12) != loc) return false;
1335	<	lp = (uint32 *)(ROM_BASE + base + 12);  // Always save FPU state
1334	>	if (rom_powerpc_branch_target(base + 12) != loc) return false;
1335	>	lp = (uint32 *)(ROMBaseHost + base + 12);       // Always save FPU state
1336		*lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312e88
1337
1338		static const uint8 mdec_dat[] = {0x7f, 0xf6, 0x02, 0xa6, 0x2c, 0x08, 0x00, 0x00, 0x93, 0xe1, 0x06, 0x68, 0x7d, 0x16, 0x03, 0xa6};
1339		if ((base = find_rom_data(0x310000, 0x314000, mdec_dat, sizeof(mdec_dat))) == 0) return false;
1340		D(bug("mdec %08lx\n", base));
1341	<	lp = (uint32 *)(ROM_BASE + base);               // Don't modify DEC
1341	>	lp = (uint32 *)(ROMBaseHost + base);            // Don't modify DEC
1342		lp[0] = htonl(0x3be00000);                                      // li   r31,0
1343		#if 1
1344		lp[3] = htonl(POWERPC_NOP);
#	Line 1351 | Line 1351 | static bool patch_nanokernel(void)
1351		static const uint8 restore_fpu_caller_dat[] = {0x81, 0x06, 0x00, 0xf4, 0x81, 0x46, 0x00, 0xfc, 0x7d, 0x09, 0x03, 0xa6, 0x40};
1352		if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller_dat, sizeof(restore_fpu_caller_dat))) == 0) return false;
1353		D(bug("restore_fpu_caller %08lx\n", base + 12));
1354	<	lp = (uint32 *)(ROM_BASE + base + 12);  // Always restore FPU state
1354	>	lp = (uint32 *)(ROMBaseHost + base + 12);       // Always restore FPU state
1355		*lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312ddc
1356
1357		static const uint8 m68k_excp_tbl_dat[] = {0x81, 0x21, 0x06, 0x58, 0x39, 0x01, 0x03, 0x60, 0x7d, 0x13, 0x43, 0xa6};
1358		if ((base = find_rom_data(0x310000, 0x314000, m68k_excp_tbl_dat, sizeof(m68k_excp_tbl_dat))) == 0) return false;
1359		D(bug("m68k_excp %08lx\n", base + 4));
1360	<	lp = (uint32 *)(ROM_BASE + base + 4);   // Don't activate 68k exception table
1360	>	lp = (uint32 *)(ROMBaseHost + base + 4);        // Don't activate 68k exception table
1361		*lp++ = htonl(0x39000000 + MODE_68K);           // li   r8,MODE_68K
1362		*lp = htonl(0x91000000 + XLM_RUN_MODE);         // stw  r8,XLM_RUN_MODE
1363
#	Line 1365 | Line 1365 | static bool patch_nanokernel(void)
1365		static const uint8 restore_fpu_caller2_dat[] = {0x81, 0x86, 0x00, 0x8c, 0x80, 0x66, 0x00, 0x94, 0x80, 0x86, 0x00, 0x9c, 0x40};
1366		if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller2_dat, sizeof(restore_fpu_caller2_dat))) == 0) return false;
1367		D(bug("restore_fpu_caller2 %08lx\n", base + 12));
1368	<	loc = powerpc_branch_target(ROM_BASE + base + 12) - ROM_BASE;
1369	<	lp = (uint32 *)(ROM_BASE + base + 12);  // Always restore FPU state
1368	>	loc = rom_powerpc_branch_target(base + 12);
1369	>	lp = (uint32 *)(ROMBaseHost + base + 12);       // Always restore FPU state
1370		*lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312dd4
1371
1372		static const uint8 restore_fpu_dat[] = {0x55, 0x68, 0x04, 0xa5, 0x4c, 0x82, 0x00, 0x20, 0x81, 0x06, 0x00, 0xe4};
1373		if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_dat, sizeof(restore_fpu_dat))) == 0) return false;
1374		D(bug("restore_fpu %08lx\n", base));
1375		if (base != loc) return false;
1376	<	lp = (uint32 *)(ROM_BASE + base + 4);   // Don't modify MSR to turn on FPU
1376	>	lp = (uint32 *)(ROMBaseHost + base + 4);        // Don't modify MSR to turn on FPU
1377		*lp++ = htonl(POWERPC_NOP);
1378		lp += 2;
1379		*lp++ = htonl(POWERPC_NOP);
#	Line 1386 | Line 1386 | static bool patch_nanokernel(void)
1386		static const uint8 trap_return_dat[] = {0x80, 0xc1, 0x00, 0x18, 0x80, 0x21, 0x00, 0x04, 0x4c, 0x00, 0x00, 0x64};
1387		if ((base = find_rom_data(0x312000, 0x320000, trap_return_dat, sizeof(trap_return_dat))) == 0) return false;
1388		D(bug("trap_return %08lx\n", base + 8));
1389	<	lp = (uint32 *)(ROM_BASE + base + 8);   // Replace rfi
1389	>	lp = (uint32 *)(ROMBaseHost + base + 8);        // Replace rfi
1390		*lp = htonl(POWERPC_BCTR);
1391
1392		while (ntohl(*lp) != 0x7d5a03a6) lp--;
1393		*lp++ = htonl(0x7d4903a6);                                      // mtctr        r10
1394		*lp++ = htonl(0x7daff120);                                      // mtcr r13
1395	<	*lp = htonl(0x48000000 + ((0x318000 - ((uint32)lp - ROM_BASE)) & 0x03fffffc));  // b            ROM_BASE+0x318000
1396	<	uint32 npc = (uint32)(lp + 1) - ROM_BASE;
1395	>	*lp = htonl(0x48000000 + ((0x318000 - ((uintptr)lp - (uintptr)ROMBaseHost)) & 0x03fffffc));     // b            ROM_BASE+0x318000
1396	>	uint32 npc = (uintptr)(lp + 1) - (uintptr)ROMBaseHost;
1397
1398	<	lp = (uint32 *)(ROM_BASE + 0x318000);
1398	>	lp = (uint32 *)(ROMBaseHost + 0x318000);
1399		*lp++ = htonl(0x81400000 + XLM_IRQ_NEST);       // lwz  r10,XLM_IRQ_NEST
1400		*lp++ = htonl(0x394affff);                                      // subi r10,r10,1
1401		*lp++ = htonl(0x91400000 + XLM_IRQ_NEST);       // stw  r10,XLM_IRQ_NEST
#	Line 1426 | Line 1426 | static bool patch_68k(void)
1426		static const uint8 reset_dat[] = {0x4e, 0x70};
1427		if ((base = find_rom_data(0xc8, 0x120, reset_dat, sizeof(reset_dat))) == 0) return false;
1428		D(bug("reset %08lx\n", base));
1429	<	wp = (uint16 *)(ROM_BASE + base);
1429	>	wp = (uint16 *)(ROMBaseHost + base);
1430		*wp = htons(M68K_NOP);
1431
1432		// Fake reading PowerMac ID (via Universal)
1433		static const uint8 powermac_id_dat[] = {0x45, 0xf9, 0x5f, 0xff, 0xff, 0xfc, 0x20, 0x12, 0x72, 0x00};
1434		if ((base = find_rom_data(0xe000, 0x15000, powermac_id_dat, sizeof(powermac_id_dat))) == 0) return false;
1435		D(bug("powermac_id %08lx\n", base));
1436	<	wp = (uint16 *)(ROM_BASE + base);
1436	>	wp = (uint16 *)(ROMBaseHost + base);
1437		*wp++ = htons(0x203c);                  // move.l       #id,d0
1438		*wp++ = htons(0);
1439		//      if (ROMType == ROMTYPE_NEWWORLD)
#	Line 1448 | Line 1448 | static bool patch_68k(void)
1448		static const uint8 univ_info_dat[] = {0x3f, 0xff, 0x04, 0x00};
1449		if ((base = find_rom_data(0x14000, 0x18000, univ_info_dat, sizeof(univ_info_dat))) == 0) return false;
1450		D(bug("universal_info %08lx\n", base));
1451	<	lp = (uint32 *)(ROM_BASE + base - 0x14);
1451	>	lp = (uint32 *)(ROMBaseHost + base - 0x14);
1452		lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1453		lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1454		lp[0x14 >> 2] = htonl(0x3fff0401);
#	Line 1460 | Line 1460 | static bool patch_68k(void)
1460		lp[0x60 >> 2] = htonl(0x0000003d);
1461		} else if (ROMType == ROMTYPE_ZANZIBAR) {
1462		base = 0x12b70;
1463	<	lp = (uint32 *)(ROM_BASE + base - 0x14);
1463	>	lp = (uint32 *)(ROMBaseHost + base - 0x14);
1464		lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1465		lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1466		lp[0x14 >> 2] = htonl(0x3fff0401);
#	Line 1472 | Line 1472 | static bool patch_68k(void)
1472		lp[0x60 >> 2] = htonl(0x0000003d);
1473		} else if (ROMType == ROMTYPE_GOSSAMER) {
1474		base = 0x12d20;
1475	<	lp = (uint32 *)(ROM_BASE + base - 0x14);
1475	>	lp = (uint32 *)(ROMBaseHost + base - 0x14);
1476		lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1477		lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1478		lp[0x14 >> 2] = htonl(0x3fff0401);
#	Line 1486 | Line 1486 | static bool patch_68k(void)
1486
1487		// Construct AddrMap for NewWorld ROM
1488		if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) {
1489	<	lp = (uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE);
1489	>	lp = (uint32 *)(ROMBaseHost + ADDR_MAP_PATCH_SPACE);
1490		memset(lp - 10, 0, 0x128);
1491		lp[-10] = htonl(0x0300001c);
1492		lp[-9] = htonl(0x000108c4);
#	Line 1510 | Line 1510 | static bool patch_68k(void)
1510		static const uint8 via_init_dat[] = {0x08, 0x00, 0x00, 0x02, 0x67, 0x00, 0x00, 0x2c, 0x24, 0x68, 0x00, 0x08};
1511		if ((base = find_rom_data(0xe000, 0x15000, via_init_dat, sizeof(via_init_dat))) == 0) return false;
1512		D(bug("via_init %08lx\n", base));
1513	<	wp = (uint16 *)(ROM_BASE + base + 4);
1513	>	wp = (uint16 *)(ROMBaseHost + base + 4);
1514		*wp = htons(0x6000);                    // bra
1515
1516		static const uint8 via_init2_dat[] = {0x24, 0x68, 0x00, 0x08, 0x00, 0x12, 0x00, 0x30, 0x4e, 0x71};
1517		if ((base = find_rom_data(0xa000, 0x10000, via_init2_dat, sizeof(via_init2_dat))) == 0) return false;
1518		D(bug("via_init2 %08lx\n", base));
1519	<	wp = (uint16 *)(ROM_BASE + base);
1519	>	wp = (uint16 *)(ROMBaseHost + base);
1520		*wp = htons(0x4ed6);                    // jmp  (a6)
1521
1522		static const uint8 via_init3_dat[] = {0x22, 0x68, 0x00, 0x08, 0x28, 0x3c, 0x20, 0x00, 0x01, 0x00};
1523		if ((base = find_rom_data(0xa000, 0x10000, via_init3_dat, sizeof(via_init3_dat))) == 0) return false;
1524		D(bug("via_init3 %08lx\n", base));
1525	<	wp = (uint16 *)(ROM_BASE + base);
1525	>	wp = (uint16 *)(ROMBaseHost + base);
1526		*wp = htons(0x4ed6);                    // jmp  (a6)
1527
1528		// Don't RunDiags, get BootGlobs pointer directly
#	Line 1530 | Line 1530 | static bool patch_68k(void)
1530		static const uint8 run_diags_dat[] = {0x60, 0xff, 0x00, 0x0c};
1531		if ((base = find_rom_data(0x110, 0x128, run_diags_dat, sizeof(run_diags_dat))) == 0) return false;
1532		D(bug("run_diags %08lx\n", base));
1533	<	wp = (uint16 *)(ROM_BASE + base);
1533	>	wp = (uint16 *)(ROMBaseHost + base);
1534		*wp++ = htons(0x4df9);                  // lea  xxx,a6
1535		*wp++ = htons((RAMBase + RAMSize - 0x1c) >> 16);
1536		*wp = htons((RAMBase + RAMSize - 0x1c) & 0xffff);
#	Line 1538 | Line 1538 | static bool patch_68k(void)
1538		static const uint8 run_diags_dat[] = {0x74, 0x00, 0x2f, 0x0e};
1539		if ((base = find_rom_data(0xd0, 0xf0, run_diags_dat, sizeof(run_diags_dat))) == 0) return false;
1540		D(bug("run_diags %08lx\n", base));
1541	<	wp = (uint16 *)(ROM_BASE + base - 6);
1541	>	wp = (uint16 *)(ROMBaseHost + base - 6);
1542		*wp++ = htons(0x4df9);                  // lea  xxx,a6
1543		*wp++ = htons((RAMBase + RAMSize - 0x1c) >> 16);
1544		*wp = htons((RAMBase + RAMSize - 0x1c) & 0xffff);
#	Line 1548 | Line 1548 | static bool patch_68k(void)
1548		static const uint8 nvram1_dat[] = {0x48, 0xe7, 0x01, 0x0e, 0x24, 0x68, 0x00, 0x08, 0x08, 0x83, 0x00, 0x1f};
1549		if ((base = find_rom_data(0x7000, 0xc000, nvram1_dat, sizeof(nvram1_dat))) == 0) return false;
1550		D(bug("nvram1 %08lx\n", base));
1551	<	wp = (uint16 *)(ROM_BASE + base);
1551	>	wp = (uint16 *)(ROMBaseHost + base);
1552		*wp++ = htons(M68K_EMUL_OP_XPRAM1);
1553		*wp = htons(M68K_RTS);
1554
#	Line 1556 | Line 1556 | static bool patch_68k(void)
1556		static const uint8 nvram2_dat[] = {0x48, 0xe7, 0x1c, 0xe0, 0x4f, 0xef, 0xff, 0xb4};
1557		if ((base = find_rom_data(0xa000, 0xd000, nvram2_dat, sizeof(nvram2_dat))) == 0) return false;
1558		D(bug("nvram2 %08lx\n", base));
1559	<	wp = (uint16 *)(ROM_BASE + base);
1559	>	wp = (uint16 *)(ROMBaseHost + base);
1560		*wp++ = htons(M68K_EMUL_OP_XPRAM2);
1561		*wp = htons(0x4ed3);                    // jmp  (a3)
1562
1563		static const uint8 nvram3_dat[] = {0x48, 0xe7, 0xdc, 0xe0, 0x4f, 0xef, 0xff, 0xb4};
1564		if ((base = find_rom_data(0xa000, 0xd000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1565		D(bug("nvram3 %08lx\n", base));
1566	<	wp = (uint16 *)(ROM_BASE + base);
1566	>	wp = (uint16 *)(ROMBaseHost + base);
1567		*wp++ = htons(M68K_EMUL_OP_XPRAM3);
1568		*wp = htons(0x4ed3);                    // jmp  (a3)
1569
1570		static const uint8 nvram4_dat[] = {0x4e, 0x56, 0xff, 0xa8, 0x48, 0xe7, 0x1f, 0x38, 0x16, 0x2e, 0x00, 0x13};
1571		if ((base = find_rom_data(0xa000, 0xd000, nvram4_dat, sizeof(nvram4_dat))) == 0) return false;
1572		D(bug("nvram4 %08lx\n", base));
1573	<	wp = (uint16 *)(ROM_BASE + base + 16);
1573	>	wp = (uint16 *)(ROMBaseHost + base + 16);
1574		*wp++ = htons(0x1a2e);                  // move.b       ($000f,a6),d5
1575		*wp++ = htons(0x000f);
1576		*wp++ = htons(M68K_EMUL_OP_NVRAM3);
#	Line 1583 | Line 1583 | static bool patch_68k(void)
1583		static const uint8 nvram5_dat[] = {0x0c, 0x80, 0x03, 0x00, 0x00, 0x00, 0x66, 0x0a, 0x70, 0x00, 0x21, 0xf8, 0x02, 0x0c, 0x01, 0xe4};
1584		if ((base = find_rom_data(0xa000, 0xd000, nvram5_dat, sizeof(nvram5_dat))) == 0) return false;
1585		D(bug("nvram5 %08lx\n", base));
1586	<	wp = (uint16 *)(ROM_BASE + base + 6);
1586	>	wp = (uint16 *)(ROMBaseHost + base + 6);
1587		*wp = htons(M68K_NOP);
1588
1589		static const uint8 nvram6_dat[] = {0x2f, 0x0a, 0x24, 0x48, 0x4f, 0xef, 0xff, 0xa0, 0x20, 0x0f};
1590		if ((base = find_rom_data(0x9000, 0xb000, nvram6_dat, sizeof(nvram6_dat))) == 0) return false;
1591		D(bug("nvram6 %08lx\n", base));
1592	<	wp = (uint16 *)(ROM_BASE + base);
1592	>	wp = (uint16 *)(ROMBaseHost + base);
1593		*wp++ = htons(0x7000);                  // moveq        #0,d0
1594		*wp++ = htons(0x2080);                  // move.l       d0,(a0)
1595		*wp++ = htons(0x4228);                  // clr.b        4(a0)
#	Line 1600 | Line 1600 | static bool patch_68k(void)
1600		base = find_rom_data(0x9000, 0xb000, nvram7_dat, sizeof(nvram7_dat));
1601		if (base) {
1602		D(bug("nvram7 %08lx\n", base));
1603	<	wp = (uint16 *)(ROM_BASE + base + 12);
1603	>	wp = (uint16 *)(ROMBaseHost + base + 12);
1604		*wp = htons(M68K_RTS);
1605		}
1606		} else {
1607		static const uint8 nvram2_dat[] = {0x4e, 0xd6, 0x06, 0x41, 0x13, 0x00};
1608		if ((base = find_rom_data(0x7000, 0xb000, nvram2_dat, sizeof(nvram2_dat))) == 0) return false;
1609		D(bug("nvram2 %08lx\n", base));
1610	<	wp = (uint16 *)(ROM_BASE + base + 2);
1610	>	wp = (uint16 *)(ROMBaseHost + base + 2);
1611		*wp++ = htons(M68K_EMUL_OP_XPRAM2);
1612		*wp = htons(0x4ed3);                    // jmp  (a3)
1613
1614		static const uint8 nvram3_dat[] = {0x4e, 0xd3, 0x06, 0x41, 0x13, 0x00};
1615		if ((base = find_rom_data(0x7000, 0xb000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1616		D(bug("nvram3 %08lx\n", base));
1617	<	wp = (uint16 *)(ROM_BASE + base + 2);
1617	>	wp = (uint16 *)(ROMBaseHost + base + 2);
1618		*wp++ = htons(M68K_EMUL_OP_XPRAM3);
1619		*wp = htons(0x4ed3);                    // jmp  (a3)
1620
1621		static const uint32 nvram4_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0x538d0, 0};
1622	<	wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1622	>	wp = (uint16 *)(ROMBaseHost + nvram4_loc[ROMType]);
1623		*wp++ = htons(0x202f);                  // move.l       4(sp),d0
1624		*wp++ = htons(0x0004);
1625		*wp++ = htons(M68K_EMUL_OP_NVRAM1);
#	Line 1633 | Line 1633 | static bool patch_68k(void)
1633		}
1634
1635		static const uint32 nvram5_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0x53a20, 0};
1636	<	wp = (uint16 *)(ROM_BASE + nvram5_loc[ROMType]);
1636	>	wp = (uint16 *)(ROMBaseHost + nvram5_loc[ROMType]);
1637		if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GAZELLE) {
1638		*wp++ = htons(0x202f);                  // move.l       4(sp),d0
1639		*wp++ = htons(0x0004);
#	Line 1656 | Line 1656 | static bool patch_68k(void)
1656		static const uint8 mem_top_dat[] = {0x2c, 0x6c, 0xff, 0xec, 0x2a, 0x4c, 0xdb, 0xec, 0xff, 0xf4};
1657		if ((base = find_rom_data(0x120, 0x180, mem_top_dat, sizeof(mem_top_dat))) == 0) return false;
1658		D(bug("mem_top %08lx\n", base));
1659	<	wp = (uint16 *)(ROM_BASE + base);
1659	>	wp = (uint16 *)(ROMBaseHost + base);
1660		*wp++ = htons(M68K_EMUL_OP_FIX_MEMTOP);
1661		*wp = htons(M68K_NOP);
1662
#	Line 1664 | Line 1664 | static bool patch_68k(void)
1664		static const uint8 scc_init_caller_dat[] = {0x21, 0xce, 0x01, 0x08, 0x22, 0x78, 0x0d, 0xd8};
1665		if ((base = find_rom_data(0x180, 0x1f0, scc_init_caller_dat, sizeof(scc_init_caller_dat))) == 0) return false;
1666		D(bug("scc_init_caller %08lx\n", base + 12));
1667	<	wp = (uint16 *)(ROM_BASE + base + 12);
1668	<	loc = ntohs(wp[1]) + ((uintptr)wp - ROM_BASE) + 2;
1667	>	wp = (uint16 *)(ROMBaseHost + base + 12);
1668	>	loc = ntohs(wp[1]) + ((uintptr)wp - (uintptr)ROMBaseHost) + 2;
1669		static const uint8 scc_init_dat[] = {0x20, 0x78, 0x01, 0xdc, 0x22, 0x78, 0x01, 0xd8};
1670		if ((base = find_rom_data(loc, loc + 0x80, scc_init_dat, sizeof(scc_init_dat))) == 0) return false;
1671		D(bug("scc_init %08lx\n", base));
1672	<	wp = (uint16 *)(ROM_BASE + base);
1672	>	wp = (uint16 *)(ROMBaseHost + base);
1673		*wp++ = htons(M68K_EMUL_OP_RESET);
1674		*wp = htons(M68K_RTS);
1675
#	Line 1677 | Line 1677 | static bool patch_68k(void)
1677		static const uint8 ext_cache_dat[] = {0x4e, 0x7b, 0x00, 0x02};
1678		if ((base = find_rom_data(0x1d0, 0x230, ext_cache_dat, sizeof(ext_cache_dat))) == 0) return false;
1679		D(bug("ext_cache %08lx\n", base));
1680	<	lp = (uint32 *)(ROM_BASE + base + 6);
1681	<	wp = (uint16 *)(ROM_BASE + ntohl(*lp) + base + 6);
1680	>	lp = (uint32 *)(ROMBaseHost + base + 6);
1681	>	wp = (uint16 *)(ROMBaseHost + ntohl(*lp) + base + 6);
1682		*wp = htons(M68K_RTS);
1683	<	lp = (uint32 *)(ROM_BASE + base + 12);
1684	<	wp = (uint16 *)(ROM_BASE + ntohl(*lp) + base + 12);
1683	>	lp = (uint32 *)(ROMBaseHost + base + 12);
1684	>	wp = (uint16 *)(ROMBaseHost + ntohl(*lp) + base + 12);
1685		*wp = htons(M68K_RTS);
1686
1687		// Fake CPU speed test (SetupTimeK)
1688		static const uint8 timek_dat[] = {0x0c, 0x38, 0x00, 0x04, 0x01, 0x2f, 0x6d, 0x3c};
1689		if ((base = find_rom_data(0x400, 0x500, timek_dat, sizeof(timek_dat))) == 0) return false;
1690		D(bug("timek %08lx\n", base));
1691	<	wp = (uint16 *)(ROM_BASE + base);
1691	>	wp = (uint16 *)(ROMBaseHost + base);
1692		*wp++ = htons(0x31fc);                  // move.w       #xxx,TimeDBRA
1693		*wp++ = htons(100);
1694		*wp++ = htons(0x0d00);
#	Line 1707 | Line 1707 | static bool patch_68k(void)
1707		static const uint8 jump_tab_dat[] = {0x41, 0xfa, 0x00, 0x0e, 0x21, 0xc8, 0x20, 0x10, 0x4e, 0x75};
1708		if ((base = find_rom_data(0x3000, 0x6000, jump_tab_dat, sizeof(jump_tab_dat))) == 0) return false;
1709		D(bug("jump_tab %08lx\n", base));
1710	<	lp = (uint32 *)(ROM_BASE + base + 16);
1710	>	lp = (uint32 *)(ROMBaseHost + base + 16);
1711		for (;;) {
1712	<	D(bug(" %08lx\n", (uint32)lp - ROM_BASE));
1712	>	D(bug(" %08lx\n", (uintptr)lp - (uintptr)ROMBaseHost));
1713		while ((ntohl(*lp) & 0xff000000) == 0xff000000) {
1714		*lp = htonl((ntohl(*lp) & (ROM_SIZE-1)) + ROM_BASE);
1715		lp++;
#	Line 1724 | Line 1724 | static bool patch_68k(void)
1724		static const uint8 sys_zone_dat[] = {0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x40, 0x00};
1725		if ((base = find_rom_data(0x600, 0x900, sys_zone_dat, sizeof(sys_zone_dat))) == 0) return false;
1726		D(bug("sys_zone %08lx\n", base));
1727	<	lp = (uint32 *)(ROM_BASE + base);
1727	>	lp = (uint32 *)(ROMBaseHost + base);
1728		*lp++ = htonl(RAMBase ? RAMBase : 0x3000);
1729		*lp = htonl(RAMBase ? RAMBase + 0x1800 : 0x4800);
1730
#	Line 1733 | Line 1733 | static bool patch_68k(void)
1733		static const uint8 boot_stack_dat[] = {0x08, 0x38, 0x00, 0x06, 0x24, 0x0b};
1734		if ((base = find_rom_data(0x580, 0x800, boot_stack_dat, sizeof(boot_stack_dat))) == 0) return false;
1735		D(bug("boot_stack %08lx\n", base));
1736	<	wp = (uint16 *)(ROM_BASE + base);
1736	>	wp = (uint16 *)(ROMBaseHost + base);
1737		*wp++ = htons(0x207c);                  // move.l       #RAMBase+0x3ffffe,a0
1738		*wp++ = htons((RAMBase + 0x3ffffe) >> 16);
1739		*wp++ = htons((RAMBase + 0x3ffffe) & 0xffff);
#	Line 1744 | Line 1744 | static bool patch_68k(void)
1744		static const uint8 page_size_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x10};
1745		if ((base = find_rom_data(0xb000, 0x12000, page_size_dat, sizeof(page_size_dat))) == 0) return false;
1746		D(bug("page_size %08lx\n", base));
1747	<	wp = (uint16 *)(ROM_BASE + base);
1747	>	wp = (uint16 *)(ROMBaseHost + base);
1748		*wp++ = htons(0x203c);                  // move.l       #$1000,d0
1749		*wp++ = htons(0);
1750		*wp++ = htons(0x1000);
#	Line 1755 | Line 1755 | static bool patch_68k(void)
1755		static const uint8 page_size2_dat[] = {0x26, 0x79, 0x5f, 0xff, 0xef, 0xd8, 0x25, 0x6b, 0x00, 0x10, 0x00, 0x1e};
1756		if ((base = find_rom_data(0x50000, 0x70000, page_size2_dat, sizeof(page_size2_dat))) == 0) return false;
1757		D(bug("page_size2 %08lx\n", base));
1758	<	wp = (uint16 *)(ROM_BASE + base);
1758	>	wp = (uint16 *)(ROMBaseHost + base);
1759		*wp++ = htons(0x257c);                  // move.l       #$1000,$1e(a2)
1760		*wp++ = htons(0);
1761		*wp++ = htons(0x1000);
#	Line 1776 | Line 1776 | static bool patch_68k(void)
1776		*wp++ = htons(M68K_NOP);
1777		*wp = htons(M68K_NOP);
1778		if (ROMType == ROMTYPE_NEWWORLD)
1779	<	wp = (uint16 *)(ROM_BASE + base + 0x4a);
1779	>	wp = (uint16 *)(ROMBaseHost + base + 0x4a);
1780		else
1781	<	wp = (uint16 *)(ROM_BASE + base + 0x28);
1781	>	wp = (uint16 *)(ROMBaseHost + base + 0x28);
1782		*wp++ = htons(M68K_NOP);
1783		*wp = htons(M68K_NOP);
1784
1785		// Gestalt CPU/bus clock speed (InitGestalt, via 0x25c)
1786		if (ROMType == ROMTYPE_ZANZIBAR) {
1787	<	wp = (uint16 *)(ROM_BASE + 0x5d87a);
1787	>	wp = (uint16 *)(ROMBaseHost + 0x5d87a);
1788		*wp++ = htons(0x203c);                  // move.l       #Hz,d0
1789		*wp++ = htons(BusClockSpeed >> 16);
1790		*wp++ = htons(BusClockSpeed & 0xffff);
1791		*wp++ = htons(M68K_NOP);
1792		*wp = htons(M68K_NOP);
1793	<	wp = (uint16 *)(ROM_BASE + 0x5d888);
1793	>	wp = (uint16 *)(ROMBaseHost + 0x5d888);
1794		*wp++ = htons(0x203c);                  // move.l       #Hz,d0
1795		*wp++ = htons(CPUClockSpeed >> 16);
1796		*wp++ = htons(CPUClockSpeed & 0xffff);
#	Line 1803 | Line 1803 | static bool patch_68k(void)
1803		static const uint8 gc_mask_dat[] = {0x83, 0xa8, 0x00, 0x24, 0x4e, 0x71};
1804		if ((base = find_rom_data(0x13000, 0x20000, gc_mask_dat, sizeof(gc_mask_dat))) == 0) return false;
1805		D(bug("gc_mask %08lx\n", base));
1806	<	wp = (uint16 *)(ROM_BASE + base);
1806	>	wp = (uint16 *)(ROMBaseHost + base);
1807		*wp++ = htons(M68K_NOP);
1808		*wp = htons(M68K_NOP);
1809	<	wp = (uint16 *)(ROM_BASE + base + 0x40);
1809	>	wp = (uint16 *)(ROMBaseHost + base + 0x40);
1810		*wp++ = htons(M68K_NOP);
1811		*wp = htons(M68K_NOP);
1812	<	wp = (uint16 *)(ROM_BASE + base + 0x78);
1812	>	wp = (uint16 *)(ROMBaseHost + base + 0x78);
1813		*wp++ = htons(M68K_NOP);
1814		*wp = htons(M68K_NOP);
1815	<	wp = (uint16 *)(ROM_BASE + base + 0x96);
1815	>	wp = (uint16 *)(ROMBaseHost + base + 0x96);
1816		*wp++ = htons(M68K_NOP);
1817		*wp = htons(M68K_NOP);
1818
1819		static const uint8 gc_mask2_dat[] = {0x02, 0xa8, 0x00, 0x00, 0x00, 0x80, 0x00, 0x24};
1820		if ((base = find_rom_data(0x13000, 0x20000, gc_mask2_dat, sizeof(gc_mask2_dat))) == 0) return false;
1821		D(bug("gc_mask2 %08lx\n", base));
1822	<	wp = (uint16 *)(ROM_BASE + base);
1822	>	wp = (uint16 *)(ROMBaseHost + base);
1823		if (ROMType == ROMTYPE_GOSSAMER) {
1824		*wp++ = htons(M68K_NOP);
1825		*wp++ = htons(M68K_NOP);
#	Line 1848 | Line 1848 | static bool patch_68k(void)
1848		static const uint8 cuda_init_dat[] = {0x08, 0xa9, 0x00, 0x04, 0x16, 0x00, 0x4e, 0x71, 0x13, 0x7c, 0x00, 0x84, 0x1c, 0x00, 0x4e, 0x71};
1849		if ((base = find_rom_data(0xa000, 0x12000, cuda_init_dat, sizeof(cuda_init_dat))) == 0) return false;
1850		D(bug("cuda_init %08lx\n", base));
1851	<	wp = (uint16 *)(ROM_BASE + base);
1851	>	wp = (uint16 *)(ROMBaseHost + base);
1852		*wp++ = htons(M68K_NOP);
1853		*wp++ = htons(M68K_NOP);
1854		*wp++ = htons(M68K_NOP);
#	Line 1861 | Line 1861 | static bool patch_68k(void)
1861		static const uint8 cpu_speed_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x04, 0x4c, 0x7c};
1862		if ((base = find_rom_data(0x6000, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) == 0) return false;
1863		D(bug("cpu_speed %08lx\n", base));
1864	<	wp = (uint16 *)(ROM_BASE + base);
1864	>	wp = (uint16 *)(ROMBaseHost + base);
1865		*wp++ = htons(0x203c);                  // move.l       #(MHz<<16)|MHz,d0
1866		*wp++ = htons(CPUClockSpeed / 1000000);
1867		*wp++ = htons(CPUClockSpeed / 1000000);
1868		*wp = htons(M68K_RTS);
1869		if ((base = find_rom_data(base, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) != 0) {
1870		D(bug("cpu_speed2 %08lx\n", base));
1871	<	wp = (uint16 *)(ROM_BASE + base);
1871	>	wp = (uint16 *)(ROMBaseHost + base);
1872		*wp++ = htons(0x203c);                  // move.l       #(MHz<<16)|MHz,d0
1873		*wp++ = htons(CPUClockSpeed / 1000000);
1874		*wp++ = htons(CPUClockSpeed / 1000000);
#	Line 1879 | Line 1879 | static bool patch_68k(void)
1879		static const uint8 time_via_dat[] = {0x40, 0xe7, 0x00, 0x7c, 0x07, 0x00, 0x28, 0x78, 0x01, 0xd4, 0x43, 0xec, 0x10, 0x00};
1880		if ((base = find_rom_data(0x30000, 0x40000, time_via_dat, sizeof(time_via_dat))) == 0) return false;
1881		D(bug("time_via %08lx\n", base));
1882	<	wp = (uint16 *)(ROM_BASE + base);
1882	>	wp = (uint16 *)(ROMBaseHost + base);
1883		*wp++ = htons(0x4cdf);                  // movem.l      (sp)+,d0-d5/a0-a4
1884		*wp++ = htons(0x1f3f);
1885		*wp = htons(M68K_RTS);
#	Line 1889 | Line 1889 | static bool patch_68k(void)
1889		static const uint8 open_firmware_dat[] = {0x2f, 0x79, 0xff, 0x80, 0x00, 0x00, 0x00, 0xfc};
1890		if ((base = find_rom_data(0x48000, 0x58000, open_firmware_dat, sizeof(open_firmware_dat))) == 0) return false;
1891		D(bug("open_firmware %08lx\n", base));
1892	<	wp = (uint16 *)(ROM_BASE + base);
1892	>	wp = (uint16 *)(ROMBaseHost + base);
1893		*wp++ = htons(0x2f7c);                  // move.l               #deadbeef,0xfc(a7)
1894		*wp++ = htons(0xdead);
1895		*wp++ = htons(0xbeef);
1896		*wp = htons(0x00fc);
1897	<	wp = (uint16 *)(ROM_BASE + base + 0x1a);
1897	>	wp = (uint16 *)(ROMBaseHost + base + 0x1a);
1898		*wp++ = htons(M68K_NOP);                // (FE03 opcode, tries to jump to 0xdeadbeef)
1899		*wp = htons(M68K_NOP);
1900
#	Line 1902 | Line 1902 | static bool patch_68k(void)
1902		static const uint8 ext_cache2_dat[] = {0x4f, 0xef, 0xff, 0xec, 0x20, 0x4f, 0x10, 0xbc, 0x00, 0x01, 0x11, 0x7c, 0x00, 0x1b};
1903		if ((base = find_rom_data(0x13000, 0x20000, ext_cache2_dat, sizeof(ext_cache2_dat))) == 0) return false;
1904		D(bug("ext_cache2 %08lx\n", base));
1905	<	wp = (uint16 *)(ROM_BASE + base);
1905	>	wp = (uint16 *)(ROMBaseHost + base);
1906		*wp = htons(M68K_RTS);
1907
1908		// Don't install Time Manager task for 60Hz interrupt (Enable60HzInts, via 0x2b8)
#	Line 1910 | Line 1910 | static bool patch_68k(void)
1910		static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9};
1911		if ((base = find_rom_data(0x2a0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1912		D(bug("tm_task %08lx\n", base));
1913	<	wp = (uint16 *)(ROM_BASE + base + 28);
1913	>	wp = (uint16 *)(ROMBaseHost + base + 28);
1914		*wp++ = htons(M68K_NOP);
1915		*wp++ = htons(M68K_NOP);
1916		*wp++ = htons(M68K_NOP);
#	Line 1921 | Line 1921 | static bool patch_68k(void)
1921		static const uint8 tm_task_dat[] = {0x20, 0x3c, 0x73, 0x79, 0x73, 0x61};
1922		if ((base = find_rom_data(0x280, 0x300, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1923		D(bug("tm_task %08lx\n", base));
1924	<	wp = (uint16 *)(ROM_BASE + base - 6);
1924	>	wp = (uint16 *)(ROMBaseHost + base - 6);
1925		*wp++ = htons(M68K_NOP);
1926		*wp++ = htons(M68K_NOP);
1927		*wp = htons(M68K_NOP);
#	Line 1938 | Line 1938 | static bool patch_68k(void)
1938		if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_pvr_dat, sizeof(dsl_pvr_dat))) == 0) return false;
1939		}
1940		D(bug("dsl_pvr %08lx\n", base));
1941	<	lp = (uint32 *)(ROM_BASE + base + 12);
1941	>	lp = (uint32 *)(ROMBaseHost + base + 12);
1942		*lp = htonl(0x3c800000 | (PVR >> 16));  // lis  r4,PVR
1943
1944		// Don't read bus clock from 0x5fffef88 in DriverServicesLib (via 0x316)
#	Line 1946 | Line 1946 | static bool patch_68k(void)
1946		static const uint8 dsl_bus_dat[] = {0x81, 0x07, 0x00, 0x00, 0x39, 0x20, 0x42, 0x40, 0x81, 0x62, 0xff, 0x20};
1947		if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_bus_dat, sizeof(dsl_bus_dat))) == 0) return false;
1948		D(bug("dsl_bus %08lx\n", base));
1949	<	lp = (uint32 *)(ROM_BASE + base);
1949	>	lp = (uint32 *)(ROMBaseHost + base);
1950		*lp = htonl(0x81000000 + XLM_BUS_CLOCK);        // lwz  r8,(bus clock speed)
1951		} else {
1952		static const uint8 dsl_bus_dat[] = {0x80, 0x83, 0xef, 0xe8, 0x80, 0x62, 0x00, 0x10, 0x7c, 0x04, 0x03, 0x96};
1953		if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_bus_dat, sizeof(dsl_bus_dat))) == 0) return false;
1954		D(bug("dsl_bus %08lx\n", base));
1955	<	lp = (uint32 *)(ROM_BASE + base);
1955	>	lp = (uint32 *)(ROMBaseHost + base);
1956		*lp = htonl(0x80800000 + XLM_BUS_CLOCK);        // lwz  r4,(bus clock speed)
1957		}
1958		}
1959
1960		// Don't open InterruptTreeTNT in MotherBoardHAL init in DriverServicesLib init
1961		if (ROMType == ROMTYPE_ZANZIBAR) {
1962	<	lp = (uint32 *)(ROM_BASE + find_rom_resource(FOURCC('n','l','i','b'), -16408) + 0x16c);
1962	>	lp = (uint32 *)(ROMBaseHost + find_rom_resource(FOURCC('n','l','i','b'), -16408) + 0x16c);
1963		*lp = htonl(0x38600000);                // li   r3,0
1964		}
1965
#	Line 1969 | Line 1969 | static bool patch_68k(void)
1969		static const uint8 hpchk_dat[] = {0x80, 0x80, 0x03, 0x16, 0x94, 0x21, 0xff, 0xb0, 0x83, 0xc4, 0x00, 0x04};
1970		if ((base = find_rom_data(hpchk_offset, hpchk_offset + 0x3000, hpchk_dat, sizeof(hpchk_dat))) == 0) return false;
1971		D(bug("hpchk %08lx\n", base));
1972	<	lp = (uint32 *)(ROM_BASE + base);
1972	>	lp = (uint32 *)(ROMBaseHost + base);
1973		*lp = htonl(0x80800000 + XLM_ZERO_PAGE);                // lwz  r4,(zero page)
1974		}
1975
#	Line 1977 | Line 1977 | static bool patch_68k(void)
1977		static const uint8 name_reg_dat[] = {0x70, 0xff, 0xab, 0xeb};
1978		if ((base = find_rom_data(0x300, 0x380, name_reg_dat, sizeof(name_reg_dat))) == 0) return false;
1979		D(bug("name_reg %08lx\n", base));
1980	<	wp = (uint16 *)(ROM_BASE + base);
1980	>	wp = (uint16 *)(ROMBaseHost + base);
1981		*wp = htons(M68K_EMUL_OP_NAME_REGISTRY);
1982
1983		#if DISABLE_SCSI
#	Line 1989 | Line 1989 | static bool patch_68k(void)
1989		if ((base = find_rom_data(0x1c000, 0x28000, scsi_mgr_b_dat, sizeof(scsi_mgr_b_dat))) == 0) return false;
1990		}
1991		D(bug("scsi_mgr %08lx\n", base));
1992	<	wp = (uint16 *)(ROM_BASE + base);
1992	>	wp = (uint16 *)(ROMBaseHost + base);
1993		*wp++ = htons(0x21fc);                  // move.l       #xxx,0x624      (SCSIAtomic)
1994		*wp++ = htons((ROM_BASE + base + 18) >> 16);
1995		*wp++ = htons((ROM_BASE + base + 18) & 0xffff);
#	Line 2003 | Line 2003 | static bool patch_68k(void)
2003		*wp++ = htons(M68K_RTS);
2004		*wp++ = htons(M68K_EMUL_OP_SCSI_DISPATCH);
2005		*wp = htons(0x4ed0);                    // jmp          (a0)
2006	<	wp = (uint16 *)(ROM_BASE + base + 0x20);
2006	>	wp = (uint16 *)(ROMBaseHost + base + 0x20);
2007		*wp++ = htons(0x7000);                  // moveq        #0,d0
2008		*wp = htons(M68K_RTS);
2009		#endif
#	Line 2015 | Line 2015 | static bool patch_68k(void)
2015		static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
2016		if ((base = find_rom_data(0x1f500, 0x1f600, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
2017		D(bug("scsi_var %08lx\n", base));
2018	<	wp = (uint16 *)(ROM_BASE + base + 12);
2018	>	wp = (uint16 *)(ROMBaseHost + base + 12);
2019		*wp = htons(0x6000);    // bra
2020		}
2021
2022		static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x58, 0x48, 0xe7, 0x1f, 0x38};
2023		if ((base = find_rom_data(0x1f700, 0x1f800, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
2024		D(bug("scsi_var2 %08lx\n", base));
2025	<	wp = (uint16 *)(ROM_BASE + base);
2025	>	wp = (uint16 *)(ROMBaseHost + base);
2026		*wp++ = htons(0x7000);  // moveq #0,d0
2027		*wp = htons(M68K_RTS);
2028		}
#	Line 2031 | Line 2031 | static bool patch_68k(void)
2031		static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
2032		if ((base = find_rom_data(0x1d700, 0x1d800, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
2033		D(bug("scsi_var %08lx\n", base));
2034	<	wp = (uint16 *)(ROM_BASE + base + 12);
2034	>	wp = (uint16 *)(ROMBaseHost + base + 12);
2035		*wp = htons(0x6000);    // bra
2036		}
2037
2038		static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x5a, 0x48, 0xe7, 0x1f, 0x38};
2039		if ((base = find_rom_data(0x1d900, 0x1da00, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
2040		D(bug("scsi_var2 %08lx\n", base));
2041	<	wp = (uint16 *)(ROM_BASE + base);
2041	>	wp = (uint16 *)(ROMBaseHost + base);
2042		*wp++ = htons(0x7000);  // moveq #0,d0
2043		*wp = htons(M68K_RTS);
2044		}
#	Line 2049 | Line 2049 | static bool patch_68k(void)
2049		static const uint8 adb_init_dat[] = {0x08, 0x2b, 0x00, 0x05, 0x01, 0x5d, 0x66, 0xf8};
2050		if ((base = find_rom_data(0x31000, 0x3d000, adb_init_dat, sizeof(adb_init_dat))) == 0) return false;
2051		D(bug("adb_init %08lx\n", base));
2052	<	wp = (uint16 *)(ROM_BASE + base + 6);
2052	>	wp = (uint16 *)(ROMBaseHost + base + 6);
2053		*wp = htons(M68K_NOP);
2054
2055		// Modify check in InitResources() so that addresses >0x80000000 work
2056		static const uint8 init_res_dat[] = {0x4a, 0xb8, 0x0a, 0x50, 0x6e, 0x20};
2057		if ((base = find_rom_data(0x78000, 0x8c000, init_res_dat, sizeof(init_res_dat))) == 0) return false;
2058		D(bug("init_res %08lx\n", base));
2059	<	bp = (uint8 *)(ROM_BASE + base + 4);
2059	>	bp = (uint8 *)(ROMBaseHost + base + 4);
2060		*bp = 0x66;
2061
2062		// Modify vCheckLoad() so that we can patch resources (68k Resource Manager)
2063		static const uint8 check_load_dat[] = {0x20, 0x78, 0x07, 0xf0, 0x4e, 0xd0};
2064		if ((base = find_rom_data(0x78000, 0x8c000, check_load_dat, sizeof(check_load_dat))) == 0) return false;
2065		D(bug("check_load %08lx\n", base));
2066	<	wp = (uint16 *)(ROM_BASE + base);
2066	>	wp = (uint16 *)(ROMBaseHost + base);
2067		*wp++ = htons(M68K_JMP);
2068		*wp++ = htons((ROM_BASE + CHECK_LOAD_PATCH_SPACE) >> 16);
2069		*wp = htons((ROM_BASE + CHECK_LOAD_PATCH_SPACE) & 0xffff);
2070	<	wp = (uint16 *)(ROM_BASE + CHECK_LOAD_PATCH_SPACE);
2070	>	wp = (uint16 *)(ROMBaseHost + CHECK_LOAD_PATCH_SPACE);
2071		*wp++ = htons(0x2f03);                  // move.l       d3,-(a7)
2072		*wp++ = htons(0x2078);                  // move.l       $07f0,a0
2073		*wp++ = htons(0x07f0);
#	Line 2083 | Line 2083 | static bool patch_68k(void)
2083		sony_offset = find_rom_resource(FOURCC('n','d','r','v'), -20196);               // NewWorld 1.6 has "PCFloppy" ndrv
2084		if (sony_offset == 0)
2085		return false;
2086	<	lp = (uint32 *)(ROM_BASE + rsrc_ptr + 8);
2086	>	lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 8);
2087		*lp = htonl(FOURCC('D','R','V','R'));
2088	<	wp = (uint16 *)(ROM_BASE + rsrc_ptr + 12);
2088	>	wp = (uint16 *)(ROMBaseHost + rsrc_ptr + 12);
2089		*wp = htons(4);
2090		}
2091		D(bug("sony_offset %08lx\n", sony_offset));
2092	<	memcpy((void *)(ROM_BASE + sony_offset), sony_driver, sizeof(sony_driver));
2092	>	memcpy((void *)(ROMBaseHost + sony_offset), sony_driver, sizeof(sony_driver));
2093
2094		// Install .Disk and .AppleCD drivers
2095	<	memcpy((void *)(ROM_BASE + sony_offset + 0x100), disk_driver, sizeof(disk_driver));
2096	<	memcpy((void *)(ROM_BASE + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2095	>	memcpy((void *)(ROMBaseHost + sony_offset + 0x100), disk_driver, sizeof(disk_driver));
2096	>	memcpy((void *)(ROMBaseHost + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2097
2098		// Install serial drivers
2099		gen_ain_driver( ROM_BASE + sony_offset + 0x300);
#	Line 2103 | Line 2103 | static bool patch_68k(void)
2103
2104		// Copy icons to ROM
2105		SonyDiskIconAddr = ROM_BASE + sony_offset + 0x800;
2106	<	memcpy((void *)(ROM_BASE + sony_offset + 0x800), SonyDiskIcon, sizeof(SonyDiskIcon));
2106	>	memcpy(ROMBaseHost + sony_offset + 0x800, SonyDiskIcon, sizeof(SonyDiskIcon));
2107		SonyDriveIconAddr = ROM_BASE + sony_offset + 0xa00;
2108	<	memcpy((void *)(ROM_BASE + sony_offset + 0xa00), SonyDriveIcon, sizeof(SonyDriveIcon));
2108	>	memcpy(ROMBaseHost + sony_offset + 0xa00, SonyDriveIcon, sizeof(SonyDriveIcon));
2109		DiskIconAddr = ROM_BASE + sony_offset + 0xc00;
2110	<	memcpy((void *)(ROM_BASE + sony_offset + 0xc00), DiskIcon, sizeof(DiskIcon));
2110	>	memcpy(ROMBaseHost + sony_offset + 0xc00, DiskIcon, sizeof(DiskIcon));
2111		CDROMIconAddr = ROM_BASE + sony_offset + 0xe00;
2112	<	memcpy((void *)(ROM_BASE + sony_offset + 0xe00), CDROMIcon, sizeof(CDROMIcon));
2112	>	memcpy(ROMBaseHost + sony_offset + 0xe00, CDROMIcon, sizeof(CDROMIcon));
2113
2114		// Patch driver install routine
2115		static const uint8 drvr_install_dat[] = {0xa7, 0x1e, 0x21, 0xc8, 0x01, 0x1c, 0x4e, 0x75};
2116		if ((base = find_rom_data(0xb00, 0xd00, drvr_install_dat, sizeof(drvr_install_dat))) == 0) return false;
2117		D(bug("drvr_install %08lx\n", base));
2118	<	wp = (uint16 *)(ROM_BASE + base + 8);
2118	>	wp = (uint16 *)(ROMBaseHost + base + 8);
2119		*wp++ = htons(M68K_EMUL_OP_INSTALL_DRIVERS);
2120		*wp = htons(M68K_RTS);
2121
2122		// Don't install serial drivers from ROM
2123		if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
2124	<	wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('S','E','R','D'), 0));
2124	>	wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('S','E','R','D'), 0));
2125		*wp = htons(M68K_RTS);
2126		} else {
2127	<	wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0xc4);
2127	>	wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0xc4);
2128		*wp++ = htons(M68K_NOP);
2129		*wp++ = htons(M68K_NOP);
2130		*wp++ = htons(M68K_NOP);
2131		*wp++ = htons(M68K_NOP);
2132		*wp = htons(0x7000);                    // moveq        #0,d0
2133	<	wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0x8ee);
2133	>	wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0x8ee);
2134		*wp = htons(M68K_NOP);
2135		}
2136		uint32 nsrd_offset = find_rom_resource(FOURCC('n','s','r','d'), 1);
2137		if (nsrd_offset) {
2138	<	lp = (uint32 *)(ROM_BASE + rsrc_ptr + 8);
2138	>	lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 8);
2139		*lp = htonl(FOURCC('x','s','r','d'));
2140		}
2141
2142		// Replace ADBOp()
2143	<	memcpy((void *)(ROM_BASE + find_rom_trap(0xa07c)), adbop_patch, sizeof(adbop_patch));
2143	>	memcpy(ROMBaseHost + find_rom_trap(0xa07c), adbop_patch, sizeof(adbop_patch));
2144
2145		// Replace Time Manager
2146	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa058));
2146	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa058));
2147		*wp++ = htons(M68K_EMUL_OP_INSTIME);
2148		*wp = htons(M68K_RTS);
2149	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa059));
2149	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa059));
2150		*wp++ = htons(0x40e7);          // move sr,-(sp)
2151		*wp++ = htons(0x007c);          // ori  #$0700,sr
2152		*wp++ = htons(0x0700);
2153		*wp++ = htons(M68K_EMUL_OP_RMVTIME);
2154		*wp++ = htons(0x46df);          // move (sp)+,sr
2155		*wp = htons(M68K_RTS);
2156	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa05a));
2156	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa05a));
2157		*wp++ = htons(0x40e7);          // move sr,-(sp)
2158		*wp++ = htons(0x007c);          // ori  #$0700,sr
2159		*wp++ = htons(0x0700);
2160		*wp++ = htons(M68K_EMUL_OP_PRIMETIME);
2161		*wp++ = htons(0x46df);          // move (sp)+,sr
2162		*wp = htons(M68K_RTS);
2163	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa093));
2163	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa093));
2164		*wp++ = htons(M68K_EMUL_OP_MICROSECONDS);
2165		*wp = htons(M68K_RTS);
2166
#	Line 2168 | Line 2168 | static bool patch_68k(void)
2168		static const uint8 egret_dat[] = {0x2f, 0x30, 0x81, 0xe2, 0x20, 0x10, 0x00, 0x18};
2169		if ((base = find_rom_data(0xa000, 0x10000, egret_dat, sizeof(egret_dat))) == 0) return false;
2170		D(bug("egret %08lx\n", base));
2171	<	wp = (uint16 *)(ROM_BASE + base);
2171	>	wp = (uint16 *)(ROMBaseHost + base);
2172		*wp++ = htons(0x7000);
2173		*wp = htons(M68K_RTS);
2174
#	Line 2176 | Line 2176 | static bool patch_68k(void)
2176		static const uint8 shutdown_dat[] = {0x40, 0xe7, 0x00, 0x7c, 0x07, 0x00, 0x48, 0xe7, 0x3f, 0x00, 0x2c, 0x00, 0x2e, 0x01};
2177		if ((base = find_rom_data(0x30000, 0x40000, shutdown_dat, sizeof(shutdown_dat))) == 0) return false;
2178		D(bug("shutdown %08lx\n", base));
2179	<	wp = (uint16 *)(ROM_BASE + base);
2179	>	wp = (uint16 *)(ROMBaseHost + base);
2180		if (ROMType == ROMTYPE_ZANZIBAR)
2181		*wp = htons(M68K_RTS);
2182		else if (ntohs(wp[-4]) == 0x61ff)
#	Line 2185 | Line 2185 | static bool patch_68k(void)
2185		wp[-2] = htons(0x6000); // bra
2186
2187		// Patch PowerOff()
2188	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa05b));      // PowerOff()
2188	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa05b));   // PowerOff()
2189		*wp = htons(M68K_EMUL_RETURN);
2190
2191		// Patch VIA interrupt handler
#	Line 2193 | Line 2193 | static bool patch_68k(void)
2193		if ((base = find_rom_data(0x13000, 0x1c000, via_int_dat, sizeof(via_int_dat))) == 0) return false;
2194		D(bug("via_int %08lx\n", base));
2195		uint32 level1_int = ROM_BASE + base;
2196	<	wp = (uint16 *)level1_int;                      // Level 1 handler
2196	>	wp = (uint16 *)(ROMBaseHost + base);    // Level 1 handler
2197		*wp++ = htons(0x7002);                  // moveq        #2,d0 (60Hz interrupt)
2198		*wp++ = htons(M68K_NOP);
2199		*wp++ = htons(M68K_NOP);
#	Line 2203 | Line 2203 | static bool patch_68k(void)
2203		static const uint8 via_int2_dat[] = {0x13, 0x7c, 0x00, 0x02, 0x1a, 0x00, 0x4e, 0x71, 0x52, 0xb8, 0x01, 0x6a};
2204		if ((base = find_rom_data(0x10000, 0x18000, via_int2_dat, sizeof(via_int2_dat))) == 0) return false;
2205		D(bug("via_int2 %08lx\n", base));
2206	<	wp = (uint16 *)(ROM_BASE + base);       // 60Hz handler
2206	>	wp = (uint16 *)(ROMBaseHost + base);    // 60Hz handler
2207		*wp++ = htons(M68K_EMUL_OP_IRQ);
2208		*wp++ = htons(0x4a80);                  // tst.l        d0
2209		*wp++ = htons(0x6700);                  // beq          xxx
#	Line 2213 | Line 2213 | static bool patch_68k(void)
2213		static const uint8 via_int3_dat[] = {0x48, 0xe7, 0xf0, 0xf0, 0x76, 0x01, 0x60, 0x26};
2214		if ((base = find_rom_data(0x15000, 0x19000, via_int3_dat, sizeof(via_int3_dat))) == 0) return false;
2215		D(bug("via_int3 %08lx\n", base));
2216	<	wp = (uint16 *)(ROM_BASE + base);       // CHRP level 1 handler
2216	>	wp = (uint16 *)(ROMBaseHost + base);    // CHRP level 1 handler
2217		*wp++ = htons(M68K_JMP);
2218		*wp++ = htons((level1_int - 12) >> 16);
2219		*wp = htons((level1_int - 12) & 0xffff);
#	Line 2221 | Line 2221 | static bool patch_68k(void)
2221
2222		// Patch PutScrap() for clipboard exchange with host OS
2223		uint32 put_scrap = find_rom_trap(0xa9fe);       // PutScrap()
2224	<	wp = (uint16 *)(ROM_BASE + PUT_SCRAP_PATCH_SPACE);
2224	>	wp = (uint16 *)(ROMBaseHost + PUT_SCRAP_PATCH_SPACE);
2225		*wp++ = htons(M68K_EMUL_OP_PUT_SCRAP);
2226		*wp++ = htons(M68K_JMP);
2227		*wp++ = htons((ROM_BASE + put_scrap) >> 16);
2228		*wp++ = htons((ROM_BASE + put_scrap) & 0xffff);
2229	<	lp = (uint32 *)(ROM_BASE + 0x22);
2230	<	lp = (uint32 *)(ROM_BASE + ntohl(*lp));
2229	>	lp = (uint32 *)(ROMBaseHost + 0x22);
2230	>	lp = (uint32 *)(ROMBaseHost + ntohl(*lp));
2231		lp[0xa9fe & 0x3ff] = htonl(PUT_SCRAP_PATCH_SPACE);
2232
2233		// Patch GetScrap() for clipboard exchange with host OS
2234		uint32 get_scrap = find_rom_trap(0xa9fd);       // GetScrap()
2235	<	wp = (uint16 *)(ROM_BASE + GET_SCRAP_PATCH_SPACE);
2235	>	wp = (uint16 *)(ROMBaseHost + GET_SCRAP_PATCH_SPACE);
2236		*wp++ = htons(M68K_EMUL_OP_GET_SCRAP);
2237		*wp++ = htons(M68K_JMP);
2238		*wp++ = htons((ROM_BASE + get_scrap) >> 16);
2239		*wp++ = htons((ROM_BASE + get_scrap) & 0xffff);
2240	<	lp = (uint32 *)(ROM_BASE + 0x22);
2241	<	lp = (uint32 *)(ROM_BASE + ntohl(*lp));
2240	>	lp = (uint32 *)(ROMBaseHost + 0x22);
2241	>	lp = (uint32 *)(ROMBaseHost + ntohl(*lp));
2242		lp[0xa9fd & 0x3ff] = htonl(GET_SCRAP_PATCH_SPACE);
2243
2244		// Patch SynchIdleTime()
2245		if (PrefsFindBool("idlewait")) {
2246	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xabf7) + 4);  // SynchIdleTime()
2247	<	D(bug("SynchIdleTime at %08lx\n", wp));
2246	>	base = find_rom_trap(0xabf7) + 4;                                               // SynchIdleTime()
2247	>	wp = (uint16 *)(ROMBaseHost + base);
2248	>	D(bug("SynchIdleTime at %08lx\n", base));
2249		if (ntohs(*wp) == 0x2078) {                                                             // movea.l      ExpandMem,a0
2250		*wp++ = htons(M68K_EMUL_OP_IDLE_TIME);
2251		*wp = htons(M68K_NOP);
#	Line 2278 | Line 2279 | static bool patch_68k(void)
2279		if ((thing = find_rom_resource(sifter_list[i].type, sifter_list[i].id)) != 0) {
2280		D(bug(" patching type %08x, id %d\n", sifter_list[i].type, sifter_list[i].id));
2281		// Install 68k glue code
2282	<	uint16 *wp = (uint16 *)(ROM_BASE + thing);
2282	>	uint16 *wp = (uint16 *)(ROMBaseHost + thing);
2283		*wp++ = htons(0x4e56); *wp++ = htons(0x0000);   // link a6,#0
2284		*wp++ = htons(0x48e7); *wp++ = htons(0x8018);   // movem.l d0/a3-a4,-(a7)
2285		*wp++ = htons(0x266e); *wp++ = htons(0x000c);   // movea.l $c(a6),a3

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