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root/cebix/SheepShaver/src/rom_patches.cpp
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Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.8 by gbeauche, 2003-09-28T21:27:33Z vs.
Revision 1.38 by gbeauche, 2004-12-16T22:59:38Z

# Line 1 | Line 1
1   /*
2   *  rom_patches.cpp - ROM patches
3   *
4 < *  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 40 | Line 40
40   #include "audio_defs.h"
41   #include "serial.h"
42   #include "macos_util.h"
43 + #include "thunks.h"
44  
45   #define DEBUG 0
46   #include "debug.h"
# Line 58 | Line 59
59  
60  
61   // Other ROM addresses
62 < const uint32 CHECK_LOAD_PATCH_SPACE = 0x2f7f00;
63 < const uint32 PUT_SCRAP_PATCH_SPACE = 0x2f7f80;
64 < const uint32 GET_SCRAP_PATCH_SPACE = 0x2f7fc0;
65 < const uint32 ADDR_MAP_PATCH_SPACE = 0x2f8000;
62 > const uint32 CHECK_LOAD_PATCH_SPACE = 0x2fcf00;
63 > const uint32 PUT_SCRAP_PATCH_SPACE = 0x2fcf80;
64 > const uint32 GET_SCRAP_PATCH_SPACE = 0x2fcfc0;
65 > const uint32 ADDR_MAP_PATCH_SPACE = 0x2fd100;
66  
67   // Global variables
68   int ROMType;                            // ROM type
# Line 131 | Line 132 | void decode_parcels(const uint8 *src, ui
132                            (parcel_type >> 8) & 0xff, parcel_type & 0xff, &parcel_data[6]));
133                  if (parcel_type == FOURCC('r','o','m',' ')) {
134                          uint32 lzss_offset  = ntohl(parcel_data[2]);
135 <                        uint32 lzss_size = ((uint32)src + parcel_offset) - ((uint32)parcel_data + lzss_offset);
135 >                        uint32 lzss_size = ((uintptr)src + next_offset) - ((uintptr)parcel_data + lzss_offset);
136                          decode_lzss((uint8 *)parcel_data + lzss_offset, dest, lzss_size);
137                  }
138                  parcel_offset = next_offset;
# Line 147 | Line 148 | bool DecodeROM(uint8 *data, uint32 size)
148   {
149          if (size == ROM_SIZE) {
150                  // Plain ROM image
151 <                memcpy((void *)ROM_BASE, data, ROM_SIZE);
151 >                memcpy(ROMBaseHost, data, ROM_SIZE);
152                  return true;
153          }
154          else if (strncmp((char *)data, "<CHRP-BOOT>", 11) == 0) {
# Line 185 | Line 186 | bool DecodeROM(uint8 *data, uint32 size)
186                  if (rom_signature == FOURCC('p','r','c','l')) {
187                          D(bug("Offset of parcels data: %08x\n", image_offset));
188                          D(bug("Size of parcels data: %08x\n", image_size));
189 <                        decode_parcels(data + image_offset, (uint8 *)ROM_BASE, image_size);
189 >                        decode_parcels(data + image_offset, ROMBaseHost, image_size);
190                  }
191                  else {
192                          D(bug("Offset of compressed data: %08x\n", image_offset));
193                          D(bug("Size of compressed data: %08x\n", image_size));
194 <                        decode_lzss(data + image_offset, (uint8 *)ROM_BASE, image_size);
194 >                        decode_lzss(data + image_offset, ROMBaseHost, image_size);
195                  }
196                  return true;
197          }
# Line 206 | Line 207 | static uint32 find_rom_data(uint32 start
207   {
208          uint32 ofs = start;
209          while (ofs < end) {
210 <                if (!memcmp((void *)(ROM_BASE + ofs), data, data_len))
210 >                if (!memcmp(ROMBaseHost + ofs, data, data_len))
211                          return ofs;
212                  ofs++;
213          }
# Line 223 | Line 224 | static uint32 rsrc_ptr = 0;
224   // id = 4711 means "find any ID"
225   static uint32 find_rom_resource(uint32 s_type, int16 s_id = 4711, bool cont = false)
226   {
227 <        uint32 *lp = (uint32 *)(ROM_BASE + 0x1a);
227 >        uint32 *lp = (uint32 *)(ROMBaseHost + 0x1a);
228          uint32 x = ntohl(*lp);
229 <        uint8 *bp = (uint8 *)(ROM_BASE + x + 5);
229 >        uint8 *bp = (uint8 *)(ROMBaseHost + x + 5);
230          uint32 header_size = *bp;
231  
232          if (!cont)
# Line 234 | Line 235 | static uint32 find_rom_resource(uint32 s
235                  return 0;
236  
237          for (;;) {
238 <                lp = (uint32 *)(ROM_BASE + rsrc_ptr);
238 >                lp = (uint32 *)(ROMBaseHost + rsrc_ptr);
239                  rsrc_ptr = ntohl(*lp);
240                  if (rsrc_ptr == 0)
241                          break;
242  
243                  rsrc_ptr += header_size;
244  
245 <                lp = (uint32 *)(ROM_BASE + rsrc_ptr + 4);
245 >                lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 4);
246                  uint32 data = ntohl(*lp); lp++;
247                  uint32 type = ntohl(*lp); lp++;
248                  int16 id = ntohs(*(int16 *)lp);
# Line 258 | Line 259 | static uint32 find_rom_resource(uint32 s
259  
260   static uint32 find_rom_trap(uint16 trap)
261   {
262 <        uint32 *lp = (uint32 *)(ROM_BASE + 0x22);
263 <        lp = (uint32 *)(ROM_BASE + ntohl(*lp));
262 >        uint32 *lp = (uint32 *)(ROMBaseHost + 0x22);
263 >        lp = (uint32 *)(ROMBaseHost + ntohl(*lp));
264  
265          if (trap > 0xa800)
266                  return ntohl(lp[trap & 0x3ff]);
# Line 269 | Line 270 | static uint32 find_rom_trap(uint16 trap)
270  
271  
272   /*
273 + *  Return target of branch instruction specified at ADDR, or 0 if
274 + *  there is no such instruction
275 + */
276 +
277 + static uint32 rom_powerpc_branch_target(uint32 addr)
278 + {
279 +        uint32 opcode = ntohl(*(uint32 *)(ROMBaseHost + addr));
280 +        uint32 primop = opcode >> 26;
281 +        uint32 target = 0;
282 +
283 +        if (primop == 18) {                     // Branch
284 +                target = opcode & 0x3fffffc;
285 +                if (target & 0x2000000)
286 +                        target |= 0xfc000000;
287 +                if ((opcode & 2) == 0)
288 +                        target += addr;
289 +        }
290 +        else if (primop == 16) {        // Branch Conditional
291 +                target = (int32)(int16)(opcode & 0xfffc);
292 +                if ((opcode & 2) == 0)
293 +                        target += addr;
294 +        }
295 +        return target;
296 + }
297 +
298 +
299 + /*
300 + *  Search ROM for instruction branching to target address, return 0 if none found
301 + */
302 +
303 + static uint32 find_rom_powerpc_branch(uint32 start, uint32 end, uint32 target)
304 + {
305 +        for (uint32 addr = start; addr < end; addr += 4) {
306 +                if (rom_powerpc_branch_target(addr) == target)
307 +                        return addr;
308 +        }
309 +        return 0;
310 + }
311 +
312 +
313 + /*
314 + *  Check that requested ROM patch space is really available
315 + */
316 +
317 + static bool check_rom_patch_space(uint32 base, uint32 size)
318 + {
319 +        size = (size + 3) & -4;
320 +        for (int i = 0; i < size; i += 4) {
321 +                uint32 x = ntohl(*(uint32 *)(ROMBaseHost + base + i));
322 +                if (x != 0x6b636b63 && x != 0)
323 +                        return false;
324 +        }
325 +        return true;
326 + }
327 +
328 +
329 + /*
330   *  List of audio sifters installed in ROM and System file
331   */
332  
# Line 447 | Line 505 | static const uint8 cdrom_driver[] = {  //
505          0x4e, 0x75                                                      //  rts
506   };
507  
508 < #if EMULATED_PPC
451 < #define SERIAL_TRAMPOLINES 1
452 < static uint32 serial_nothing_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_NOTHING), 0};
453 < static uint32 serial_open_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_OPEN), 0};
454 < static uint32 serial_prime_in_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_IN), 0};
455 < static uint32 serial_prime_out_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_OUT), 0};
456 < static uint32 serial_control_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CONTROL), 0};
457 < static uint32 serial_status_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_STATUS), 0};
458 < static uint32 serial_close_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CLOSE), 0};
459 < #elif defined(__linux__)
460 < #define SERIAL_TRAMPOLINES 1
461 < static uint32 serial_nothing_tvect[2] = {(uint32)SerialNothing, 0};
462 < static uint32 serial_open_tvect[2] = {(uint32)SerialOpen, 0};
463 < static uint32 serial_prime_in_tvect[2] = {(uint32)SerialPrimeIn, 0};
464 < static uint32 serial_prime_out_tvect[2] = {(uint32)SerialPrimeOut, 0};
465 < static uint32 serial_control_tvect[2] = {(uint32)SerialControl, 0};
466 < static uint32 serial_status_tvect[2] = {(uint32)SerialStatus, 0};
467 < static uint32 serial_close_tvect[2] = {(uint32)SerialClose, 0};
468 < #endif
508 > static uint32 long_ptr;
509  
510 < static const uint32 ain_driver[] = {    // .AIn driver header
511 <        0x4d000000, 0x00000000,
512 <        0x00200040, 0x00600080,
513 <        0x00a0042e, 0x41496e00,
514 <        0x00000000, 0x00000000,
515 <        0xaafe0700, 0x00000000,
516 <        0x00000000, 0x00179822,
517 < #ifdef SERIAL_TRAMPOLINES
518 <        0x00010004, (uint32)serial_nothing_tvect,
519 < #else
520 <        0x00010004, (uint32)SerialNothing,
521 < #endif
522 <        0x00000000, 0x00000000,
523 <        0xaafe0700, 0x00000000,
524 <        0x00000000, 0x00179822,
525 < #ifdef SERIAL_TRAMPOLINES
526 <        0x00010004, (uint32)serial_prime_in_tvect,
527 < #else
528 <        0x00010004, (uint32)SerialPrimeIn,
529 < #endif
530 <        0x00000000, 0x00000000,
531 <        0xaafe0700, 0x00000000,
532 <        0x00000000, 0x00179822,
533 < #ifdef SERIAL_TRAMPOLINES
534 <        0x00010004, (uint32)serial_control_tvect,
535 < #else
536 <        0x00010004, (uint32)SerialControl,
537 < #endif
538 <        0x00000000, 0x00000000,
539 <        0xaafe0700, 0x00000000,
540 <        0x00000000, 0x00179822,
541 < #ifdef SERIAL_TRAMPOLINES
542 <        0x00010004, (uint32)serial_status_tvect,
543 < #else
544 <        0x00010004, (uint32)SerialStatus,
545 < #endif
546 <        0x00000000, 0x00000000,
547 <        0xaafe0700, 0x00000000,
548 <        0x00000000, 0x00179822,
549 < #ifdef SERIAL_TRAMPOLINES
510 <        0x00010004, (uint32)serial_nothing_tvect,
511 < #else
512 <        0x00010004, (uint32)SerialNothing,
513 < #endif
514 <        0x00000000, 0x00000000,
510 > static void SetLongBase(uint32 addr)
511 > {
512 >        long_ptr = addr;
513 > }
514 >
515 > static void Long(uint32 value)
516 > {
517 >        WriteMacInt32(long_ptr, value);
518 >        long_ptr += 4;
519 > }
520 >
521 > static void gen_ain_driver(uintptr addr)
522 > {
523 >        SetLongBase(addr);
524 >
525 >        // .AIn driver header
526 >        Long(0x4d000000); Long(0x00000000);
527 >        Long(0x00200040); Long(0x00600080);
528 >        Long(0x00a0042e); Long(0x41496e00);
529 >        Long(0x00000000); Long(0x00000000);
530 >        Long(0xaafe0700); Long(0x00000000);
531 >        Long(0x00000000); Long(0x00179822);
532 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_NOTHING));
533 >        Long(0x00000000); Long(0x00000000);
534 >        Long(0xaafe0700); Long(0x00000000);
535 >        Long(0x00000000); Long(0x00179822);
536 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_PRIME_IN));
537 >        Long(0x00000000); Long(0x00000000);
538 >        Long(0xaafe0700); Long(0x00000000);
539 >        Long(0x00000000); Long(0x00179822);
540 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CONTROL));
541 >        Long(0x00000000); Long(0x00000000);
542 >        Long(0xaafe0700); Long(0x00000000);
543 >        Long(0x00000000); Long(0x00179822);
544 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_STATUS));
545 >        Long(0x00000000); Long(0x00000000);
546 >        Long(0xaafe0700); Long(0x00000000);
547 >        Long(0x00000000); Long(0x00179822);
548 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_NOTHING));
549 >        Long(0x00000000); Long(0x00000000);
550   };
551  
552 < static const uint32 aout_driver[] = {   // .AOut driver header
553 <        0x4d000000, 0x00000000,
554 <        0x00200040, 0x00600080,
555 <        0x00a0052e, 0x414f7574,
556 <        0x00000000, 0x00000000,
557 <        0xaafe0700, 0x00000000,
558 <        0x00000000, 0x00179822,
559 < #ifdef SERIAL_TRAMPOLINES
560 <        0x00010004, (uint32)serial_open_tvect,
561 < #else
562 <        0x00010004, (uint32)SerialOpen,
563 < #endif
564 <        0x00000000, 0x00000000,
565 <        0xaafe0700, 0x00000000,
566 <        0x00000000, 0x00179822,
567 < #ifdef SERIAL_TRAMPOLINES
568 <        0x00010004, (uint32)serial_prime_out_tvect,
569 < #else
570 <        0x00010004, (uint32)SerialPrimeOut,
571 < #endif
572 <        0x00000000, 0x00000000,
573 <        0xaafe0700, 0x00000000,
574 <        0x00000000, 0x00179822,
575 < #ifdef SERIAL_TRAMPOLINES
576 <        0x00010004, (uint32)serial_control_tvect,
577 < #else
578 <        0x00010004, (uint32)SerialControl,
579 < #endif
580 <        0x00000000, 0x00000000,
546 <        0xaafe0700, 0x00000000,
547 <        0x00000000, 0x00179822,
548 < #ifdef SERIAL_TRAMPOLINES
549 <        0x00010004, (uint32)serial_status_tvect,
550 < #else
551 <        0x00010004, (uint32)SerialStatus,
552 < #endif
553 <        0x00000000, 0x00000000,
554 <        0xaafe0700, 0x00000000,
555 <        0x00000000, 0x00179822,
556 < #ifdef SERIAL_TRAMPOLINES
557 <        0x00010004, (uint32)serial_close_tvect,
558 < #else
559 <        0x00010004, (uint32)SerialClose,
560 < #endif
561 <        0x00000000, 0x00000000,
552 > static void gen_aout_driver(uintptr addr)
553 > {
554 >        SetLongBase(addr);
555 >
556 >        // .AOut driver header
557 >        Long(0x4d000000); Long(0x00000000);
558 >        Long(0x00200040); Long(0x00600080);
559 >        Long(0x00a0052e); Long(0x414f7574);
560 >        Long(0x00000000); Long(0x00000000);
561 >        Long(0xaafe0700); Long(0x00000000);
562 >        Long(0x00000000); Long(0x00179822);
563 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_OPEN));
564 >        Long(0x00000000); Long(0x00000000);
565 >        Long(0xaafe0700); Long(0x00000000);
566 >        Long(0x00000000); Long(0x00179822);
567 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_PRIME_OUT));
568 >        Long(0x00000000); Long(0x00000000);
569 >        Long(0xaafe0700); Long(0x00000000);
570 >        Long(0x00000000); Long(0x00179822);
571 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CONTROL));
572 >        Long(0x00000000); Long(0x00000000);
573 >        Long(0xaafe0700); Long(0x00000000);
574 >        Long(0x00000000); Long(0x00179822);
575 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_STATUS));
576 >        Long(0x00000000); Long(0x00000000);
577 >        Long(0xaafe0700); Long(0x00000000);
578 >        Long(0x00000000); Long(0x00179822);
579 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CLOSE));
580 >        Long(0x00000000); Long(0x00000000);
581   };
582  
583 < static const uint32 bin_driver[] = {    // .BIn driver header
584 <        0x4d000000, 0x00000000,
585 <        0x00200040, 0x00600080,
586 <        0x00a0042e, 0x42496e00,
587 <        0x00000000, 0x00000000,
588 <        0xaafe0700, 0x00000000,
589 <        0x00000000, 0x00179822,
590 < #ifdef SERIAL_TRAMPOLINES
591 <        0x00010004, (uint32)serial_nothing_tvect,
592 < #else
593 <        0x00010004, (uint32)SerialNothing,
594 < #endif
595 <        0x00000000, 0x00000000,
596 <        0xaafe0700, 0x00000000,
597 <        0x00000000, 0x00179822,
598 < #ifdef SERIAL_TRAMPOLINES
599 <        0x00010004, (uint32)serial_prime_in_tvect,
600 < #else
601 <        0x00010004, (uint32)SerialPrimeIn,
602 < #endif
603 <        0x00000000, 0x00000000,
604 <        0xaafe0700, 0x00000000,
605 <        0x00000000, 0x00179822,
606 < #ifdef SERIAL_TRAMPOLINES
607 <        0x00010004, (uint32)serial_control_tvect,
608 < #else
609 <        0x00010004, (uint32)SerialControl,
610 < #endif
611 <        0x00000000, 0x00000000,
593 <        0xaafe0700, 0x00000000,
594 <        0x00000000, 0x00179822,
595 < #ifdef SERIAL_TRAMPOLINES
596 <        0x00010004, (uint32)serial_status_tvect,
597 < #else
598 <        0x00010004, (uint32)SerialStatus,
599 < #endif
600 <        0x00000000, 0x00000000,
601 <        0xaafe0700, 0x00000000,
602 <        0x00000000, 0x00179822,
603 < #ifdef SERIAL_TRAMPOLINES
604 <        0x00010004, (uint32)serial_nothing_tvect,
605 < #else
606 <        0x00010004, (uint32)SerialNothing,
607 < #endif
608 <        0x00000000, 0x00000000,
583 > static void gen_bin_driver(uintptr addr)
584 > {
585 >        SetLongBase(addr);
586 >
587 >        // .BIn driver header
588 >        Long(0x4d000000); Long(0x00000000);
589 >        Long(0x00200040); Long(0x00600080);
590 >        Long(0x00a0042e); Long(0x42496e00);
591 >        Long(0x00000000); Long(0x00000000);
592 >        Long(0xaafe0700); Long(0x00000000);
593 >        Long(0x00000000); Long(0x00179822);
594 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_NOTHING));
595 >        Long(0x00000000); Long(0x00000000);
596 >        Long(0xaafe0700); Long(0x00000000);
597 >        Long(0x00000000); Long(0x00179822);
598 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_PRIME_IN));
599 >        Long(0x00000000); Long(0x00000000);
600 >        Long(0xaafe0700); Long(0x00000000);
601 >        Long(0x00000000); Long(0x00179822);
602 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CONTROL));
603 >        Long(0x00000000); Long(0x00000000);
604 >        Long(0xaafe0700); Long(0x00000000);
605 >        Long(0x00000000); Long(0x00179822);
606 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_STATUS));
607 >        Long(0x00000000); Long(0x00000000);
608 >        Long(0xaafe0700); Long(0x00000000);
609 >        Long(0x00000000); Long(0x00179822);
610 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_NOTHING));
611 >        Long(0x00000000); Long(0x00000000);
612   };
613  
614 < static const uint32 bout_driver[] = {   // .BOut driver header
615 <        0x4d000000, 0x00000000,
616 <        0x00200040, 0x00600080,
617 <        0x00a0052e, 0x424f7574,
618 <        0x00000000, 0x00000000,
619 <        0xaafe0700, 0x00000000,
620 <        0x00000000, 0x00179822,
621 < #ifdef SERIAL_TRAMPOLINES
622 <        0x00010004, (uint32)serial_open_tvect,
623 < #else
624 <        0x00010004, (uint32)SerialOpen,
625 < #endif
626 <        0x00000000, 0x00000000,
627 <        0xaafe0700, 0x00000000,
628 <        0x00000000, 0x00179822,
629 < #ifdef SERIAL_TRAMPOLINES
630 <        0x00010004, (uint32)serial_prime_out_tvect,
631 < #else
632 <        0x00010004, (uint32)SerialPrimeOut,
633 < #endif
634 <        0x00000000, 0x00000000,
635 <        0xaafe0700, 0x00000000,
636 <        0x00000000, 0x00179822,
637 < #ifdef SERIAL_TRAMPOLINES
638 <        0x00010004, (uint32)serial_control_tvect,
639 < #else
640 <        0x00010004, (uint32)SerialControl,
641 < #endif
642 <        0x00000000, 0x00000000,
640 <        0xaafe0700, 0x00000000,
641 <        0x00000000, 0x00179822,
642 < #ifdef SERIAL_TRAMPOLINES
643 <        0x00010004, (uint32)serial_status_tvect,
644 < #else
645 <        0x00010004, (uint32)SerialStatus,
646 < #endif
647 <        0x00000000, 0x00000000,
648 <        0xaafe0700, 0x00000000,
649 <        0x00000000, 0x00179822,
650 < #ifdef SERIAL_TRAMPOLINES
651 <        0x00010004, (uint32)serial_close_tvect,
652 < #else
653 <        0x00010004, (uint32)SerialClose,
654 < #endif
655 <        0x00000000, 0x00000000,
614 > static void gen_bout_driver(uintptr addr)
615 > {
616 >        SetLongBase(addr);
617 >
618 >        // .BOut driver header
619 >        Long(0x4d000000); Long(0x00000000);
620 >        Long(0x00200040); Long(0x00600080);
621 >        Long(0x00a0052e); Long(0x424f7574);
622 >        Long(0x00000000); Long(0x00000000);
623 >        Long(0xaafe0700); Long(0x00000000);
624 >        Long(0x00000000); Long(0x00179822);
625 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_OPEN));
626 >        Long(0x00000000); Long(0x00000000);
627 >        Long(0xaafe0700); Long(0x00000000);
628 >        Long(0x00000000); Long(0x00179822);
629 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_PRIME_OUT));
630 >        Long(0x00000000); Long(0x00000000);
631 >        Long(0xaafe0700); Long(0x00000000);
632 >        Long(0x00000000); Long(0x00179822);
633 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CONTROL));
634 >        Long(0x00000000); Long(0x00000000);
635 >        Long(0xaafe0700); Long(0x00000000);
636 >        Long(0x00000000); Long(0x00179822);
637 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_STATUS));
638 >        Long(0x00000000); Long(0x00000000);
639 >        Long(0xaafe0700); Long(0x00000000);
640 >        Long(0x00000000); Long(0x00179822);
641 >        Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CLOSE));
642 >        Long(0x00000000); Long(0x00000000);
643   };
644  
645   static const uint8 adbop_patch[] = {    // Call ADBOp() completion procedure
# Line 679 | Line 666 | static const uint8 adbop_patch[] = {   //
666  
667  
668   /*
669 + *  Copy PowerPC code to ROM image and reverse bytes if necessary
670 + */
671 +
672 + static inline void memcpy_powerpc_code(void *dst, const void *src, size_t len)
673 + {
674 + #ifdef WORDS_BIGENDIAN
675 +        (void)memcpy(dst, src, len);
676 + #else
677 +        uint32 *d = (uint32 *)dst;
678 +        uint32 *s = (uint32 *)src;
679 +        for (int i = 0; i < len/4; i++)
680 +                d[i] = htonl(s[i]);
681 + #endif
682 + }
683 +
684 +
685 + /*
686   *  Install ROM patches (RAMBase and KernelDataAddr must be set)
687   */
688  
689   bool PatchROM(void)
690   {
691          // Print ROM info
692 <        D(bug("Checksum: %08lx\n", ntohl(*(uint32 *)ROM_BASE)));
693 <        D(bug("Version: %04x\n", ntohs(*(uint16 *)(ROM_BASE + 8))));
694 <        D(bug("Sub Version: %04x\n", ntohs(*(uint16 *)(ROM_BASE + 18))));
695 <        D(bug("Nanokernel ID: %s\n", (char *)ROM_BASE + 0x30d064));
696 <        D(bug("Resource Map at %08lx\n", ntohl(*(uint32 *)(ROM_BASE + 26))));
697 <        D(bug("Trap Tables at %08lx\n\n", ntohl(*(uint32 *)(ROM_BASE + 34))));
692 >        D(bug("Checksum: %08lx\n", ntohl(*(uint32 *)ROMBaseHost)));
693 >        D(bug("Version: %04x\n", ntohs(*(uint16 *)(ROMBaseHost + 8))));
694 >        D(bug("Sub Version: %04x\n", ntohs(*(uint16 *)(ROMBaseHost + 18))));
695 >        D(bug("Nanokernel ID: %s\n", (char *)ROMBaseHost + 0x30d064));
696 >        D(bug("Resource Map at %08lx\n", ntohl(*(uint32 *)(ROMBaseHost + 26))));
697 >        D(bug("Trap Tables at %08lx\n\n", ntohl(*(uint32 *)(ROMBaseHost + 34))));
698  
699          // Detect ROM type
700 <        if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot TNT", 8))
700 >        if (!memcmp(ROMBaseHost + 0x30d064, "Boot TNT", 8))
701                  ROMType = ROMTYPE_TNT;
702 <        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Alchemy", 12))
702 >        else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Alchemy", 12))
703                  ROMType = ROMTYPE_ALCHEMY;
704 <        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Zanzibar", 13))
704 >        else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Zanzibar", 13))
705                  ROMType = ROMTYPE_ZANZIBAR;
706 <        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gazelle", 12))
706 >        else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Gazelle", 12))
707                  ROMType = ROMTYPE_GAZELLE;
708 <        else if (!memcmp((void *)(ROM_BASE + 0x30d064), "NewWorld", 8))
708 >        else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Gossamer", 13))
709 >                ROMType = ROMTYPE_GOSSAMER;
710 >        else if (!memcmp(ROMBaseHost + 0x30d064, "NewWorld", 8))
711                  ROMType = ROMTYPE_NEWWORLD;
712          else
713                  return false;
714  
715 +        // Check that other ROM addresses point to really free regions
716 +        if (!check_rom_patch_space(CHECK_LOAD_PATCH_SPACE, 0x40))
717 +                return false;
718 +        if (!check_rom_patch_space(PUT_SCRAP_PATCH_SPACE, 0x40))
719 +                return false;
720 +        if (!check_rom_patch_space(GET_SCRAP_PATCH_SPACE, 0x40))
721 +                return false;
722 +        if (!check_rom_patch_space(ADDR_MAP_PATCH_SPACE - 10 * 4, 0x100))
723 +                return false;
724 +
725          // Apply patches
726          if (!patch_nanokernel_boot()) return false;
727          if (!patch_68k_emul()) return false;
# Line 714 | Line 730 | bool PatchROM(void)
730  
731   #ifdef M68K_BREAK_POINT
732          // Install 68k breakpoint
733 <        uint16 *wp = (uint16 *)(ROM_BASE + M68K_BREAK_POINT);
733 >        uint16 *wp = (uint16 *)(ROMBaseHost + M68K_BREAK_POINT);
734          *wp++ = htons(M68K_EMUL_BREAK);
735          *wp = htons(M68K_EMUL_RETURN);
736   #endif
737  
738   #ifdef POWERPC_BREAK_POINT
739          // Install PowerPC breakpoint
740 <        uint32 *lp = (uint32 *)(ROM_BASE + POWERPC_BREAK_POINT);
740 >        uint32 *lp = (uint32 *)(ROMBaseHost + POWERPC_BREAK_POINT);
741          *lp = htonl(0);
742   #endif
743  
744          // Copy 68k emulator to 2MB boundary
745 <        memcpy((void *)(ROM_BASE + ROM_SIZE), (void *)(ROM_BASE + ROM_SIZE - 0x100000), 0x100000);
745 >        memcpy(ROMBaseHost + ROM_SIZE, ROMBaseHost + (ROM_SIZE - 0x100000), 0x100000);
746          return true;
747   }
748  
# Line 738 | Line 754 | bool PatchROM(void)
754   static bool patch_nanokernel_boot(void)
755   {
756          uint32 *lp;
757 +        uint32 base, loc;
758  
759          // ROM boot structure patches
760 <        lp = (uint32 *)(ROM_BASE + 0x30d000);
760 >        lp = (uint32 *)(ROMBaseHost + 0x30d000);
761          lp[0x9c >> 2] = htonl(KernelDataAddr);                  // LA_InfoRecord
762          lp[0xa0 >> 2] = htonl(KernelDataAddr);                  // LA_KernelData
763          lp[0xa4 >> 2] = htonl(KernelDataAddr + 0x1000); // LA_EmulatorData
# Line 750 | Line 767 | static bool patch_nanokernel_boot(void)
767          lp[0xfd8 >> 2] = htonl(ROM_BASE + 0x2a);                // 68k reset vector
768  
769          // Skip SR/BAT/SDR init
770 <        if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_NEWWORLD) {
771 <                lp = (uint32 *)(ROM_BASE + 0x310000);
770 >        loc = 0x310000;
771 >        if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_GOSSAMER || ROMType == ROMTYPE_NEWWORLD) {
772 >                lp = (uint32 *)(ROMBaseHost + loc);
773                  *lp++ = htonl(POWERPC_NOP);
774                  *lp = htonl(0x38000000);
775          }
776 <        static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x310200};
777 <        lp = (uint32 *)(ROM_BASE + 0x310008);
778 <        *lp = htonl(0x48000000 | (sr_init_loc[ROMType] - 8) & 0xffff);  // b            ROM_BASE+0x3101b0
779 <        lp = (uint32 *)(ROM_BASE + sr_init_loc[ROMType]);
776 >        static const uint8 sr_init_dat[] = {0x35, 0x4a, 0xff, 0xfc, 0x7d, 0x86, 0x50, 0x2e};
777 >        if ((base = find_rom_data(0x3101b0, 0x3105b0, sr_init_dat, sizeof(sr_init_dat))) == 0) return false;
778 >        D(bug("sr_init %08lx\n", base));
779 >        lp = (uint32 *)(ROMBaseHost + loc + 8);
780 >        *lp = htonl(0x48000000 | ((base - loc - 8) & 0x3fffffc));       // b            ROM_BASE+0x3101b0
781 >        lp = (uint32 *)(ROMBaseHost + base);
782          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);            // lwz  r1,(pointer to Kernel Data)
783          *lp++ = htonl(0x3da0dead);              // lis  r13,0xdead      (start of kernel memory)
784          *lp++ = htonl(0x3dc00010);              // lis  r14,0x0010      (size of page table)
785          *lp = htonl(0x3de00010);                // lis  r15,0x0010      (size of kernel memory)
786  
787          // Don't read PVR
788 <        static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310438};
789 <        lp = (uint32 *)(ROM_BASE + pvr_loc[ROMType]);
788 >        static const uint8 pvr_read_dat[] = {0x7d, 0x9f, 0x42, 0xa6};
789 >        if ((base = find_rom_data(0x3103b0, 0x3108b0, pvr_read_dat, sizeof(pvr_read_dat))) == 0) return false;
790 >        D(bug("pvr_read %08lx\n", base));
791 >        lp = (uint32 *)(ROMBaseHost + base);
792          *lp = htonl(0x81800000 + XLM_PVR);      // lwz  r12,(theoretical PVR)
793  
794          // Set CPU specific data (even if ROM doesn't have support for that CPU)
773        lp = (uint32 *)(ROM_BASE + pvr_loc[ROMType]);
795          if (ntohl(lp[6]) != 0x2c0c0001)
796                  return false;
797          uint32 ofs = ntohl(lp[7]) & 0xffff;
798          D(bug("ofs %08lx\n", ofs));
799          lp[8] = htonl((ntohl(lp[8]) & 0xffff) | 0x48000000);    // beq -> b
800 <        uint32 loc = (ntohl(lp[8]) & 0xffff) + (uint32)(lp+8) - ROM_BASE;
800 >        loc = (ntohl(lp[8]) & 0xffff) + (uintptr)(lp+8) - (uintptr)ROMBaseHost;
801          D(bug("loc %08lx\n", loc));
802 <        lp = (uint32 *)(ROM_BASE + ofs + 0x310000);
802 >        lp = (uint32 *)(ROMBaseHost + ofs + 0x310000);
803          switch (PVR >> 16) {
804                  case 1:         // 601
805                          lp[0] = htonl(0x1000);          // Page size
# Line 826 | Line 847 | static bool patch_nanokernel_boot(void)
847                          lp[7] = htonl(0x00040004);      // Inst cache assoc/Data cache assoc
848                          lp[8] = htonl(0x00400002);      // TLB total size/TLB assoc
849                          break;
850 <                case 8:         // 750
850 >                case 8:         // 750, 750FX
851 >                case 0x7000:
852                          lp[0] = htonl(0x1000);          // Page size
853                          lp[1] = htonl(0x8000);          // Data cache size
854                          lp[2] = htonl(0x8000);          // Inst cache size
# Line 850 | Line 872 | static bool patch_nanokernel_boot(void)
872                          lp[8] = htonl(0x00800002);      // TLB total size/TLB assoc
873                          break;
874   //              case 11:        // X704?
875 <                case 12:        // ???
875 >                case 12:        // 7400, 7410, 7450, 7455, 7457
876 >                case 0x800c:
877 >                case 0x8000:
878 >                case 0x8001:
879 >                case 0x8002:
880                          lp[0] = htonl(0x1000);          // Page size
881                          lp[1] = htonl(0x8000);          // Data cache size
882                          lp[2] = htonl(0x8000);          // Inst cache size
# Line 885 | Line 911 | static bool patch_nanokernel_boot(void)
911                          lp[7] = htonl(0x00080008);      // Inst cache assoc/Data cache assoc
912                          lp[8] = htonl(0x00800004);      // TLB total size/TLB assoc
913                          break;
914 +                case 0x39:      // 970
915 +                        lp[0] = htonl(0x1000);          // Page size
916 +                        lp[1] = htonl(0x8000);          // Data cache size
917 +                        lp[2] = htonl(0x10000);         // Inst cache size
918 +                        lp[3] = htonl(0x00200020);      // Coherency block size/Reservation granule size
919 +                        lp[4] = htonl(0x00010020);      // Unified caches/Inst cache line size
920 +                        lp[5] = htonl(0x00200020);      // Data cache line size/Data cache block size touch
921 +                        lp[6] = htonl(0x00800080);      // Inst cache block size/Data cache block size
922 +                        lp[7] = htonl(0x00020002);      // Inst cache assoc/Data cache assoc
923 +                        lp[8] = htonl(0x02000004);      // TLB total size/TLB assoc
924 +                        break;
925                  default:
926                          printf("WARNING: Unknown CPU type\n");
927                          break;
928          }
929  
930          // Don't set SPRG3, don't test MQ
931 <        lp = (uint32 *)(ROM_BASE + loc + 0x20);
932 <        *lp++ = htonl(POWERPC_NOP);
933 <        lp++;
934 <        *lp++ = htonl(POWERPC_NOP);
935 <        lp++;
936 <        *lp = htonl(POWERPC_NOP);
931 >        static const uint8 sprg3_mq_dat[] = {0x7d, 0x13, 0x43, 0xa6, 0x3d, 0x00, 0x00, 0x04, 0x7d, 0x00, 0x03, 0xa6, 0x39, 0x00, 0x00, 0x00, 0x7d, 0x00, 0x02, 0xa6};
932 >        if ((base = find_rom_data(loc + 0x20, loc + 0x60, sprg3_mq_dat, sizeof(sprg3_mq_dat))) == 0) return false;
933 >        D(bug("sprg3/mq %08lx\n", base));
934 >        lp = (uint32 *)(ROMBaseHost + base);
935 >        lp[0] = htonl(POWERPC_NOP);
936 >        lp[2] = htonl(POWERPC_NOP);
937 >        lp[4] = htonl(POWERPC_NOP);
938  
939          // Don't read MSR
940 <        lp = (uint32 *)(ROM_BASE + loc + 0x40);
940 >        static const uint8 msr_dat[] = {0x7d, 0xc0, 0x00, 0xa6};
941 >        if ((base = find_rom_data(loc + 0x40, loc + 0x80, msr_dat, sizeof(msr_dat))) == 0) return false;
942 >        D(bug("msr %08lx\n", base));
943 >        lp = (uint32 *)(ROMBaseHost + base);
944          *lp = htonl(0x39c00000);                // li   r14,0
945  
946          // Don't write to DEC
947 <        lp = (uint32 *)(ROM_BASE + loc + 0x70);
947 >        lp = (uint32 *)(ROMBaseHost + loc + 0x70);
948          *lp++ = htonl(POWERPC_NOP);
949 <        loc = (ntohl(lp[0]) & 0xffff) + (uint32)lp - ROM_BASE;
949 >        loc = (ntohl(lp[0]) & 0xffff) + (uintptr)lp - (uintptr)ROMBaseHost;
950          D(bug("loc %08lx\n", loc));
951  
952          // Don't set SPRG3
953 <        lp = (uint32 *)(ROM_BASE + loc + 0x2c);
953 >        static const uint8 sprg3_dat[] = {0x39, 0x21, 0x03, 0x60, 0x7d, 0x33, 0x43, 0xa6, 0x39, 0x01, 0x04, 0x20};
954 >        if ((base = find_rom_data(0x310000, 0x314000, sprg3_dat, sizeof(sprg3_dat))) == 0) return false;
955 >        D(bug("sprg3 %08lx\n", base + 4));
956 >        lp = (uint32 *)(ROMBaseHost + base + 4);
957          *lp = htonl(POWERPC_NOP);
958  
959          // Don't read PVR
960 <        static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148};
961 <        lp = (uint32 *)(ROM_BASE + loc + pvr_ofs[ROMType]);
960 >        static const uint8 pvr_read2_dat[] = {0x7e, 0xff, 0x42, 0xa6, 0x56, 0xf7, 0x84, 0x3e};
961 >        if ((base = find_rom_data(0x310000, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) == 0) return false;
962 >        D(bug("pvr_read2 %08lx\n", base));
963 >        lp = (uint32 *)(ROMBaseHost + base);
964          *lp = htonl(0x82e00000 + XLM_PVR);              // lwz  r23,(theoretical PVR)
965 <        lp = (uint32 *)(ROM_BASE + loc + 0x170);
966 <        if (ntohl(*lp) == 0x7eff42a6)   // NewWorld ROM
965 >        if ((base = find_rom_data(base + 4, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) != 0) {
966 >                D(bug("pvr_read2 %08lx\n", base));
967 >                lp = (uint32 *)(ROMBaseHost + base);
968                  *lp = htonl(0x82e00000 + XLM_PVR);      // lwz  r23,(theoretical PVR)
969 <        lp = (uint32 *)(ROM_BASE + 0x313134);
970 <        if (ntohl(*lp) == 0x7e5f42a6)
971 <                *lp = htonl(0x82400000 + XLM_PVR);      // lwz  r18,(theoretical PVR)
972 <        lp = (uint32 *)(ROM_BASE + 0x3131f4);
973 <        if (ntohl(*lp) == 0x7e5f42a6)   // NewWorld ROM
969 >        }
970 >        static const uint8 pvr_read3_dat[] = {0x7e, 0x5f, 0x42, 0xa6, 0x56, 0x52, 0x84, 0x3e};
971 >        if ((base = find_rom_data(0x310000, 0x320000, pvr_read3_dat, sizeof(pvr_read3_dat))) != 0) {
972 >                D(bug("pvr_read3 %08lx\n", base));
973 >                lp = (uint32 *)(ROMBaseHost + base);
974                  *lp = htonl(0x82400000 + XLM_PVR);      // lwz  r18,(theoretical PVR)
975 <        lp = (uint32 *)(ROM_BASE + 0x314600);
976 <        if (ntohl(*lp) == 0x7d3f42a6)
975 >        }
976 >        static const uint8 pvr_read4_dat[] = {0x7d, 0x3f, 0x42, 0xa6, 0x55, 0x29, 0x84, 0x3e};
977 >        if ((base = find_rom_data(0x310000, 0x320000, pvr_read4_dat, sizeof(pvr_read4_dat))) != 0) {
978 >                D(bug("pvr_read4 %08lx\n", base));
979 >                lp = (uint32 *)(ROMBaseHost + base);
980                  *lp = htonl(0x81200000 + XLM_PVR);      // lzw  r9,(theoritical PVR)
981 +        }
982  
983          // Don't read SDR1
984 <        static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c};
985 <        lp = (uint32 *)(ROM_BASE + loc + sdr1_ofs[ROMType]);
984 >        static const uint8 sdr1_read_dat[] = {0x7d, 0x19, 0x02, 0xa6, 0x55, 0x16, 0x81, 0xde};
985 >        if ((base = find_rom_data(0x310000, 0x320000, sdr1_read_dat, sizeof(sdr1_read_dat))) == 0) return false;
986 >        D(bug("sdr1_read %08lx\n", base));
987 >        lp = (uint32 *)(ROMBaseHost + base);
988          *lp++ = htonl(0x3d00dead);              // lis  r8,0xdead               (pointer to page table)
989          *lp++ = htonl(0x3ec0001f);              // lis  r22,0x001f      (size of page table)
990          *lp = htonl(POWERPC_NOP);
991  
992 <        // Don't clear page table
993 <        static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c4};
994 <        lp = (uint32 *)(ROM_BASE + loc + pgtb_ofs[ROMType]);
992 >        // Don't clear page table, don't invalidate TLB
993 >        static const uint8 pgtb_clear_dat[] = {0x36, 0xd6, 0xff, 0xfc, 0x7e, 0xe8, 0xb1, 0x2e, 0x41, 0x81, 0xff, 0xf8};
994 >        if ((base = find_rom_data(0x310000, 0x320000, pgtb_clear_dat, sizeof(pgtb_clear_dat))) == 0) return false;
995 >        D(bug("pgtb_clear %08lx\n", base + 4));
996 >        lp = (uint32 *)(ROMBaseHost + base + 4);
997          *lp = htonl(POWERPC_NOP);
998 <
999 <        // Don't invalidate TLB
945 <        static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1cc};
946 <        lp = (uint32 *)(ROM_BASE + loc + tlb_ofs[ROMType]);
998 >        D(bug("tblie %08lx\n", base + 12));
999 >        lp = (uint32 *)(ROMBaseHost + base + 12);
1000          *lp = htonl(POWERPC_NOP);
1001  
1002          // Don't create RAM descriptor table
1003 <        static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x37c};
1004 <        lp = (uint32 *)(ROM_BASE + loc + desc_ofs[ROMType]);
1003 >        static const uint8 desc_create_dat[] = {0x97, 0xfd, 0x00, 0x04, 0x3b, 0xff, 0x10, 0x00, 0x4b, 0xff, 0xff, 0xdc};
1004 >        if ((base = find_rom_data(0x310000, 0x320000, desc_create_dat, sizeof(desc_create_dat))) == 0) return false;
1005 >        D(bug("desc_create %08lx\n", base))
1006 >        lp = (uint32 *)(ROMBaseHost + base);
1007          *lp = htonl(POWERPC_NOP);
1008  
1009          // Don't load SRs and BATs
1010 <        static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x404};
1011 <        lp = (uint32 *)(ROM_BASE + loc + sr_ofs[ROMType]);
1010 >        static const uint8 sr_load[] = {0x7c, 0x00, 0x04, 0xac, 0x83, 0x9d, 0x00, 0x00, 0x93, 0x81, 0x05, 0xe8};
1011 >        if ((loc = find_rom_data(0x310000, 0x320000, sr_load, sizeof(sr_load))) == 0) return false;
1012 >        static const uint8 sr_load_caller[] = {0x3e, 0xd6, 0xff, 0xff, 0x41, 0x81, 0xff, 0xdc, 0xb2, 0xc8, 0x00, 0x02};
1013 >        if ((base = find_rom_data(0x310000, 0x320000, sr_load_caller, sizeof(sr_load_caller))) == 0) return false;
1014 >        if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false;
1015 >        D(bug("sr_load %08lx, called from %08lx\n", loc, base));
1016 >        lp = (uint32 *)(ROMBaseHost + base);
1017          *lp = htonl(POWERPC_NOP);
1018  
1019          // Don't mess with SRs
1020 <        static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4};
1021 <        lp = (uint32 *)(ROM_BASE + sr2_ofs[ROMType]);
1020 >        static const uint8 sr_load2_dat[] = {0x83, 0xa1, 0x05, 0xe8, 0x57, 0x7c, 0x3e, 0x78, 0x7f, 0xbd, 0xe0, 0x2e};
1021 >        if ((base = find_rom_data(0x310000, 0x320000, sr_load2_dat, sizeof(sr_load2_dat))) == 0) return false;
1022 >        D(bug("sr_load2 %08lx\n", base));
1023 >        lp = (uint32 *)(ROMBaseHost + base);
1024          *lp = htonl(POWERPC_BLR);
1025  
1026          // Don't check performance monitor
1027 <        static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313218};
1028 <        lp = (uint32 *)(ROM_BASE + pm_ofs[ROMType]);
1029 <        while (ntohl(*lp) != 0x7e58eba6) lp++;
1030 <        *lp++ = htonl(POWERPC_NOP);
1031 <        while (ntohl(*lp) != 0x7e78eaa6) lp++;
1032 <        *lp++ = htonl(POWERPC_NOP);
1033 <        while (ntohl(*lp) != 0x7e59eba6) lp++;
1034 <        *lp++ = htonl(POWERPC_NOP);
1035 <        while (ntohl(*lp) != 0x7e79eaa6) lp++;
1036 <        *lp++ = htonl(POWERPC_NOP);
1037 <        while (ntohl(*lp) != 0x7e5aeba6) lp++;
1038 <        *lp++ = htonl(POWERPC_NOP);
1039 <        while (ntohl(*lp) != 0x7e7aeaa6) lp++;
1040 <        *lp++ = htonl(POWERPC_NOP);
1041 <        while (ntohl(*lp) != 0x7e5beba6) lp++;
1042 <        *lp++ = htonl(POWERPC_NOP);
1043 <        while (ntohl(*lp) != 0x7e7beaa6) lp++;
1044 <        *lp++ = htonl(POWERPC_NOP);
1045 <        while (ntohl(*lp) != 0x7e5feba6) lp++;
1046 <        *lp++ = htonl(POWERPC_NOP);
1047 <        while (ntohl(*lp) != 0x7e7feaa6) lp++;
1048 <        *lp++ = htonl(POWERPC_NOP);
1049 <        while (ntohl(*lp) != 0x7e5ceba6) lp++;
1050 <        *lp++ = htonl(POWERPC_NOP);
989 <        while (ntohl(*lp) != 0x7e7ceaa6) lp++;
990 <        *lp++ = htonl(POWERPC_NOP);
991 <        while (ntohl(*lp) != 0x7e5deba6) lp++;
992 <        *lp++ = htonl(POWERPC_NOP);
993 <        while (ntohl(*lp) != 0x7e7deaa6) lp++;
994 <        *lp++ = htonl(POWERPC_NOP);
995 <        while (ntohl(*lp) != 0x7e5eeba6) lp++;
996 <        *lp++ = htonl(POWERPC_NOP);
997 <        while (ntohl(*lp) != 0x7e7eeaa6) lp++;
998 <        *lp++ = htonl(POWERPC_NOP);
1027 >        static const uint8 pm_check_dat[] = {0x7e, 0x58, 0xeb, 0xa6, 0x7e, 0x53, 0x90, 0xf8, 0x7e, 0x78, 0xea, 0xa6};
1028 >        if ((base = find_rom_data(0x310000, 0x320000, pm_check_dat, sizeof(pm_check_dat))) == 0) return false;
1029 >        D(bug("pm_check %08lx\n", base));
1030 >        lp = (uint32 *)(ROMBaseHost + base);
1031 >        
1032 >        static const int spr_check_list[] = {
1033 >                952 /* mmcr0 */, 953 /* pmc1 */, 954 /* pmc2 */, 955 /* sia */,
1034 >                956 /* mmcr1 */, 957 /* pmc3 */, 958 /* pmc4 */, 959 /* sda */
1035 >        };
1036 >
1037 >        for (int i = 0; i < sizeof(spr_check_list)/sizeof(spr_check_list[0]); i++) {
1038 >                int spr = spr_check_list[i];
1039 >                uint32 mtspr = 0x7e4003a6 | ((spr & 0x1f) << 16) | ((spr & 0x3e0) << 6);
1040 >                uint32 mfspr = 0x7e6002a6 | ((spr & 0x1f) << 16) | ((spr & 0x3e0) << 6);
1041 >                for (int ofs = 0; ofs < 64; ofs++) {
1042 >                        if (ntohl(lp[ofs]) == mtspr) {
1043 >                                if (ntohl(lp[ofs + 2]) != mfspr)
1044 >                                        return false;
1045 >                                D(bug("  SPR%d %08lx\n", spr, base + 4*ofs));
1046 >                                lp[ofs] = htonl(POWERPC_NOP);
1047 >                                lp[ofs + 2] = htonl(POWERPC_NOP);
1048 >                        }
1049 >                }
1050 >        }
1051  
1052          // Jump to 68k emulator
1053 <        static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x438};
1054 <        lp = (uint32 *)(ROM_BASE + loc + jump68k_ofs[ROMType]);
1053 >        static const uint8 jump68k_dat[] = {0x7d, 0x92, 0x43, 0xa6, 0x7d, 0x5a, 0x03, 0xa6, 0x7d, 0x7b, 0x03, 0xa6};
1054 >        if ((loc = find_rom_data(0x310000, 0x320000, jump68k_dat, sizeof(jump68k_dat))) == 0) return false;
1055 >        static const uint8 jump68k_caller_dat[] = {0x85, 0x13, 0x00, 0x08, 0x56, 0xbf, 0x50, 0x3e, 0x63, 0xff, 0x0c, 0x00};
1056 >        if ((base = find_rom_data(0x310000, 0x320000, jump68k_caller_dat, sizeof(jump68k_caller_dat))) == 0) return false;
1057 >        if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false;
1058 >        D(bug("jump68k %08lx, called from %08lx\n", loc, base));
1059 >        lp = (uint32 *)(ROMBaseHost + base);
1060          *lp++ = htonl(0x80610634);              // lwz  r3,0x0634(r1)   (pointer to Emulator Data)
1061          *lp++ = htonl(0x8081119c);              // lwz  r4,0x119c(r1)   (pointer to opcode table)
1062          *lp++ = htonl(0x80011184);              // lwz  r0,0x1184(r1)   (pointer to emulator init routine)
# Line 1016 | Line 1073 | static bool patch_nanokernel_boot(void)
1073   static bool patch_68k_emul(void)
1074   {
1075          uint32 *lp;
1076 <        uint32 base;
1076 >        uint32 base, loc;
1077  
1078          // Overwrite twi instructions
1079 <        static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740};
1080 <        base = twi_loc[ROMType];
1081 <        lp = (uint32 *)(ROM_BASE + base);
1079 >        static const uint8 twi_dat[] = {0x0f, 0xff, 0x00, 0x00, 0x0f, 0xff, 0x00, 0x01, 0x0f, 0xff, 0x00, 0x02};
1080 >        if ((base = find_rom_data(0x36e600, 0x36ea00, twi_dat, sizeof(twi_dat))) == 0) return false;
1081 >        D(bug("twi %08lx\n", base));
1082 >        lp = (uint32 *)(ROMBaseHost + base);
1083          *lp++ = htonl(0x48000000 + 0x36f900 - base);            // b 0x36f900 (Emulator start)
1084          *lp++ = htonl(0x48000000 + 0x36fa00 - base - 4);        // b 0x36fa00 (Mixed mode)
1085          *lp++ = htonl(0x48000000 + 0x36fb00 - base - 8);        // b 0x36fb00 (Reset/FC1E opcode)
1086          *lp++ = htonl(0x48000000 + 0x36fc00 - base - 12);       // FE0A opcode
1087          *lp++ = htonl(POWERPC_ILLEGAL);                                         // Interrupt
1088 <        *lp++ = htonl(POWERPC_ILLEGAL);                                         // ?
1088 >        *lp++ = htonl(0x48000000 + 0x36fd00 - base - 20);       // FE0F opcode
1089          *lp++ = htonl(POWERPC_ILLEGAL);
1090          *lp++ = htonl(POWERPC_ILLEGAL);
1091          *lp++ = htonl(POWERPC_ILLEGAL);
# Line 1041 | Line 1099 | static bool patch_68k_emul(void)
1099  
1100   #if EMULATED_PPC
1101          // Install EMUL_RETURN, EXEC_RETURN, EXEC_NATIVE and EMUL_OP opcodes
1102 <        lp = (uint32 *)(ROM_BASE + 0x380000 + (M68K_EMUL_RETURN << 3));
1102 >        lp = (uint32 *)(ROMBaseHost + 0x380000 + (M68K_EMUL_RETURN << 3));
1103          *lp++ = htonl(POWERPC_EMUL_OP);
1104          *lp++ = htonl(0x4bf66e80);                                                      // b    0x366084
1105          *lp++ = htonl(POWERPC_EMUL_OP | 1);
# Line 1054 | Line 1112 | static bool patch_68k_emul(void)
1112          }
1113   #else
1114          // Install EMUL_RETURN, EXEC_RETURN and EMUL_OP opcodes
1115 <        lp = (uint32 *)(ROM_BASE + 0x380000 + (M68K_EMUL_RETURN << 3));
1115 >        lp = (uint32 *)(ROMBaseHost + 0x380000 + (M68K_EMUL_RETURN << 3));
1116          *lp++ = htonl(0x80000000 + XLM_EMUL_RETURN_PROC);       // lwz  r0,XLM_EMUL_RETURN_PROC
1117          *lp++ = htonl(0x4bf705fc);                                                      // b    0x36f800
1118          *lp++ = htonl(0x80000000 + XLM_EXEC_RETURN_PROC);       // lwz  r0,XLM_EXEC_RETURN_PROC
# Line 1067 | Line 1125 | static bool patch_68k_emul(void)
1125          }
1126  
1127          // Extra routines for EMUL_RETURN/EXEC_RETURN/EMUL_OP
1128 <        lp = (uint32 *)(ROM_BASE + 0x36f800);
1128 >        lp = (uint32 *)(ROMBaseHost + 0x36f800);
1129          *lp++ = htonl(0x7c0803a6);                                              // mtlr r0
1130          *lp++ = htonl(0x4e800020);                                              // blr
1131  
# Line 1077 | Line 1135 | static bool patch_68k_emul(void)
1135   #endif
1136  
1137          // Extra routine for 68k emulator start
1138 <        lp = (uint32 *)(ROM_BASE + 0x36f900);
1138 >        lp = (uint32 *)(ROMBaseHost + 0x36f900);
1139          *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1082 #if EMULATED_PPC
1083        *lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT);
1084 #else
1140          *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1141          *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1142          *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1088 #endif
1143          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1144          *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1145          *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
# Line 1111 | Line 1165 | static bool patch_68k_emul(void)
1165          *lp = htonl(0x4e800020);                                        // blr
1166  
1167          // Extra routine for Mixed Mode
1168 <        lp = (uint32 *)(ROM_BASE + 0x36fa00);
1168 >        lp = (uint32 *)(ROMBaseHost + 0x36fa00);
1169          *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1116 #if EMULATED_PPC
1117        *lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT);
1118 #else
1170          *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1171          *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1172          *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1122 #endif
1173          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1174          *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1175          *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
# Line 1145 | Line 1195 | static bool patch_68k_emul(void)
1195          *lp = htonl(0x4e800020);                                        // blr
1196  
1197          // Extra routine for Reset/FC1E opcode
1198 <        lp = (uint32 *)(ROM_BASE + 0x36fb00);
1198 >        lp = (uint32 *)(ROMBaseHost + 0x36fb00);
1199          *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1150 #if EMULATED_PPC
1151        *lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT);
1152 #else
1200          *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1201          *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1202          *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1156 #endif
1203          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1204          *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1205          *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
# Line 1179 | Line 1225 | static bool patch_68k_emul(void)
1225          *lp = htonl(0x4e800020);                                        // blr
1226  
1227          // Extra routine for FE0A opcode (QuickDraw 3D needs this)
1228 <        lp = (uint32 *)(ROM_BASE + 0x36fc00);
1228 >        lp = (uint32 *)(ROMBaseHost + 0x36fc00);
1229          *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1184 #if EMULATED_PPC
1185        *lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT);
1186 #else
1230          *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1231          *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1232          *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1190 #endif
1233          *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1234          *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1235          *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
# Line 1212 | Line 1254 | static bool patch_68k_emul(void)
1254          *lp++ = htonl(0x50e7deb4);                                      // rlwimi       r7,r7,27,$00000020
1255          *lp = htonl(0x4e800020);                                        // blr
1256  
1257 +        // Extra routine for FE0F opcode (power management)
1258 +        lp = (uint32 *)(ROMBaseHost + 0x36fd00);
1259 +        *lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1260 +        *lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1261 +        *lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1262 +        *lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1263 +        *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1264 +        *lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1265 +        *lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
1266 +        *lp++ = htonl(0x90c10004);                                      // stw          r6,$0004(r1)
1267 +        *lp++ = htonl(0x80c1065c);                                      // lwz          r6,$065c(r1)
1268 +        *lp++ = htonl(0x90e6013c);                                      // stw          r7,$013c(r6)
1269 +        *lp++ = htonl(0x91060144);                                      // stw          r8,$0144(r6)
1270 +        *lp++ = htonl(0x9126014c);                                      // stw          r9,$014c(r6)
1271 +        *lp++ = htonl(0x91460154);                                      // stw          r10,$0154(r6)
1272 +        *lp++ = htonl(0x9166015c);                                      // stw          r11,$015c(r6)
1273 +        *lp++ = htonl(0x91860164);                                      // stw          r12,$0164(r6)
1274 +        *lp++ = htonl(0x91a6016c);                                      // stw          r13,$016c(r6)
1275 +        *lp++ = htonl(0x7da00026);                                      // mfcr         r13
1276 +        *lp++ = htonl(0x80e10660);                                      // lwz          r7,$0660(r1)
1277 +        *lp++ = htonl(0x7d8802a6);                                      // mflr         r12
1278 +        *lp++ = htonl(0x50e74001);                                      // rlwimi.      r7,r7,8,$80000000
1279 +        *lp++ = htonl(0x81410604);                                      // lwz          r10,0x0604(r1)
1280 +        *lp++ = htonl(0x7d4803a6);                                      // mtlr         r10
1281 +        *lp++ = htonl(0x7d8a6378);                                      // mr           r10,r12
1282 +        *lp++ = htonl(0x3d600002);                                      // lis          r11,0x0002
1283 +        *lp++ = htonl(0x616bf072);                                      // ori          r11,r11,0xf072 (MSR)
1284 +        *lp++ = htonl(0x50e7deb4);                                      // rlwimi       r7,r7,27,$00000020
1285 +        *lp = htonl(0x4e800020);                                        // blr
1286 +
1287          // Patch DR emulator to jump to right address when an interrupt occurs
1288 <        lp = (uint32 *)(ROM_BASE + 0x370000);
1289 <        while (lp < (uint32 *)(ROM_BASE + 0x380000)) {
1288 >        lp = (uint32 *)(ROMBaseHost + 0x370000);
1289 >        while (lp < (uint32 *)(ROMBaseHost + 0x380000)) {
1290                  if (ntohl(*lp) == 0x4ca80020)           // bclr         5,8
1291                          goto dr_found;
1292                  lp++;
# Line 1223 | Line 1295 | static bool patch_68k_emul(void)
1295          return false;
1296   dr_found:
1297          lp++;
1298 <        *lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff));          // b    DR_CACHE_BASE+0x1f000
1299 <        lp = (uint32 *)(ROM_BASE + 0x37f000);
1300 <        *lp++ = htonl(0x3c000000 + ((ROM_BASE + 0x46d0a4) >> 16));              // lis  r0,xxx
1301 <        *lp++ = htonl(0x60000000 + ((ROM_BASE + 0x46d0a4) & 0xffff));   // ori  r0,r0,xxx
1302 <        *lp++ = htonl(0x7c0903a6);                                                                              // mtctr        r0
1303 <        *lp = htonl(POWERPC_BCTR);                                                                              // bctr
1298 >        loc = (uintptr)lp - (uintptr)ROMBaseHost;
1299 >        if ((base = rom_powerpc_branch_target(loc)) == 0) base = loc;
1300 >        static const uint8 dr_ret_dat[] = {0x80, 0xbf, 0x08, 0x14, 0x53, 0x19, 0x4d, 0xac, 0x7c, 0xa8, 0x03, 0xa6};
1301 >        if ((base = find_rom_data(base, 0x380000, dr_ret_dat, sizeof(dr_ret_dat))) == 0) return false;
1302 >        D(bug("dr_ret %08lx\n", base));
1303 >        if (base != loc) {
1304 >                // OldWorld ROMs contain an absolute branch
1305 >                D(bug(" patching absolute branch at %08x\n", loc));
1306 >                *lp = htonl(0x48000000 + 0xf000 - (loc & 0xffff));                              // b    DR_CACHE_BASE+0x1f000
1307 >                lp = (uint32 *)(ROMBaseHost + 0x37f000);
1308 >                *lp++ = htonl(0x3c000000 + ((ROM_BASE + base) >> 16));                  // lis  r0,xxx
1309 >                *lp++ = htonl(0x60000000 + ((ROM_BASE + base) & 0xffff));               // ori  r0,r0,xxx
1310 >                *lp++ = htonl(0x7c0803a6);                                                                              // mtlr r0
1311 >                *lp = htonl(POWERPC_BLR);                                                                               // blr
1312 >        }
1313          return true;
1314   }
1315  
# Line 1240 | Line 1321 | dr_found:
1321   static bool patch_nanokernel(void)
1322   {
1323          uint32 *lp;
1324 +        uint32 base, loc;
1325  
1326          // Patch Mixed Mode trap
1327 <        lp = (uint32 *)(ROM_BASE + 0x313c90);   // Don't translate virtual->physical
1328 <        while (ntohl(*lp) != 0x3ba10320) lp++;
1329 <        lp++;
1330 <        *lp++ = htonl(0x7f7fdb78);                                      // mr           r31,r27
1331 <        lp++;
1332 <        *lp = htonl(POWERPC_NOP);
1333 <
1334 <        lp = (uint32 *)(ROM_BASE + 0x313c3c);   // Don't activate PPC exception table
1335 <        while (ntohl(*lp) != 0x39010420) lp++;
1327 >        static const uint8 virt2phys_dat[] = {0x7d, 0x1b, 0x43, 0x78, 0x3b, 0xa1, 0x03, 0x20};
1328 >        if ((base = find_rom_data(0x313000, 0x314000, virt2phys_dat, sizeof(virt2phys_dat))) == 0) return false;
1329 >        D(bug("virt2phys %08lx\n", base + 8));
1330 >        lp = (uint32 *)(ROMBaseHost + base + 8);        // Don't translate virtual->physical
1331 >        lp[0] = htonl(0x7f7fdb78);                                      // mr           r31,r27
1332 >        lp[2] = htonl(POWERPC_NOP);
1333 >
1334 >        static const uint8 ppc_excp_tbl_dat[] = {0x39, 0x01, 0x04, 0x20, 0x7d, 0x13, 0x43, 0xa6};
1335 >        if ((base = find_rom_data(0x313000, 0x314000, ppc_excp_tbl_dat, sizeof(ppc_excp_tbl_dat))) == 0) return false;
1336 >        D(bug("ppc_excp_tbl %08lx\n", base));
1337 >        lp = (uint32 *)(ROMBaseHost + base);            // Don't activate PPC exception table
1338          *lp++ = htonl(0x39000000 + MODE_NATIVE);        // li   r8,MODE_NATIVE
1339 <        *lp = htonl(0x91000000 + XLM_RUN_MODE); // stw  r8,XLM_RUN_MODE
1339 >        *lp = htonl(0x91000000 + XLM_RUN_MODE);         // stw  r8,XLM_RUN_MODE
1340  
1341 <        lp = (uint32 *)(ROM_BASE + 0x312e88);   // Don't modify MSR to turn on FPU
1342 <        while (ntohl(*lp) != 0x556b04e2) lp++;
1343 <        lp -= 4;
1341 >        static const uint8 save_fpu_dat[] = {0x7d, 0x00, 0x00, 0xa6, 0x61, 0x08, 0x20, 0x00, 0x7d, 0x00, 0x01, 0x24};
1342 >        if ((base = find_rom_data(0x310000, 0x314000, save_fpu_dat, sizeof(save_fpu_dat))) == 0) return false;
1343 >        D(bug("save_fpu %08lx\n", base));
1344 >        lp = (uint32 *)(ROMBaseHost + base);            // Don't modify MSR to turn on FPU
1345 >        if (ntohl(lp[4]) != 0x556b04e2) return false;
1346 >        loc = base;
1347 > #if 1
1348 >        // FIXME: is that really intended?
1349          *lp++ = htonl(POWERPC_NOP);
1350          lp++;
1351          *lp++ = htonl(POWERPC_NOP);
1352          lp++;
1353          *lp = htonl(POWERPC_NOP);
1354 + #else
1355 +        lp[0] = htonl(POWERPC_NOP);
1356 +        lp[1] = htonl(POWERPC_NOP);
1357 +        lp[2] = htonl(POWERPC_NOP);
1358 +        lp[3] = htonl(POWERPC_NOP);
1359 + #endif
1360  
1361 <        lp = (uint32 *)(ROM_BASE + 0x312b3c);   // Always save FPU state
1362 <        while (ntohl(*lp) != 0x81010668) lp++;
1363 <        lp--;
1361 >        static const uint8 save_fpu_caller_dat[] = {0x93, 0xa6, 0x01, 0xec, 0x93, 0xc6, 0x01, 0xf4, 0x93, 0xe6, 0x01, 0xfc, 0x40};
1362 >        if ((base = find_rom_data(0x310000, 0x314000, save_fpu_caller_dat, sizeof(save_fpu_caller_dat))) == 0) return false;
1363 >        D(bug("save_fpu_caller %08lx\n", base + 12));
1364 >        if (rom_powerpc_branch_target(base + 12) != loc) return false;
1365 >        lp = (uint32 *)(ROMBaseHost + base + 12);       // Always save FPU state
1366          *lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312e88
1367  
1368 <        lp = (uint32 *)(ROM_BASE + 0x312b44);   // Don't read DEC
1369 <        while (ntohl(*lp) != 0x7ff602a6) lp++;
1370 <        *lp = htonl(0x3be00000);                                        // li   r31,0
1371 <
1372 <        lp = (uint32 *)(ROM_BASE + 0x312b50);   // Don't write DEC
1276 <        while (ntohl(*lp) != 0x7d1603a6) lp++;
1368 >        static const uint8 mdec_dat[] = {0x7f, 0xf6, 0x02, 0xa6, 0x2c, 0x08, 0x00, 0x00, 0x93, 0xe1, 0x06, 0x68, 0x7d, 0x16, 0x03, 0xa6};
1369 >        if ((base = find_rom_data(0x310000, 0x314000, mdec_dat, sizeof(mdec_dat))) == 0) return false;
1370 >        D(bug("mdec %08lx\n", base));
1371 >        lp = (uint32 *)(ROMBaseHost + base);            // Don't modify DEC
1372 >        lp[0] = htonl(0x3be00000);                                      // li   r31,0
1373   #if 1
1374 <        *lp++ = htonl(POWERPC_NOP);
1375 <        *lp = htonl(POWERPC_NOP);
1374 >        lp[3] = htonl(POWERPC_NOP);
1375 >        lp[4] = htonl(POWERPC_NOP);
1376   #else
1377 <        *lp++ = htonl(0x39000040);                                      // li   r8,0x40
1378 <        *lp = htonl(0x990600e4);                                        // stb  r8,0xe4(r6)
1377 >        lp[3] = htonl(0x39000040);                                      // li   r8,0x40
1378 >        lp[4] = htonl(0x990600e4);                                      // stb  r8,0xe4(r6)
1379   #endif
1380  
1381 <        lp = (uint32 *)(ROM_BASE + 0x312b9c);   // Always restore FPU state
1382 <        while (ntohl(*lp) != 0x7c00092d) lp++;
1383 <        lp--;
1381 >        static const uint8 restore_fpu_caller_dat[] = {0x81, 0x06, 0x00, 0xf4, 0x81, 0x46, 0x00, 0xfc, 0x7d, 0x09, 0x03, 0xa6, 0x40};
1382 >        if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller_dat, sizeof(restore_fpu_caller_dat))) == 0) return false;
1383 >        D(bug("restore_fpu_caller %08lx\n", base + 12));
1384 >        lp = (uint32 *)(ROMBaseHost + base + 12);       // Always restore FPU state
1385          *lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312ddc
1386  
1387 <        lp = (uint32 *)(ROM_BASE + 0x312a68);   // Don't activate 68k exception table
1388 <        while (ntohl(*lp) != 0x39010360) lp++;
1387 >        static const uint8 m68k_excp_tbl_dat[] = {0x81, 0x21, 0x06, 0x58, 0x39, 0x01, 0x03, 0x60, 0x7d, 0x13, 0x43, 0xa6};
1388 >        if ((base = find_rom_data(0x310000, 0x314000, m68k_excp_tbl_dat, sizeof(m68k_excp_tbl_dat))) == 0) return false;
1389 >        D(bug("m68k_excp %08lx\n", base + 4));
1390 >        lp = (uint32 *)(ROMBaseHost + base + 4);        // Don't activate 68k exception table
1391          *lp++ = htonl(0x39000000 + MODE_68K);           // li   r8,MODE_68K
1392          *lp = htonl(0x91000000 + XLM_RUN_MODE);         // stw  r8,XLM_RUN_MODE
1393  
1394          // Patch 68k emulator trap routine
1395 <        lp = (uint32 *)(ROM_BASE + 0x312994);   // Always restore FPU state
1396 <        while (ntohl(*lp) != 0x39260040) lp++;
1397 <        lp--;
1395 >        static const uint8 restore_fpu_caller2_dat[] = {0x81, 0x86, 0x00, 0x8c, 0x80, 0x66, 0x00, 0x94, 0x80, 0x86, 0x00, 0x9c, 0x40};
1396 >        if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller2_dat, sizeof(restore_fpu_caller2_dat))) == 0) return false;
1397 >        D(bug("restore_fpu_caller2 %08lx\n", base + 12));
1398 >        loc = rom_powerpc_branch_target(base + 12);
1399 >        lp = (uint32 *)(ROMBaseHost + base + 12);       // Always restore FPU state
1400          *lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312dd4
1401  
1402 <        lp = (uint32 *)(ROM_BASE + 0x312dd8);   // Don't modify MSR to turn on FPU
1403 <        while (ntohl(*lp) != 0x810600e4) lp++;
1404 <        lp--;
1402 >        static const uint8 restore_fpu_dat[] = {0x55, 0x68, 0x04, 0xa5, 0x4c, 0x82, 0x00, 0x20, 0x81, 0x06, 0x00, 0xe4};
1403 >        if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_dat, sizeof(restore_fpu_dat))) == 0) return false;
1404 >        D(bug("restore_fpu %08lx\n", base));
1405 >        if (base != loc) return false;
1406 >        lp = (uint32 *)(ROMBaseHost + base + 4);        // Don't modify MSR to turn on FPU
1407          *lp++ = htonl(POWERPC_NOP);
1408          lp += 2;
1409          *lp++ = htonl(POWERPC_NOP);
# Line 1309 | Line 1412 | static bool patch_nanokernel(void)
1412          *lp++ = htonl(POWERPC_NOP);
1413          *lp = htonl(POWERPC_NOP);
1414  
1415 +        // Disable suspend (FE0F opcode)
1416 +        // TODO: really suspend SheepShaver
1417 +        static const uint8 suspend_dat[] = {0x7c, 0x88, 0x68, 0x39, 0x41, 0x9d};
1418 +        if ((base = find_rom_data(0x315000, 0x316000, suspend_dat, sizeof(suspend_dat))) == 0) return false;
1419 +        D(bug("suspend %08lx\n", base));
1420 +        lp = (uint32 *)(ROMBaseHost + base + 8);
1421 +        *lp = htonl((ntohl(*lp) & 0xffff) | 0x48000000);        // bgt -> b
1422 +
1423          // Patch trap return routine
1424 <        lp = (uint32 *)(ROM_BASE + 0x312c20);
1425 <        while (ntohl(*lp) != 0x7d5a03a6) lp++;
1424 >        static const uint8 trap_return_dat[] = {0x80, 0xc1, 0x00, 0x18, 0x80, 0x21, 0x00, 0x04, 0x4c, 0x00, 0x00, 0x64};
1425 >        if ((base = find_rom_data(0x312000, 0x320000, trap_return_dat, sizeof(trap_return_dat))) == 0) return false;
1426 >        D(bug("trap_return %08lx\n", base + 8));
1427 >        lp = (uint32 *)(ROMBaseHost + base + 8);        // Replace rfi
1428 >        *lp = htonl(POWERPC_BCTR);
1429 >
1430 >        while (ntohl(*lp) != 0x7d5a03a6) lp--;
1431          *lp++ = htonl(0x7d4903a6);                                      // mtctr        r10
1432          *lp++ = htonl(0x7daff120);                                      // mtcr r13
1433 <        *lp = htonl(0x48000000 + 0x8000 - (((uint32)lp - ROM_BASE) & 0xffff));  // b            ROM_BASE+0x318000
1434 <        uint32 xlp = ((uint32)(lp+1) - ROM_BASE) & 0xffff;
1433 >        *lp = htonl(0x48000000 + ((0x318000 - ((uintptr)lp - (uintptr)ROMBaseHost)) & 0x03fffffc));     // b            ROM_BASE+0x318000
1434 >        uint32 npc = (uintptr)(lp + 1) - (uintptr)ROMBaseHost;
1435  
1436 <        lp = (uint32 *)(ROM_BASE + 0x312c50);   // Replace rfi
1321 <        while (ntohl(*lp) != 0x4c000064) lp++;
1322 <        *lp = htonl(POWERPC_BCTR);
1323 <
1324 <        lp = (uint32 *)(ROM_BASE + 0x318000);
1325 < #if EMULATED_PPC
1326 <        *lp++ = POWERPC_NATIVE_OP(NATIVE_ENABLE_INTERRUPT);
1327 <        *lp = htonl(0x48000000 + ((xlp - 0x8004) & 0x03fffffc));        // b            ROM_BASE+0x312c2c
1328 < #else
1436 >        lp = (uint32 *)(ROMBaseHost + 0x318000);
1437          *lp++ = htonl(0x81400000 + XLM_IRQ_NEST);       // lwz  r10,XLM_IRQ_NEST
1438          *lp++ = htonl(0x394affff);                                      // subi r10,r10,1
1439          *lp++ = htonl(0x91400000 + XLM_IRQ_NEST);       // stw  r10,XLM_IRQ_NEST
1440 <        *lp = htonl(0x48000000 + ((xlp - 0x800c) & 0x03fffffc));        // b            ROM_BASE+0x312c2c
1333 < #endif
1440 >        *lp = htonl(0x48000000 + ((npc - 0x31800c) & 0x03fffffc));      // b            ROM_BASE+0x312c2c
1441  
1442   /*
1443          // Disable FE0A/FE06 opcodes
# Line 1351 | Line 1458 | static bool patch_68k(void)
1458          uint32 *lp;
1459          uint16 *wp;
1460          uint8 *bp;
1461 <        uint32 base;
1461 >        uint32 base, loc;
1462  
1463          // Remove 68k RESET instruction
1464          static const uint8 reset_dat[] = {0x4e, 0x70};
1465          if ((base = find_rom_data(0xc8, 0x120, reset_dat, sizeof(reset_dat))) == 0) return false;
1466          D(bug("reset %08lx\n", base));
1467 <        wp = (uint16 *)(ROM_BASE + base);
1467 >        wp = (uint16 *)(ROMBaseHost + base);
1468          *wp = htons(M68K_NOP);
1469  
1470          // Fake reading PowerMac ID (via Universal)
1471          static const uint8 powermac_id_dat[] = {0x45, 0xf9, 0x5f, 0xff, 0xff, 0xfc, 0x20, 0x12, 0x72, 0x00};
1472          if ((base = find_rom_data(0xe000, 0x15000, powermac_id_dat, sizeof(powermac_id_dat))) == 0) return false;
1473          D(bug("powermac_id %08lx\n", base));
1474 <        wp = (uint16 *)(ROM_BASE + base);
1474 >        wp = (uint16 *)(ROMBaseHost + base);
1475          *wp++ = htons(0x203c);                  // move.l       #id,d0
1476          *wp++ = htons(0);
1477   //      if (ROMType == ROMTYPE_NEWWORLD)
# Line 1379 | Line 1486 | static bool patch_68k(void)
1486                  static const uint8 univ_info_dat[] = {0x3f, 0xff, 0x04, 0x00};
1487                  if ((base = find_rom_data(0x14000, 0x18000, univ_info_dat, sizeof(univ_info_dat))) == 0) return false;
1488                  D(bug("universal_info %08lx\n", base));
1489 <                lp = (uint32 *)(ROM_BASE + base - 0x14);
1489 >                lp = (uint32 *)(ROMBaseHost + base - 0x14);
1490                  lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1491                  lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1492                  lp[0x14 >> 2] = htonl(0x3fff0401);
# Line 1391 | Line 1498 | static bool patch_68k(void)
1498                  lp[0x60 >> 2] = htonl(0x0000003d);
1499          } else if (ROMType == ROMTYPE_ZANZIBAR) {
1500                  base = 0x12b70;
1501 <                lp = (uint32 *)(ROM_BASE + base - 0x14);
1501 >                lp = (uint32 *)(ROMBaseHost + base - 0x14);
1502                  lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1503                  lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1504                  lp[0x14 >> 2] = htonl(0x3fff0401);
# Line 1401 | Line 1508 | static bool patch_68k(void)
1508                  lp[0x28 >> 2] = htonl(0x00000861);
1509                  lp[0x58 >> 2] = htonl(0x30200000);
1510                  lp[0x60 >> 2] = htonl(0x0000003d);
1511 +        } else if (ROMType == ROMTYPE_GOSSAMER) {
1512 +                base = 0x12d20;
1513 +                lp = (uint32 *)(ROMBaseHost + base - 0x14);
1514 +                lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1515 +                lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1516 +                lp[0x14 >> 2] = htonl(0x3fff0401);
1517 +                lp[0x18 >> 2] = htonl(0x0300001c);
1518 +                lp[0x1c >> 2] = htonl(0x000108c4);
1519 +                lp[0x24 >> 2] = htonl(0xc301bf26);
1520 +                lp[0x28 >> 2] = htonl(0x00000861);
1521 +                lp[0x58 >> 2] = htonl(0x30410000);
1522 +                lp[0x60 >> 2] = htonl(0x0000003d);
1523          }
1524  
1525          // Construct AddrMap for NewWorld ROM
1526 <        if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR) {
1527 <                lp = (uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE);
1526 >        if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) {
1527 >                lp = (uint32 *)(ROMBaseHost + ADDR_MAP_PATCH_SPACE);
1528                  memset(lp - 10, 0, 0x128);
1529                  lp[-10] = htonl(0x0300001c);
1530                  lp[-9] = htonl(0x000108c4);
# Line 1429 | Line 1548 | static bool patch_68k(void)
1548          static const uint8 via_init_dat[] = {0x08, 0x00, 0x00, 0x02, 0x67, 0x00, 0x00, 0x2c, 0x24, 0x68, 0x00, 0x08};
1549          if ((base = find_rom_data(0xe000, 0x15000, via_init_dat, sizeof(via_init_dat))) == 0) return false;
1550          D(bug("via_init %08lx\n", base));
1551 <        wp = (uint16 *)(ROM_BASE + base + 4);
1551 >        wp = (uint16 *)(ROMBaseHost + base + 4);
1552          *wp = htons(0x6000);                    // bra
1553  
1554          static const uint8 via_init2_dat[] = {0x24, 0x68, 0x00, 0x08, 0x00, 0x12, 0x00, 0x30, 0x4e, 0x71};
1555          if ((base = find_rom_data(0xa000, 0x10000, via_init2_dat, sizeof(via_init2_dat))) == 0) return false;
1556          D(bug("via_init2 %08lx\n", base));
1557 <        wp = (uint16 *)(ROM_BASE + base);
1557 >        wp = (uint16 *)(ROMBaseHost + base);
1558          *wp = htons(0x4ed6);                    // jmp  (a6)
1559  
1560          static const uint8 via_init3_dat[] = {0x22, 0x68, 0x00, 0x08, 0x28, 0x3c, 0x20, 0x00, 0x01, 0x00};
1561          if ((base = find_rom_data(0xa000, 0x10000, via_init3_dat, sizeof(via_init3_dat))) == 0) return false;
1562          D(bug("via_init3 %08lx\n", base));
1563 <        wp = (uint16 *)(ROM_BASE + base);
1563 >        wp = (uint16 *)(ROMBaseHost + base);
1564          *wp = htons(0x4ed6);                    // jmp  (a6)
1565  
1566          // Don't RunDiags, get BootGlobs pointer directly
# Line 1449 | Line 1568 | static bool patch_68k(void)
1568                  static const uint8 run_diags_dat[] = {0x60, 0xff, 0x00, 0x0c};
1569                  if ((base = find_rom_data(0x110, 0x128, run_diags_dat, sizeof(run_diags_dat))) == 0) return false;
1570                  D(bug("run_diags %08lx\n", base));
1571 <                wp = (uint16 *)(ROM_BASE + base);
1571 >                wp = (uint16 *)(ROMBaseHost + base);
1572                  *wp++ = htons(0x4df9);                  // lea  xxx,a6
1573                  *wp++ = htons((RAMBase + RAMSize - 0x1c) >> 16);
1574                  *wp = htons((RAMBase + RAMSize - 0x1c) & 0xffff);
# Line 1457 | Line 1576 | static bool patch_68k(void)
1576                  static const uint8 run_diags_dat[] = {0x74, 0x00, 0x2f, 0x0e};
1577                  if ((base = find_rom_data(0xd0, 0xf0, run_diags_dat, sizeof(run_diags_dat))) == 0) return false;
1578                  D(bug("run_diags %08lx\n", base));
1579 <                wp = (uint16 *)(ROM_BASE + base - 6);
1579 >                wp = (uint16 *)(ROMBaseHost + base - 6);
1580                  *wp++ = htons(0x4df9);                  // lea  xxx,a6
1581                  *wp++ = htons((RAMBase + RAMSize - 0x1c) >> 16);
1582                  *wp = htons((RAMBase + RAMSize - 0x1c) & 0xffff);
# Line 1467 | Line 1586 | static bool patch_68k(void)
1586          static const uint8 nvram1_dat[] = {0x48, 0xe7, 0x01, 0x0e, 0x24, 0x68, 0x00, 0x08, 0x08, 0x83, 0x00, 0x1f};
1587          if ((base = find_rom_data(0x7000, 0xc000, nvram1_dat, sizeof(nvram1_dat))) == 0) return false;
1588          D(bug("nvram1 %08lx\n", base));
1589 <        wp = (uint16 *)(ROM_BASE + base);
1589 >        wp = (uint16 *)(ROMBaseHost + base);
1590          *wp++ = htons(M68K_EMUL_OP_XPRAM1);
1591          *wp = htons(M68K_RTS);
1592  
# Line 1475 | Line 1594 | static bool patch_68k(void)
1594                  static const uint8 nvram2_dat[] = {0x48, 0xe7, 0x1c, 0xe0, 0x4f, 0xef, 0xff, 0xb4};
1595                  if ((base = find_rom_data(0xa000, 0xd000, nvram2_dat, sizeof(nvram2_dat))) == 0) return false;
1596                  D(bug("nvram2 %08lx\n", base));
1597 <                wp = (uint16 *)(ROM_BASE + base);
1597 >                wp = (uint16 *)(ROMBaseHost + base);
1598                  *wp++ = htons(M68K_EMUL_OP_XPRAM2);
1599                  *wp = htons(0x4ed3);                    // jmp  (a3)
1600  
1601                  static const uint8 nvram3_dat[] = {0x48, 0xe7, 0xdc, 0xe0, 0x4f, 0xef, 0xff, 0xb4};
1602                  if ((base = find_rom_data(0xa000, 0xd000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1603                  D(bug("nvram3 %08lx\n", base));
1604 <                wp = (uint16 *)(ROM_BASE + base);
1604 >                wp = (uint16 *)(ROMBaseHost + base);
1605                  *wp++ = htons(M68K_EMUL_OP_XPRAM3);
1606                  *wp = htons(0x4ed3);                    // jmp  (a3)
1607  
1608                  static const uint8 nvram4_dat[] = {0x4e, 0x56, 0xff, 0xa8, 0x48, 0xe7, 0x1f, 0x38, 0x16, 0x2e, 0x00, 0x13};
1609                  if ((base = find_rom_data(0xa000, 0xd000, nvram4_dat, sizeof(nvram4_dat))) == 0) return false;
1610                  D(bug("nvram4 %08lx\n", base));
1611 <                wp = (uint16 *)(ROM_BASE + base + 16);
1611 >                wp = (uint16 *)(ROMBaseHost + base + 16);
1612                  *wp++ = htons(0x1a2e);                  // move.b       ($000f,a6),d5
1613                  *wp++ = htons(0x000f);
1614                  *wp++ = htons(M68K_EMUL_OP_NVRAM3);
# Line 1502 | Line 1621 | static bool patch_68k(void)
1621                  static const uint8 nvram5_dat[] = {0x0c, 0x80, 0x03, 0x00, 0x00, 0x00, 0x66, 0x0a, 0x70, 0x00, 0x21, 0xf8, 0x02, 0x0c, 0x01, 0xe4};
1622                  if ((base = find_rom_data(0xa000, 0xd000, nvram5_dat, sizeof(nvram5_dat))) == 0) return false;
1623                  D(bug("nvram5 %08lx\n", base));
1624 <                wp = (uint16 *)(ROM_BASE + base + 6);
1624 >                wp = (uint16 *)(ROMBaseHost + base + 6);
1625                  *wp = htons(M68K_NOP);
1626  
1627                  static const uint8 nvram6_dat[] = {0x2f, 0x0a, 0x24, 0x48, 0x4f, 0xef, 0xff, 0xa0, 0x20, 0x0f};
1628                  if ((base = find_rom_data(0x9000, 0xb000, nvram6_dat, sizeof(nvram6_dat))) == 0) return false;
1629                  D(bug("nvram6 %08lx\n", base));
1630 <                wp = (uint16 *)(ROM_BASE + base);
1630 >                wp = (uint16 *)(ROMBaseHost + base);
1631                  *wp++ = htons(0x7000);                  // moveq        #0,d0
1632                  *wp++ = htons(0x2080);                  // move.l       d0,(a0)
1633                  *wp++ = htons(0x4228);                  // clr.b        4(a0)
# Line 1519 | Line 1638 | static bool patch_68k(void)
1638                  base = find_rom_data(0x9000, 0xb000, nvram7_dat, sizeof(nvram7_dat));
1639                  if (base) {
1640                          D(bug("nvram7 %08lx\n", base));
1641 <                        wp = (uint16 *)(ROM_BASE + base + 12);
1641 >                        wp = (uint16 *)(ROMBaseHost + base + 12);
1642                          *wp = htons(M68K_RTS);
1643                  }
1644          } else {
1645                  static const uint8 nvram2_dat[] = {0x4e, 0xd6, 0x06, 0x41, 0x13, 0x00};
1646                  if ((base = find_rom_data(0x7000, 0xb000, nvram2_dat, sizeof(nvram2_dat))) == 0) return false;
1647                  D(bug("nvram2 %08lx\n", base));
1648 <                wp = (uint16 *)(ROM_BASE + base + 2);
1648 >                wp = (uint16 *)(ROMBaseHost + base + 2);
1649                  *wp++ = htons(M68K_EMUL_OP_XPRAM2);
1650                  *wp = htons(0x4ed3);                    // jmp  (a3)
1651  
1652 <                static const uint32 nvram3_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0};
1653 <                wp = (uint16 *)(ROM_BASE + nvram3_loc[ROMType]);
1652 >                static const uint8 nvram3_dat[] = {0x4e, 0xd3, 0x06, 0x41, 0x13, 0x00};
1653 >                if ((base = find_rom_data(0x7000, 0xb000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1654 >                D(bug("nvram3 %08lx\n", base));
1655 >                wp = (uint16 *)(ROMBaseHost + base + 2);
1656 >                *wp++ = htons(M68K_EMUL_OP_XPRAM3);
1657 >                *wp = htons(0x4ed3);                    // jmp  (a3)
1658 >
1659 >                static const uint32 nvram4_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0x538d0, 0};
1660 >                wp = (uint16 *)(ROMBaseHost + nvram4_loc[ROMType]);
1661                  *wp++ = htons(0x202f);                  // move.l       4(sp),d0
1662                  *wp++ = htons(0x0004);
1663                  *wp++ = htons(M68K_EMUL_OP_NVRAM1);
# Line 1544 | Line 1670 | static bool patch_68k(void)
1670                          *wp = htons(0x0004);
1671                  }
1672  
1673 <                static const uint32 nvram4_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0};
1674 <                wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1673 >                static const uint32 nvram5_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0x53a20, 0};
1674 >                wp = (uint16 *)(ROMBaseHost + nvram5_loc[ROMType]);
1675                  if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GAZELLE) {
1676                          *wp++ = htons(0x202f);                  // move.l       4(sp),d0
1677                          *wp++ = htons(0x0004);
# Line 1568 | Line 1694 | static bool patch_68k(void)
1694          static const uint8 mem_top_dat[] = {0x2c, 0x6c, 0xff, 0xec, 0x2a, 0x4c, 0xdb, 0xec, 0xff, 0xf4};
1695          if ((base = find_rom_data(0x120, 0x180, mem_top_dat, sizeof(mem_top_dat))) == 0) return false;
1696          D(bug("mem_top %08lx\n", base));
1697 <        wp = (uint16 *)(ROM_BASE + base);
1697 >        wp = (uint16 *)(ROMBaseHost + base);
1698          *wp++ = htons(M68K_EMUL_OP_FIX_MEMTOP);
1699          *wp = htons(M68K_NOP);
1700  
1701          // Don't initialize SCC (via 0x1ac)
1702 <        static const uint8 scc_init_dat[] = {0x48, 0xe7, 0x38, 0xfe};
1703 <        if ((base = find_rom_data(0x190, 0x1f0, scc_init_dat, sizeof(scc_init_dat))) == 0) return false;
1702 >        static const uint8 scc_init_caller_dat[] = {0x21, 0xce, 0x01, 0x08, 0x22, 0x78, 0x0d, 0xd8};
1703 >        if ((base = find_rom_data(0x180, 0x1f0, scc_init_caller_dat, sizeof(scc_init_caller_dat))) == 0) return false;
1704 >        D(bug("scc_init_caller %08lx\n", base + 12));
1705 >        wp = (uint16 *)(ROMBaseHost + base + 12);
1706 >        loc = ntohs(wp[1]) + ((uintptr)wp - (uintptr)ROMBaseHost) + 2;
1707 >        static const uint8 scc_init_dat[] = {0x20, 0x78, 0x01, 0xdc, 0x22, 0x78, 0x01, 0xd8};
1708 >        if ((base = find_rom_data(loc, loc + 0x80, scc_init_dat, sizeof(scc_init_dat))) == 0) return false;
1709          D(bug("scc_init %08lx\n", base));
1710 <        wp = (uint16 *)(ROM_BASE + base - 2);
1580 <        wp = (uint16 *)(ROM_BASE + ntohs(*wp) + base - 2);
1710 >        wp = (uint16 *)(ROMBaseHost + base);
1711          *wp++ = htons(M68K_EMUL_OP_RESET);
1712          *wp = htons(M68K_RTS);
1713  
# Line 1585 | Line 1715 | static bool patch_68k(void)
1715          static const uint8 ext_cache_dat[] = {0x4e, 0x7b, 0x00, 0x02};
1716          if ((base = find_rom_data(0x1d0, 0x230, ext_cache_dat, sizeof(ext_cache_dat))) == 0) return false;
1717          D(bug("ext_cache %08lx\n", base));
1718 <        lp = (uint32 *)(ROM_BASE + base + 6);
1719 <        wp = (uint16 *)(ROM_BASE + ntohl(*lp) + base + 6);
1718 >        lp = (uint32 *)(ROMBaseHost + base + 6);
1719 >        wp = (uint16 *)(ROMBaseHost + ntohl(*lp) + base + 6);
1720          *wp = htons(M68K_RTS);
1721 <        lp = (uint32 *)(ROM_BASE + base + 12);
1722 <        wp = (uint16 *)(ROM_BASE + ntohl(*lp) + base + 12);
1721 >        lp = (uint32 *)(ROMBaseHost + base + 12);
1722 >        wp = (uint16 *)(ROMBaseHost + ntohl(*lp) + base + 12);
1723          *wp = htons(M68K_RTS);
1724  
1725          // Fake CPU speed test (SetupTimeK)
1726          static const uint8 timek_dat[] = {0x0c, 0x38, 0x00, 0x04, 0x01, 0x2f, 0x6d, 0x3c};
1727          if ((base = find_rom_data(0x400, 0x500, timek_dat, sizeof(timek_dat))) == 0) return false;
1728          D(bug("timek %08lx\n", base));
1729 <        wp = (uint16 *)(ROM_BASE + base);
1729 >        wp = (uint16 *)(ROMBaseHost + base);
1730          *wp++ = htons(0x31fc);                  // move.w       #xxx,TimeDBRA
1731          *wp++ = htons(100);
1732          *wp++ = htons(0x0d00);
# Line 1615 | Line 1745 | static bool patch_68k(void)
1745          static const uint8 jump_tab_dat[] = {0x41, 0xfa, 0x00, 0x0e, 0x21, 0xc8, 0x20, 0x10, 0x4e, 0x75};
1746          if ((base = find_rom_data(0x3000, 0x6000, jump_tab_dat, sizeof(jump_tab_dat))) == 0) return false;
1747          D(bug("jump_tab %08lx\n", base));
1748 <        lp = (uint32 *)(ROM_BASE + base + 16);
1748 >        lp = (uint32 *)(ROMBaseHost + base + 16);
1749          for (;;) {
1750 <                D(bug(" %08lx\n", (uint32)lp - ROM_BASE));
1750 >                D(bug(" %08lx\n", (uintptr)lp - (uintptr)ROMBaseHost));
1751                  while ((ntohl(*lp) & 0xff000000) == 0xff000000) {
1752                          *lp = htonl((ntohl(*lp) & (ROM_SIZE-1)) + ROM_BASE);
1753                          lp++;
# Line 1632 | Line 1762 | static bool patch_68k(void)
1762          static const uint8 sys_zone_dat[] = {0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x40, 0x00};
1763          if ((base = find_rom_data(0x600, 0x900, sys_zone_dat, sizeof(sys_zone_dat))) == 0) return false;
1764          D(bug("sys_zone %08lx\n", base));
1765 <        lp = (uint32 *)(ROM_BASE + base);
1765 >        lp = (uint32 *)(ROMBaseHost + base);
1766          *lp++ = htonl(RAMBase ? RAMBase : 0x3000);
1767          *lp = htonl(RAMBase ? RAMBase + 0x1800 : 0x4800);
1768  
# Line 1641 | Line 1771 | static bool patch_68k(void)
1771          static const uint8 boot_stack_dat[] = {0x08, 0x38, 0x00, 0x06, 0x24, 0x0b};
1772          if ((base = find_rom_data(0x580, 0x800, boot_stack_dat, sizeof(boot_stack_dat))) == 0) return false;
1773          D(bug("boot_stack %08lx\n", base));
1774 <        wp = (uint16 *)(ROM_BASE + base);
1774 >        wp = (uint16 *)(ROMBaseHost + base);
1775          *wp++ = htons(0x207c);                  // move.l       #RAMBase+0x3ffffe,a0
1776          *wp++ = htons((RAMBase + 0x3ffffe) >> 16);
1777          *wp++ = htons((RAMBase + 0x3ffffe) & 0xffff);
# Line 1652 | Line 1782 | static bool patch_68k(void)
1782          static const uint8 page_size_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x10};
1783          if ((base = find_rom_data(0xb000, 0x12000, page_size_dat, sizeof(page_size_dat))) == 0) return false;
1784          D(bug("page_size %08lx\n", base));
1785 <        wp = (uint16 *)(ROM_BASE + base);
1785 >        wp = (uint16 *)(ROMBaseHost + base);
1786          *wp++ = htons(0x203c);                  // move.l       #$1000,d0
1787          *wp++ = htons(0);
1788          *wp++ = htons(0x1000);
1789          *wp++ = htons(M68K_NOP);
1790          *wp = htons(M68K_NOP);
1791  
1792 <        // Gestalt PowerPC page size, RAM size (InitGestalt, via 0x25c)
1792 >        // Gestalt PowerPC page size, CPU type, RAM size (InitGestalt, via 0x25c)
1793          static const uint8 page_size2_dat[] = {0x26, 0x79, 0x5f, 0xff, 0xef, 0xd8, 0x25, 0x6b, 0x00, 0x10, 0x00, 0x1e};
1794          if ((base = find_rom_data(0x50000, 0x70000, page_size2_dat, sizeof(page_size2_dat))) == 0) return false;
1795          D(bug("page_size2 %08lx\n", base));
1796 <        wp = (uint16 *)(ROM_BASE + base);
1796 >        wp = (uint16 *)(ROMBaseHost + base);
1797          *wp++ = htons(0x257c);                  // move.l       #$1000,$1e(a2)
1798          *wp++ = htons(0);
1799          *wp++ = htons(0x1000);
1800          *wp++ = htons(0x001e);
1801          *wp++ = htons(0x157c);                  // move.b       #PVR,$1d(a2)
1802 <        *wp++ = htons(PVR >> 16);
1802 >        uint32 cput = (PVR >> 16);
1803 >        if (cput == 0x7000)
1804 >                cput |= 0x20;
1805 >        else if (cput >= 0x8000 && cput <= 0x8002)
1806 >                cput |= 0x10;
1807 >        cput &= 0xff;
1808 >        *wp++ = htons(cput);
1809          *wp++ = htons(0x001d);
1810          *wp++ = htons(0x263c);                  // move.l       #RAMSize,d3
1811          *wp++ = htons(RAMSize >> 16);
# Line 1678 | Line 1814 | static bool patch_68k(void)
1814          *wp++ = htons(M68K_NOP);
1815          *wp = htons(M68K_NOP);
1816          if (ROMType == ROMTYPE_NEWWORLD)
1817 <                wp = (uint16 *)(ROM_BASE + base + 0x4a);
1817 >                wp = (uint16 *)(ROMBaseHost + base + 0x4a);
1818          else
1819 <                wp = (uint16 *)(ROM_BASE + base + 0x28);
1819 >                wp = (uint16 *)(ROMBaseHost + base + 0x28);
1820          *wp++ = htons(M68K_NOP);
1821          *wp = htons(M68K_NOP);
1822  
1823          // Gestalt CPU/bus clock speed (InitGestalt, via 0x25c)
1824          if (ROMType == ROMTYPE_ZANZIBAR) {
1825 <                wp = (uint16 *)(ROM_BASE + 0x5d87a);
1825 >                wp = (uint16 *)(ROMBaseHost + 0x5d87a);
1826                  *wp++ = htons(0x203c);                  // move.l       #Hz,d0
1827                  *wp++ = htons(BusClockSpeed >> 16);
1828                  *wp++ = htons(BusClockSpeed & 0xffff);
1829                  *wp++ = htons(M68K_NOP);
1830                  *wp = htons(M68K_NOP);
1831 <                wp = (uint16 *)(ROM_BASE + 0x5d888);
1831 >                wp = (uint16 *)(ROMBaseHost + 0x5d888);
1832                  *wp++ = htons(0x203c);                  // move.l       #Hz,d0
1833                  *wp++ = htons(CPUClockSpeed >> 16);
1834                  *wp++ = htons(CPUClockSpeed & 0xffff);
# Line 1705 | Line 1841 | static bool patch_68k(void)
1841                  static const uint8 gc_mask_dat[] = {0x83, 0xa8, 0x00, 0x24, 0x4e, 0x71};
1842                  if ((base = find_rom_data(0x13000, 0x20000, gc_mask_dat, sizeof(gc_mask_dat))) == 0) return false;
1843                  D(bug("gc_mask %08lx\n", base));
1844 <                wp = (uint16 *)(ROM_BASE + base);
1844 >                wp = (uint16 *)(ROMBaseHost + base);
1845                  *wp++ = htons(M68K_NOP);
1846                  *wp = htons(M68K_NOP);
1847 <                wp = (uint16 *)(ROM_BASE + base + 0x40);
1847 >                wp = (uint16 *)(ROMBaseHost + base + 0x40);
1848                  *wp++ = htons(M68K_NOP);
1849                  *wp = htons(M68K_NOP);
1850 <                wp = (uint16 *)(ROM_BASE + base + 0x78);
1850 >                wp = (uint16 *)(ROMBaseHost + base + 0x78);
1851                  *wp++ = htons(M68K_NOP);
1852                  *wp = htons(M68K_NOP);
1853 <                wp = (uint16 *)(ROM_BASE + base + 0x96);
1853 >                wp = (uint16 *)(ROMBaseHost + base + 0x96);
1854                  *wp++ = htons(M68K_NOP);
1855                  *wp = htons(M68K_NOP);
1856  
1857                  static const uint8 gc_mask2_dat[] = {0x02, 0xa8, 0x00, 0x00, 0x00, 0x80, 0x00, 0x24};
1858                  if ((base = find_rom_data(0x13000, 0x20000, gc_mask2_dat, sizeof(gc_mask2_dat))) == 0) return false;
1859                  D(bug("gc_mask2 %08lx\n", base));
1860 <                wp = (uint16 *)(ROM_BASE + base);
1860 >                wp = (uint16 *)(ROMBaseHost + base);
1861 >                if (ROMType == ROMTYPE_GOSSAMER) {
1862 >                        *wp++ = htons(M68K_NOP);
1863 >                        *wp++ = htons(M68K_NOP);
1864 >                        *wp++ = htons(M68K_NOP);
1865 >                        *wp++ = htons(M68K_NOP);
1866 >                }
1867                  for (int i=0; i<5; i++) {
1868                          *wp++ = htons(M68K_NOP);
1869                          *wp++ = htons(M68K_NOP);
# Line 1729 | Line 1871 | static bool patch_68k(void)
1871                          *wp++ = htons(M68K_NOP);
1872                          wp += 2;
1873                  }
1874 <                if (ROMType == ROMTYPE_ZANZIBAR) {
1874 >                if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) {
1875                          for (int i=0; i<6; i++) {
1876                                  *wp++ = htons(M68K_NOP);
1877                                  *wp++ = htons(M68K_NOP);
# Line 1744 | Line 1886 | static bool patch_68k(void)
1886          static const uint8 cuda_init_dat[] = {0x08, 0xa9, 0x00, 0x04, 0x16, 0x00, 0x4e, 0x71, 0x13, 0x7c, 0x00, 0x84, 0x1c, 0x00, 0x4e, 0x71};
1887          if ((base = find_rom_data(0xa000, 0x12000, cuda_init_dat, sizeof(cuda_init_dat))) == 0) return false;
1888          D(bug("cuda_init %08lx\n", base));
1889 <        wp = (uint16 *)(ROM_BASE + base);
1889 >        wp = (uint16 *)(ROMBaseHost + base);
1890          *wp++ = htons(M68K_NOP);
1891          *wp++ = htons(M68K_NOP);
1892          *wp++ = htons(M68K_NOP);
# Line 1757 | Line 1899 | static bool patch_68k(void)
1899          static const uint8 cpu_speed_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x04, 0x4c, 0x7c};
1900          if ((base = find_rom_data(0x6000, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) == 0) return false;
1901          D(bug("cpu_speed %08lx\n", base));
1902 <        wp = (uint16 *)(ROM_BASE + base);
1902 >        wp = (uint16 *)(ROMBaseHost + base);
1903          *wp++ = htons(0x203c);                  // move.l       #(MHz<<16)|MHz,d0
1904          *wp++ = htons(CPUClockSpeed / 1000000);
1905          *wp++ = htons(CPUClockSpeed / 1000000);
1906          *wp = htons(M68K_RTS);
1907          if ((base = find_rom_data(base, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) != 0) {
1908                  D(bug("cpu_speed2 %08lx\n", base));
1909 <                wp = (uint16 *)(ROM_BASE + base);
1909 >                wp = (uint16 *)(ROMBaseHost + base);
1910                  *wp++ = htons(0x203c);                  // move.l       #(MHz<<16)|MHz,d0
1911                  *wp++ = htons(CPUClockSpeed / 1000000);
1912                  *wp++ = htons(CPUClockSpeed / 1000000);
# Line 1775 | Line 1917 | static bool patch_68k(void)
1917          static const uint8 time_via_dat[] = {0x40, 0xe7, 0x00, 0x7c, 0x07, 0x00, 0x28, 0x78, 0x01, 0xd4, 0x43, 0xec, 0x10, 0x00};
1918          if ((base = find_rom_data(0x30000, 0x40000, time_via_dat, sizeof(time_via_dat))) == 0) return false;
1919          D(bug("time_via %08lx\n", base));
1920 <        wp = (uint16 *)(ROM_BASE + base);
1920 >        wp = (uint16 *)(ROMBaseHost + base);
1921          *wp++ = htons(0x4cdf);                  // movem.l      (sp)+,d0-d5/a0-a4
1922          *wp++ = htons(0x1f3f);
1923          *wp = htons(M68K_RTS);
# Line 1785 | Line 1927 | static bool patch_68k(void)
1927          static const uint8 open_firmware_dat[] = {0x2f, 0x79, 0xff, 0x80, 0x00, 0x00, 0x00, 0xfc};
1928          if ((base = find_rom_data(0x48000, 0x58000, open_firmware_dat, sizeof(open_firmware_dat))) == 0) return false;
1929          D(bug("open_firmware %08lx\n", base));
1930 <        wp = (uint16 *)(ROM_BASE + base);
1930 >        wp = (uint16 *)(ROMBaseHost + base);
1931          *wp++ = htons(0x2f7c);                  // move.l               #deadbeef,0xfc(a7)
1932          *wp++ = htons(0xdead);
1933          *wp++ = htons(0xbeef);
1934          *wp = htons(0x00fc);
1935 <        wp = (uint16 *)(ROM_BASE + base + 0x1a);
1935 >        wp = (uint16 *)(ROMBaseHost + base + 0x1a);
1936          *wp++ = htons(M68K_NOP);                // (FE03 opcode, tries to jump to 0xdeadbeef)
1937          *wp = htons(M68K_NOP);
1938  
# Line 1798 | Line 1940 | static bool patch_68k(void)
1940          static const uint8 ext_cache2_dat[] = {0x4f, 0xef, 0xff, 0xec, 0x20, 0x4f, 0x10, 0xbc, 0x00, 0x01, 0x11, 0x7c, 0x00, 0x1b};
1941          if ((base = find_rom_data(0x13000, 0x20000, ext_cache2_dat, sizeof(ext_cache2_dat))) == 0) return false;
1942          D(bug("ext_cache2 %08lx\n", base));
1943 <        wp = (uint16 *)(ROM_BASE + base);
1943 >        wp = (uint16 *)(ROMBaseHost + base);
1944          *wp = htons(M68K_RTS);
1945  
1946          // Don't install Time Manager task for 60Hz interrupt (Enable60HzInts, via 0x2b8)
1947 <        if (ROMType == ROMTYPE_NEWWORLD) {
1947 >        if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
1948                  static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9};
1949 <                if ((base = find_rom_data(0x2e0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1949 >                if ((base = find_rom_data(0x2a0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1950                  D(bug("tm_task %08lx\n", base));
1951 <                wp = (uint16 *)(ROM_BASE + base + 28);
1951 >                wp = (uint16 *)(ROMBaseHost + base + 28);
1952                  *wp++ = htons(M68K_NOP);
1953                  *wp++ = htons(M68K_NOP);
1954                  *wp++ = htons(M68K_NOP);
# Line 1817 | Line 1959 | static bool patch_68k(void)
1959                  static const uint8 tm_task_dat[] = {0x20, 0x3c, 0x73, 0x79, 0x73, 0x61};
1960                  if ((base = find_rom_data(0x280, 0x300, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1961                  D(bug("tm_task %08lx\n", base));
1962 <                wp = (uint16 *)(ROM_BASE + base - 6);
1962 >                wp = (uint16 *)(ROMBaseHost + base - 6);
1963                  *wp++ = htons(M68K_NOP);
1964                  *wp++ = htons(M68K_NOP);
1965                  *wp = htons(M68K_NOP);
1966          }
1967  
1968          // Don't read PVR from 0x5fffef80 in DriverServicesLib (via 0x316)
1969 <        if (ROMType != ROMTYPE_NEWWORLD) {
1969 >        if (ROMType != ROMTYPE_NEWWORLD && ROMType != ROMTYPE_GOSSAMER) {
1970                  uint32 dsl_offset = find_rom_resource(FOURCC('n','l','i','b'), -16401);
1971                  if (ROMType == ROMTYPE_ZANZIBAR) {
1972                          static const uint8 dsl_pvr_dat[] = {0x40, 0x82, 0x00, 0x40, 0x38, 0x60, 0xef, 0x80, 0x3c, 0x63, 0x60, 0x00, 0x80, 0x83, 0x00, 0x00, 0x54, 0x84, 0x84, 0x3e};
# Line 1834 | Line 1976 | static bool patch_68k(void)
1976                          if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_pvr_dat, sizeof(dsl_pvr_dat))) == 0) return false;
1977                  }
1978                  D(bug("dsl_pvr %08lx\n", base));
1979 <                lp = (uint32 *)(ROM_BASE + base + 12);
1979 >                lp = (uint32 *)(ROMBaseHost + base + 12);
1980                  *lp = htonl(0x3c800000 | (PVR >> 16));  // lis  r4,PVR
1981  
1982                  // Don't read bus clock from 0x5fffef88 in DriverServicesLib (via 0x316)
# Line 1842 | Line 1984 | static bool patch_68k(void)
1984                          static const uint8 dsl_bus_dat[] = {0x81, 0x07, 0x00, 0x00, 0x39, 0x20, 0x42, 0x40, 0x81, 0x62, 0xff, 0x20};
1985                          if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_bus_dat, sizeof(dsl_bus_dat))) == 0) return false;
1986                          D(bug("dsl_bus %08lx\n", base));
1987 <                        lp = (uint32 *)(ROM_BASE + base);
1987 >                        lp = (uint32 *)(ROMBaseHost + base);
1988                          *lp = htonl(0x81000000 + XLM_BUS_CLOCK);        // lwz  r8,(bus clock speed)
1989                  } else {
1990                          static const uint8 dsl_bus_dat[] = {0x80, 0x83, 0xef, 0xe8, 0x80, 0x62, 0x00, 0x10, 0x7c, 0x04, 0x03, 0x96};
1991                          if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_bus_dat, sizeof(dsl_bus_dat))) == 0) return false;
1992                          D(bug("dsl_bus %08lx\n", base));
1993 <                        lp = (uint32 *)(ROM_BASE + base);
1993 >                        lp = (uint32 *)(ROMBaseHost + base);
1994                          *lp = htonl(0x80800000 + XLM_BUS_CLOCK);        // lwz  r4,(bus clock speed)
1995                  }
1996          }
1997  
1998          // Don't open InterruptTreeTNT in MotherBoardHAL init in DriverServicesLib init
1999          if (ROMType == ROMTYPE_ZANZIBAR) {
2000 <                lp = (uint32 *)(ROM_BASE + find_rom_resource(FOURCC('n','l','i','b'), -16408) + 0x16c);
2000 >                lp = (uint32 *)(ROMBaseHost + find_rom_resource(FOURCC('n','l','i','b'), -16408) + 0x16c);
2001                  *lp = htonl(0x38600000);                // li   r3,0
2002          }
2003  
2004 +        // FIXME: Fake reading from [HpChk]+4 (the callchain reports some function from DriverServicesLib)
2005 +        if (1) {
2006 +                uint32 hpchk_offset = find_rom_resource(FOURCC('n','l','i','b'), 10);
2007 +                static const uint8 hpchk_dat[] = {0x80, 0x80, 0x03, 0x16, 0x94, 0x21, 0xff, 0xb0, 0x83, 0xc4, 0x00, 0x04};
2008 +                if ((base = find_rom_data(hpchk_offset, hpchk_offset + 0x3000, hpchk_dat, sizeof(hpchk_dat))) == 0) return false;
2009 +                D(bug("hpchk %08lx\n", base));
2010 +                lp = (uint32 *)(ROMBaseHost + base);
2011 +                *lp = htonl(0x80800000 + XLM_ZERO_PAGE);                // lwz  r4,(zero page)
2012 +        }
2013 +
2014          // Patch Name Registry
2015          static const uint8 name_reg_dat[] = {0x70, 0xff, 0xab, 0xeb};
2016          if ((base = find_rom_data(0x300, 0x380, name_reg_dat, sizeof(name_reg_dat))) == 0) return false;
2017          D(bug("name_reg %08lx\n", base));
2018 <        wp = (uint16 *)(ROM_BASE + base);
2018 >        wp = (uint16 *)(ROMBaseHost + base);
2019          *wp = htons(M68K_EMUL_OP_NAME_REGISTRY);
2020  
2021   #if DISABLE_SCSI
# Line 1875 | Line 2027 | static bool patch_68k(void)
2027                  if ((base = find_rom_data(0x1c000, 0x28000, scsi_mgr_b_dat, sizeof(scsi_mgr_b_dat))) == 0) return false;
2028          }
2029          D(bug("scsi_mgr %08lx\n", base));
2030 <        wp = (uint16 *)(ROM_BASE + base);
2030 >        wp = (uint16 *)(ROMBaseHost + base);
2031          *wp++ = htons(0x21fc);                  // move.l       #xxx,0x624      (SCSIAtomic)
2032          *wp++ = htons((ROM_BASE + base + 18) >> 16);
2033          *wp++ = htons((ROM_BASE + base + 18) & 0xffff);
# Line 1889 | Line 2041 | static bool patch_68k(void)
2041          *wp++ = htons(M68K_RTS);
2042          *wp++ = htons(M68K_EMUL_OP_SCSI_DISPATCH);
2043          *wp = htons(0x4ed0);                    // jmp          (a0)
2044 <        wp = (uint16 *)(ROM_BASE + base + 0x20);
2044 >        wp = (uint16 *)(ROMBaseHost + base + 0x20);
2045          *wp++ = htons(0x7000);                  // moveq        #0,d0
2046          *wp = htons(M68K_RTS);
2047   #endif
# Line 1901 | Line 2053 | static bool patch_68k(void)
2053                  static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
2054                  if ((base = find_rom_data(0x1f500, 0x1f600, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
2055                          D(bug("scsi_var %08lx\n", base));
2056 <                        wp = (uint16 *)(ROM_BASE + base + 12);
2056 >                        wp = (uint16 *)(ROMBaseHost + base + 12);
2057                          *wp = htons(0x6000);    // bra
2058                  }
2059  
2060                  static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x58, 0x48, 0xe7, 0x1f, 0x38};
2061                  if ((base = find_rom_data(0x1f700, 0x1f800, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
2062                          D(bug("scsi_var2 %08lx\n", base));
2063 <                        wp = (uint16 *)(ROM_BASE + base);
2063 >                        wp = (uint16 *)(ROMBaseHost + base);
2064 >                        *wp++ = htons(0x7000);  // moveq #0,d0
2065 >                        *wp = htons(M68K_RTS);
2066 >                }
2067 >        }
2068 >        else if (ROMType == ROMTYPE_GOSSAMER) {
2069 >                static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
2070 >                if ((base = find_rom_data(0x1d700, 0x1d800, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
2071 >                        D(bug("scsi_var %08lx\n", base));
2072 >                        wp = (uint16 *)(ROMBaseHost + base + 12);
2073 >                        *wp = htons(0x6000);    // bra
2074 >                }
2075 >
2076 >                static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x5a, 0x48, 0xe7, 0x1f, 0x38};
2077 >                if ((base = find_rom_data(0x1d900, 0x1da00, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
2078 >                        D(bug("scsi_var2 %08lx\n", base));
2079 >                        wp = (uint16 *)(ROMBaseHost + base);
2080                          *wp++ = htons(0x7000);  // moveq #0,d0
2081 <                        *wp = htons(M68K_RTS);  // bra
2081 >                        *wp = htons(M68K_RTS);
2082                  }
2083          }
2084   #endif
# Line 1919 | Line 2087 | static bool patch_68k(void)
2087          static const uint8 adb_init_dat[] = {0x08, 0x2b, 0x00, 0x05, 0x01, 0x5d, 0x66, 0xf8};
2088          if ((base = find_rom_data(0x31000, 0x3d000, adb_init_dat, sizeof(adb_init_dat))) == 0) return false;
2089          D(bug("adb_init %08lx\n", base));
2090 <        wp = (uint16 *)(ROM_BASE + base + 6);
2090 >        wp = (uint16 *)(ROMBaseHost + base + 6);
2091          *wp = htons(M68K_NOP);
2092  
2093          // Modify check in InitResources() so that addresses >0x80000000 work
2094          static const uint8 init_res_dat[] = {0x4a, 0xb8, 0x0a, 0x50, 0x6e, 0x20};
2095          if ((base = find_rom_data(0x78000, 0x8c000, init_res_dat, sizeof(init_res_dat))) == 0) return false;
2096          D(bug("init_res %08lx\n", base));
2097 <        bp = (uint8 *)(ROM_BASE + base + 4);
2097 >        bp = (uint8 *)(ROMBaseHost + base + 4);
2098          *bp = 0x66;
2099  
2100          // Modify vCheckLoad() so that we can patch resources (68k Resource Manager)
2101          static const uint8 check_load_dat[] = {0x20, 0x78, 0x07, 0xf0, 0x4e, 0xd0};
2102          if ((base = find_rom_data(0x78000, 0x8c000, check_load_dat, sizeof(check_load_dat))) == 0) return false;
2103          D(bug("check_load %08lx\n", base));
2104 <        wp = (uint16 *)(ROM_BASE + base);
2104 >        wp = (uint16 *)(ROMBaseHost + base);
2105          *wp++ = htons(M68K_JMP);
2106          *wp++ = htons((ROM_BASE + CHECK_LOAD_PATCH_SPACE) >> 16);
2107          *wp = htons((ROM_BASE + CHECK_LOAD_PATCH_SPACE) & 0xffff);
2108 <        wp = (uint16 *)(ROM_BASE + CHECK_LOAD_PATCH_SPACE);
2108 >        wp = (uint16 *)(ROMBaseHost + CHECK_LOAD_PATCH_SPACE);
2109          *wp++ = htons(0x2f03);                  // move.l       d3,-(a7)
2110          *wp++ = htons(0x2078);                  // move.l       $07f0,a0
2111          *wp++ = htons(0x07f0);
# Line 1953 | Line 2121 | static bool patch_68k(void)
2121                  sony_offset = find_rom_resource(FOURCC('n','d','r','v'), -20196);               // NewWorld 1.6 has "PCFloppy" ndrv
2122                  if (sony_offset == 0)
2123                          return false;
2124 <                lp = (uint32 *)(ROM_BASE + rsrc_ptr + 8);
2124 >                lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 8);
2125                  *lp = htonl(FOURCC('D','R','V','R'));
2126 <                wp = (uint16 *)(ROM_BASE + rsrc_ptr + 12);
2126 >                wp = (uint16 *)(ROMBaseHost + rsrc_ptr + 12);
2127                  *wp = htons(4);
2128          }
2129          D(bug("sony_offset %08lx\n", sony_offset));
2130 <        memcpy((void *)(ROM_BASE + sony_offset), sony_driver, sizeof(sony_driver));
2130 >        memcpy((void *)(ROMBaseHost + sony_offset), sony_driver, sizeof(sony_driver));
2131  
2132          // Install .Disk and .AppleCD drivers
2133 <        memcpy((void *)(ROM_BASE + sony_offset + 0x100), disk_driver, sizeof(disk_driver));
2134 <        memcpy((void *)(ROM_BASE + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2133 >        memcpy((void *)(ROMBaseHost + sony_offset + 0x100), disk_driver, sizeof(disk_driver));
2134 >        memcpy((void *)(ROMBaseHost + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2135  
2136          // Install serial drivers
2137 <        memcpy((void *)(ROM_BASE + sony_offset + 0x300), ain_driver, sizeof(ain_driver));
2138 <        memcpy((void *)(ROM_BASE + sony_offset + 0x400), aout_driver, sizeof(aout_driver));
2139 <        memcpy((void *)(ROM_BASE + sony_offset + 0x500), bin_driver, sizeof(bin_driver));
2140 <        memcpy((void *)(ROM_BASE + sony_offset + 0x600), bout_driver, sizeof(bout_driver));
2137 >        gen_ain_driver( ROM_BASE + sony_offset + 0x300);
2138 >        gen_aout_driver(ROM_BASE + sony_offset + 0x400);
2139 >        gen_bin_driver( ROM_BASE + sony_offset + 0x500);
2140 >        gen_bout_driver(ROM_BASE + sony_offset + 0x600);
2141  
2142          // Copy icons to ROM
2143          SonyDiskIconAddr = ROM_BASE + sony_offset + 0x800;
2144 <        memcpy((void *)(ROM_BASE + sony_offset + 0x800), SonyDiskIcon, sizeof(SonyDiskIcon));
2144 >        memcpy(ROMBaseHost + sony_offset + 0x800, SonyDiskIcon, sizeof(SonyDiskIcon));
2145          SonyDriveIconAddr = ROM_BASE + sony_offset + 0xa00;
2146 <        memcpy((void *)(ROM_BASE + sony_offset + 0xa00), SonyDriveIcon, sizeof(SonyDriveIcon));
2146 >        memcpy(ROMBaseHost + sony_offset + 0xa00, SonyDriveIcon, sizeof(SonyDriveIcon));
2147          DiskIconAddr = ROM_BASE + sony_offset + 0xc00;
2148 <        memcpy((void *)(ROM_BASE + sony_offset + 0xc00), DiskIcon, sizeof(DiskIcon));
2148 >        memcpy(ROMBaseHost + sony_offset + 0xc00, DiskIcon, sizeof(DiskIcon));
2149          CDROMIconAddr = ROM_BASE + sony_offset + 0xe00;
2150 <        memcpy((void *)(ROM_BASE + sony_offset + 0xe00), CDROMIcon, sizeof(CDROMIcon));
2150 >        memcpy(ROMBaseHost + sony_offset + 0xe00, CDROMIcon, sizeof(CDROMIcon));
2151  
2152          // Patch driver install routine
2153          static const uint8 drvr_install_dat[] = {0xa7, 0x1e, 0x21, 0xc8, 0x01, 0x1c, 0x4e, 0x75};
2154          if ((base = find_rom_data(0xb00, 0xd00, drvr_install_dat, sizeof(drvr_install_dat))) == 0) return false;
2155          D(bug("drvr_install %08lx\n", base));
2156 <        wp = (uint16 *)(ROM_BASE + base + 8);
2156 >        wp = (uint16 *)(ROMBaseHost + base + 8);
2157          *wp++ = htons(M68K_EMUL_OP_INSTALL_DRIVERS);
2158          *wp = htons(M68K_RTS);
2159  
2160          // Don't install serial drivers from ROM
2161 <        if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD) {
2162 <                wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('S','E','R','D'), 0));
2161 >        if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
2162 >                wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('S','E','R','D'), 0));
2163                  *wp = htons(M68K_RTS);
2164          } else {
2165 <                wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0xc4);
2165 >                wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0xc4);
2166                  *wp++ = htons(M68K_NOP);
2167                  *wp++ = htons(M68K_NOP);
2168                  *wp++ = htons(M68K_NOP);
2169                  *wp++ = htons(M68K_NOP);
2170                  *wp = htons(0x7000);                    // moveq        #0,d0
2171 <                wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0x8ee);
2171 >                wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0x8ee);
2172                  *wp = htons(M68K_NOP);
2173          }
2174          uint32 nsrd_offset = find_rom_resource(FOURCC('n','s','r','d'), 1);
2175          if (nsrd_offset) {
2176 <                lp = (uint32 *)(ROM_BASE + rsrc_ptr + 8);
2176 >                lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 8);
2177                  *lp = htonl(FOURCC('x','s','r','d'));
2178          }
2179  
2180          // Replace ADBOp()
2181 <        memcpy((void *)(ROM_BASE + find_rom_trap(0xa07c)), adbop_patch, sizeof(adbop_patch));
2181 >        memcpy(ROMBaseHost + find_rom_trap(0xa07c), adbop_patch, sizeof(adbop_patch));
2182  
2183          // Replace Time Manager
2184 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa058));
2184 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa058));
2185          *wp++ = htons(M68K_EMUL_OP_INSTIME);
2186          *wp = htons(M68K_RTS);
2187 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa059));
2187 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa059));
2188          *wp++ = htons(0x40e7);          // move sr,-(sp)
2189          *wp++ = htons(0x007c);          // ori  #$0700,sr
2190          *wp++ = htons(0x0700);
2191          *wp++ = htons(M68K_EMUL_OP_RMVTIME);
2192          *wp++ = htons(0x46df);          // move (sp)+,sr
2193          *wp = htons(M68K_RTS);
2194 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa05a));
2194 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa05a));
2195          *wp++ = htons(0x40e7);          // move sr,-(sp)
2196          *wp++ = htons(0x007c);          // ori  #$0700,sr
2197          *wp++ = htons(0x0700);
2198          *wp++ = htons(M68K_EMUL_OP_PRIMETIME);
2199          *wp++ = htons(0x46df);          // move (sp)+,sr
2200          *wp = htons(M68K_RTS);
2201 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa093));
2201 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa093));
2202          *wp++ = htons(M68K_EMUL_OP_MICROSECONDS);
2203          *wp = htons(M68K_RTS);
2204  
# Line 2038 | Line 2206 | static bool patch_68k(void)
2206          static const uint8 egret_dat[] = {0x2f, 0x30, 0x81, 0xe2, 0x20, 0x10, 0x00, 0x18};
2207          if ((base = find_rom_data(0xa000, 0x10000, egret_dat, sizeof(egret_dat))) == 0) return false;
2208          D(bug("egret %08lx\n", base));
2209 <        wp = (uint16 *)(ROM_BASE + base);
2209 >        wp = (uint16 *)(ROMBaseHost + base);
2210          *wp++ = htons(0x7000);
2211          *wp = htons(M68K_RTS);
2212  
# Line 2046 | Line 2214 | static bool patch_68k(void)
2214          static const uint8 shutdown_dat[] = {0x40, 0xe7, 0x00, 0x7c, 0x07, 0x00, 0x48, 0xe7, 0x3f, 0x00, 0x2c, 0x00, 0x2e, 0x01};
2215          if ((base = find_rom_data(0x30000, 0x40000, shutdown_dat, sizeof(shutdown_dat))) == 0) return false;
2216          D(bug("shutdown %08lx\n", base));
2217 <        wp = (uint16 *)(ROM_BASE + base);
2217 >        wp = (uint16 *)(ROMBaseHost + base);
2218          if (ROMType == ROMTYPE_ZANZIBAR)
2219                  *wp = htons(M68K_RTS);
2220          else if (ntohs(wp[-4]) == 0x61ff)
# Line 2055 | Line 2223 | static bool patch_68k(void)
2223                  wp[-2] = htons(0x6000); // bra
2224  
2225          // Patch PowerOff()
2226 <        wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa05b));      // PowerOff()
2226 >        wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa05b));   // PowerOff()
2227          *wp = htons(M68K_EMUL_RETURN);
2228  
2229          // Patch VIA interrupt handler
# Line 2063 | Line 2231 | static bool patch_68k(void)
2231          if ((base = find_rom_data(0x13000, 0x1c000, via_int_dat, sizeof(via_int_dat))) == 0) return false;
2232          D(bug("via_int %08lx\n", base));
2233          uint32 level1_int = ROM_BASE + base;
2234 <        wp = (uint16 *)level1_int;                      // Level 1 handler
2234 >        wp = (uint16 *)(ROMBaseHost + base);    // Level 1 handler
2235          *wp++ = htons(0x7002);                  // moveq        #2,d0 (60Hz interrupt)
2236          *wp++ = htons(M68K_NOP);
2237          *wp++ = htons(M68K_NOP);
# Line 2073 | Line 2241 | static bool patch_68k(void)
2241          static const uint8 via_int2_dat[] = {0x13, 0x7c, 0x00, 0x02, 0x1a, 0x00, 0x4e, 0x71, 0x52, 0xb8, 0x01, 0x6a};
2242          if ((base = find_rom_data(0x10000, 0x18000, via_int2_dat, sizeof(via_int2_dat))) == 0) return false;
2243          D(bug("via_int2 %08lx\n", base));
2244 <        wp = (uint16 *)(ROM_BASE + base);       // 60Hz handler
2244 >        wp = (uint16 *)(ROMBaseHost + base);    // 60Hz handler
2245          *wp++ = htons(M68K_EMUL_OP_IRQ);
2246          *wp++ = htons(0x4a80);                  // tst.l        d0
2247          *wp++ = htons(0x6700);                  // beq          xxx
# Line 2083 | Line 2251 | static bool patch_68k(void)
2251                  static const uint8 via_int3_dat[] = {0x48, 0xe7, 0xf0, 0xf0, 0x76, 0x01, 0x60, 0x26};
2252                  if ((base = find_rom_data(0x15000, 0x19000, via_int3_dat, sizeof(via_int3_dat))) == 0) return false;
2253                  D(bug("via_int3 %08lx\n", base));
2254 <                wp = (uint16 *)(ROM_BASE + base);       // CHRP level 1 handler
2254 >                wp = (uint16 *)(ROMBaseHost + base);    // CHRP level 1 handler
2255                  *wp++ = htons(M68K_JMP);
2256                  *wp++ = htons((level1_int - 12) >> 16);
2257                  *wp = htons((level1_int - 12) & 0xffff);
# Line 2091 | Line 2259 | static bool patch_68k(void)
2259  
2260          // Patch PutScrap() for clipboard exchange with host OS
2261          uint32 put_scrap = find_rom_trap(0xa9fe);       // PutScrap()
2262 <        wp = (uint16 *)(ROM_BASE + PUT_SCRAP_PATCH_SPACE);
2262 >        wp = (uint16 *)(ROMBaseHost + PUT_SCRAP_PATCH_SPACE);
2263          *wp++ = htons(M68K_EMUL_OP_PUT_SCRAP);
2264          *wp++ = htons(M68K_JMP);
2265          *wp++ = htons((ROM_BASE + put_scrap) >> 16);
2266          *wp++ = htons((ROM_BASE + put_scrap) & 0xffff);
2267 <        lp = (uint32 *)(ROM_BASE + 0x22);
2268 <        lp = (uint32 *)(ROM_BASE + ntohl(*lp));
2267 >        lp = (uint32 *)(ROMBaseHost + 0x22);
2268 >        lp = (uint32 *)(ROMBaseHost + ntohl(*lp));
2269          lp[0xa9fe & 0x3ff] = htonl(PUT_SCRAP_PATCH_SPACE);
2270  
2271          // Patch GetScrap() for clipboard exchange with host OS
2272          uint32 get_scrap = find_rom_trap(0xa9fd);       // GetScrap()
2273 <        wp = (uint16 *)(ROM_BASE + GET_SCRAP_PATCH_SPACE);
2273 >        wp = (uint16 *)(ROMBaseHost + GET_SCRAP_PATCH_SPACE);
2274          *wp++ = htons(M68K_EMUL_OP_GET_SCRAP);
2275          *wp++ = htons(M68K_JMP);
2276          *wp++ = htons((ROM_BASE + get_scrap) >> 16);
2277          *wp++ = htons((ROM_BASE + get_scrap) & 0xffff);
2278 <        lp = (uint32 *)(ROM_BASE + 0x22);
2279 <        lp = (uint32 *)(ROM_BASE + ntohl(*lp));
2278 >        lp = (uint32 *)(ROMBaseHost + 0x22);
2279 >        lp = (uint32 *)(ROMBaseHost + ntohl(*lp));
2280          lp[0xa9fd & 0x3ff] = htonl(GET_SCRAP_PATCH_SPACE);
2281  
2114 #if __BEOS__
2282          // Patch SynchIdleTime()
2283          if (PrefsFindBool("idlewait")) {
2284 <                wp = (uint16 *)(ROM_BASE + find_rom_trap(0xabf7) + 4);  // SynchIdleTime()
2285 <                D(bug("SynchIdleTime at %08lx\n", wp));
2286 <                if (ntohs(*wp) == 0x2078) {
2284 >                base = find_rom_trap(0xabf7) + 4;                                               // SynchIdleTime()
2285 >                wp = (uint16 *)(ROMBaseHost + base);
2286 >                D(bug("SynchIdleTime at %08lx\n", base));
2287 >                if (ntohs(*wp) == 0x2078) {                                                             // movea.l      ExpandMem,a0
2288                          *wp++ = htons(M68K_EMUL_OP_IDLE_TIME);
2289                          *wp = htons(M68K_NOP);
2290 <                } else {
2290 >                }
2291 >                else if (ntohs(*wp) == 0x70fe)                                                  // moveq        #-2,d0
2292 >                        *wp++ = htons(M68K_EMUL_OP_IDLE_TIME_2);
2293 >                else {
2294                          D(bug("SynchIdleTime patch not installed\n"));
2295                  }
2296          }
2126 #endif
2297  
2298          // Construct list of all sifters used by sound components in ROM
2299          D(bug("Searching for sound components with type sdev in ROM\n"));
# Line 2147 | Line 2317 | static bool patch_68k(void)
2317                  if ((thing = find_rom_resource(sifter_list[i].type, sifter_list[i].id)) != 0) {
2318                          D(bug(" patching type %08x, id %d\n", sifter_list[i].type, sifter_list[i].id));
2319                          // Install 68k glue code
2320 <                        uint16 *wp = (uint16 *)(ROM_BASE + thing);
2320 >                        uint16 *wp = (uint16 *)(ROMBaseHost + thing);
2321                          *wp++ = htons(0x4e56); *wp++ = htons(0x0000);   // link a6,#0
2322                          *wp++ = htons(0x48e7); *wp++ = htons(0x8018);   // movem.l d0/a3-a4,-(a7)
2323                          *wp++ = htons(0x266e); *wp++ = htons(0x000c);   // movea.l $c(a6),a3
# Line 2171 | Line 2341 | void InstallDrivers(void)
2341   {
2342          D(bug("Installing drivers...\n"));
2343          M68kRegisters r;
2344 <        uint8 pb[SIZEOF_IOParam];
2344 >        SheepArray<SIZEOF_IOParam> pb_var;
2345 >        const uintptr pb = pb_var.addr();
2346  
2347          // Install floppy driver
2348 <        if (ROMType == ROMTYPE_NEWWORLD) {
2348 >        if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
2349  
2350 <                // Force installation of floppy driver with NewWorld ROMs
2350 >                // Force installation of floppy driver with NewWorld and Gossamer ROMs
2351                  r.a[0] = ROM_BASE + sony_offset;
2352                  r.d[0] = (uint32)SonyRefNum;
2353                  Execute68kTrap(0xa43d, &r);             // DrvrInstallRsrvMem()
# Line 2187 | Line 2358 | void InstallDrivers(void)
2358                  WriteMacInt16(dce + dCtlFlags, SonyDriverFlags);
2359          }
2360  
2361 < #if DISABLE_SCSI && 0
2361 > #if DISABLE_SCSI && HAVE_SIGSEGV_SKIP_INSTRUCTION
2362          // Fake SCSIGlobals
2363 <        static const uint8 fake_scsi_globals[32] = {0,};
2193 <        WriteMacInt32(0xc0c, (uint32)fake_scsi_globals);
2363 >        WriteMacInt32(0xc0c, SheepMem::ZeroPage());
2364   #endif
2365  
2366          // Open .Sony driver
2367 <        WriteMacInt8((uint32)pb + ioPermssn, 0);
2368 <        WriteMacInt32((uint32)pb + ioNamePtr, (uint32)"\005.Sony");
2369 <        r.a[0] = (uint32)pb;
2367 >        SheepString sony_str("\005.Sony");
2368 >        WriteMacInt8(pb + ioPermssn, 0);
2369 >        WriteMacInt32(pb + ioNamePtr, sony_str.addr());
2370 >        r.a[0] = pb;
2371          Execute68kTrap(0xa000, &r);             // Open()
2372  
2373          // Install disk driver
# Line 2210 | Line 2381 | void InstallDrivers(void)
2381          WriteMacInt16(dce + dCtlFlags, DiskDriverFlags);
2382  
2383          // Open disk driver
2384 <        WriteMacInt32((uint32)pb + ioNamePtr, (uint32)"\005.Disk");
2385 <        r.a[0] = (uint32)pb;
2384 >        SheepString disk_str("\005.Disk");
2385 >        WriteMacInt32(pb + ioNamePtr, disk_str.addr());
2386 >        r.a[0] = pb;
2387          Execute68kTrap(0xa000, &r);             // Open()
2388  
2389          // Install CD-ROM driver unless nocdrom option given
# Line 2228 | Line 2400 | void InstallDrivers(void)
2400                  WriteMacInt16(dce + dCtlFlags, CDROMDriverFlags);
2401  
2402                  // Open CD-ROM driver
2403 <                WriteMacInt32((uint32)pb + ioNamePtr, (uint32)"\010.AppleCD");
2404 <                r.a[0] = (uint32)pb;
2403 >                SheepString apple_cd("\010.AppleCD");
2404 >                WriteMacInt32(pb + ioNamePtr, apple_cd.addr());
2405 >                r.a[0] = pb;
2406                  Execute68kTrap(0xa000, &r);             // Open()
2407          }
2408  

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