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root/cebix/SheepShaver/src/rom_patches.cpp

Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.33 by gbeauche, 2004-07-01T22:55:00Z vs.
Revision 1.42 by gbeauche, 2005-12-12T20:46:31Z

#	Line 1 | Line 1
1		/*
2		*  rom_patches.cpp - ROM patches
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 148 | Line 148 | bool DecodeROM(uint8 *data, uint32 size)
148		{
149		if (size == ROM_SIZE) {
150		// Plain ROM image
151	<	memcpy((void *)ROM_BASE, data, ROM_SIZE);
151	>	memcpy(ROMBaseHost, data, ROM_SIZE);
152		return true;
153		}
154		else if (strncmp((char *)data, "<CHRP-BOOT>", 11) == 0) {
#	Line 186 | Line 186 | bool DecodeROM(uint8 *data, uint32 size)
186		if (rom_signature == FOURCC('p','r','c','l')) {
187		D(bug("Offset of parcels data: %08x\n", image_offset));
188		D(bug("Size of parcels data: %08x\n", image_size));
189	<	decode_parcels(data + image_offset, (uint8 *)ROM_BASE, image_size);
189	>	decode_parcels(data + image_offset, ROMBaseHost, image_size);
190		}
191		else {
192		D(bug("Offset of compressed data: %08x\n", image_offset));
193		D(bug("Size of compressed data: %08x\n", image_size));
194	<	decode_lzss(data + image_offset, (uint8 *)ROM_BASE, image_size);
194	>	decode_lzss(data + image_offset, ROMBaseHost, image_size);
195		}
196		return true;
197		}
#	Line 207 | Line 207 | static uint32 find_rom_data(uint32 start
207		{
208		uint32 ofs = start;
209		while (ofs < end) {
210	<	if (!memcmp((void *)(ROM_BASE + ofs), data, data_len))
210	>	if (!memcmp(ROMBaseHost + ofs, data, data_len))
211		return ofs;
212		ofs++;
213		}
#	Line 224 | Line 224 | static uint32 rsrc_ptr = 0;
224		// id = 4711 means "find any ID"
225		static uint32 find_rom_resource(uint32 s_type, int16 s_id = 4711, bool cont = false)
226		{
227	<	uint32 *lp = (uint32 *)(ROM_BASE + 0x1a);
228	<	uint32 x = ntohl(*lp);
229	<	uint8 *bp = (uint8 *)(ROM_BASE + x + 5);
230	<	uint32 header_size = *bp;
227	>	uint32 lp = ROM_BASE + 0x1a;
228	>	uint32 x = ReadMacInt32(lp);
229	>	uint32 header_size = ReadMacInt8(ROM_BASE + x + 5);
230
231		if (!cont)
232		rsrc_ptr = x;
#	Line 235 | Line 234 | static uint32 find_rom_resource(uint32 s
234		return 0;
235
236		for (;;) {
237	<	lp = (uint32 *)(ROM_BASE + rsrc_ptr);
238	<	rsrc_ptr = ntohl(*lp);
237	>	lp = ROM_BASE + rsrc_ptr;
238	>	rsrc_ptr = ReadMacInt32(lp);
239		if (rsrc_ptr == 0)
240		break;
241
242		rsrc_ptr += header_size;
243
244	<	lp = (uint32 *)(ROM_BASE + rsrc_ptr + 4);
245	<	uint32 data = ntohl(*lp); lp++;
246	<	uint32 type = ntohl(*lp); lp++;
247	<	int16 id = ntohs(*(int16 *)lp);
244	>	lp = ROM_BASE + rsrc_ptr + 4;
245	>	uint32 data = ReadMacInt32(lp);
246	>	uint32 type = ReadMacInt32(lp + 4);
247	>	int16 id = ReadMacInt16(lp + 8);
248		if (type == s_type && (id == s_id || s_id == 4711))
249		return data;
250		}
#	Line 259 | Line 258 | static uint32 find_rom_resource(uint32 s
258
259		static uint32 find_rom_trap(uint16 trap)
260		{
261	<	uint32 *lp = (uint32 *)(ROM_BASE + 0x22);
263	<	lp = (uint32 *)(ROM_BASE + ntohl(*lp));
261	>	uint32 lp = ROM_BASE + ReadMacInt32(ROM_BASE + 0x22);
262
263		if (trap > 0xa800)
264	<	return ntohl(lp[trap & 0x3ff]);
264	>	return ReadMacInt32(lp + 4 * (trap & 0x3ff));
265		else
266	<	return ntohl(lp[(trap & 0xff) + 0x400]);
266	>	return ReadMacInt32(lp + 4 * ((trap & 0xff) + 0x400));
267		}
268
269
#	Line 274 | Line 272 | static uint32 find_rom_trap(uint16 trap)
272		*  there is no such instruction
273		*/
274
275	<	static uint32 powerpc_branch_target(uintptr addr)
275	>	static uint32 rom_powerpc_branch_target(uint32 addr)
276		{
277	<	uint32 opcode = ntohl(*(uint32 *)addr);
277	>	uint32 opcode = ntohl(*(uint32 *)(ROMBaseHost + addr));
278		uint32 primop = opcode >> 26;
279		uint32 target = 0;
280
#	Line 303 | Line 301 | static uint32 powerpc_branch_target(uint
301		static uint32 find_rom_powerpc_branch(uint32 start, uint32 end, uint32 target)
302		{
303		for (uint32 addr = start; addr < end; addr += 4) {
304	<	if (powerpc_branch_target(ROM_BASE + addr) == ROM_BASE + target)
304	>	if (rom_powerpc_branch_target(addr) == target)
305		return addr;
306		}
307		return 0;
#	Line 318 | Line 316 | static bool check_rom_patch_space(uint32
316		{
317		size = (size + 3) & -4;
318		for (int i = 0; i < size; i += 4) {
319	<	uint32 x = ntohl(*(uint32 *)(ROM_BASE + base + i));
319	>	uint32 x = ntohl(*(uint32 *)(ROMBaseHost + base + i));
320		if (x != 0x6b636b63 && x != 0)
321		return false;
322		}
#	Line 689 | Line 687 | static inline void memcpy_powerpc_code(v
687		bool PatchROM(void)
688		{
689		// Print ROM info
690	<	D(bug("Checksum: %08lx\n", ntohl(*(uint32 *)ROM_BASE)));
691	<	D(bug("Version: %04x\n", ntohs(*(uint16 *)(ROM_BASE + 8))));
692	<	D(bug("Sub Version: %04x\n", ntohs(*(uint16 *)(ROM_BASE + 18))));
693	<	D(bug("Nanokernel ID: %s\n", (char *)ROM_BASE + 0x30d064));
694	<	D(bug("Resource Map at %08lx\n", ntohl(*(uint32 *)(ROM_BASE + 26))));
695	<	D(bug("Trap Tables at %08lx\n\n", ntohl(*(uint32 *)(ROM_BASE + 34))));
690	>	D(bug("Checksum: %08lx\n", ntohl(*(uint32 *)ROMBaseHost)));
691	>	D(bug("Version: %04x\n", ntohs(*(uint16 *)(ROMBaseHost + 8))));
692	>	D(bug("Sub Version: %04x\n", ntohs(*(uint16 *)(ROMBaseHost + 18))));
693	>	D(bug("Nanokernel ID: %s\n", (char *)ROMBaseHost + 0x30d064));
694	>	D(bug("Resource Map at %08lx\n", ntohl(*(uint32 *)(ROMBaseHost + 26))));
695	>	D(bug("Trap Tables at %08lx\n\n", ntohl(*(uint32 *)(ROMBaseHost + 34))));
696
697		// Detect ROM type
698	<	if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot TNT", 8))
698	>	if (!memcmp(ROMBaseHost + 0x30d064, "Boot TNT", 8))
699		ROMType = ROMTYPE_TNT;
700	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Alchemy", 12))
700	>	else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Alchemy", 12))
701		ROMType = ROMTYPE_ALCHEMY;
702	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Zanzibar", 13))
702	>	else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Zanzibar", 13))
703		ROMType = ROMTYPE_ZANZIBAR;
704	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gazelle", 12))
704	>	else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Gazelle", 12))
705		ROMType = ROMTYPE_GAZELLE;
706	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gossamer", 13))
706	>	else if (!memcmp(ROMBaseHost + 0x30d064, "Boot Gossamer", 13))
707		ROMType = ROMTYPE_GOSSAMER;
708	<	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "NewWorld", 8))
708	>	else if (!memcmp(ROMBaseHost + 0x30d064, "NewWorld", 8))
709		ROMType = ROMTYPE_NEWWORLD;
710		else
711		return false;
#	Line 730 | Line 728 | bool PatchROM(void)
728
729		#ifdef M68K_BREAK_POINT
730		// Install 68k breakpoint
731	<	uint16 *wp = (uint16 *)(ROM_BASE + M68K_BREAK_POINT);
731	>	uint16 *wp = (uint16 *)(ROMBaseHost + M68K_BREAK_POINT);
732		*wp++ = htons(M68K_EMUL_BREAK);
733		*wp = htons(M68K_EMUL_RETURN);
734		#endif
735
736		#ifdef POWERPC_BREAK_POINT
737		// Install PowerPC breakpoint
738	<	uint32 *lp = (uint32 *)(ROM_BASE + POWERPC_BREAK_POINT);
738	>	uint32 *lp = (uint32 *)(ROMBaseHost + POWERPC_BREAK_POINT);
739		*lp = htonl(0);
740		#endif
741
742		// Copy 68k emulator to 2MB boundary
743	<	memcpy((void *)(ROM_BASE + ROM_SIZE), (void *)(ROM_BASE + ROM_SIZE - 0x100000), 0x100000);
743	>	memcpy(ROMBaseHost + ROM_SIZE, ROMBaseHost + (ROM_SIZE - 0x100000), 0x100000);
744		return true;
745		}
746
#	Line 757 | Line 755 | static bool patch_nanokernel_boot(void)
755		uint32 base, loc;
756
757		// ROM boot structure patches
758	<	lp = (uint32 *)(ROM_BASE + 0x30d000);
758	>	lp = (uint32 *)(ROMBaseHost + 0x30d000);
759		lp[0x9c >> 2] = htonl(KernelDataAddr);                  // LA_InfoRecord
760		lp[0xa0 >> 2] = htonl(KernelDataAddr);                  // LA_KernelData
761		lp[0xa4 >> 2] = htonl(KernelDataAddr + 0x1000); // LA_EmulatorData
#	Line 769 | Line 767 | static bool patch_nanokernel_boot(void)
767		// Skip SR/BAT/SDR init
768		loc = 0x310000;
769		if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_GOSSAMER || ROMType == ROMTYPE_NEWWORLD) {
770	<	lp = (uint32 *)(ROM_BASE + loc);
770	>	lp = (uint32 *)(ROMBaseHost + loc);
771		*lp++ = htonl(POWERPC_NOP);
772		*lp = htonl(0x38000000);
773		}
774		static const uint8 sr_init_dat[] = {0x35, 0x4a, 0xff, 0xfc, 0x7d, 0x86, 0x50, 0x2e};
775		if ((base = find_rom_data(0x3101b0, 0x3105b0, sr_init_dat, sizeof(sr_init_dat))) == 0) return false;
776		D(bug("sr_init %08lx\n", base));
777	<	lp = (uint32 *)(ROM_BASE + loc + 8);
777	>	lp = (uint32 *)(ROMBaseHost + loc + 8);
778		*lp = htonl(0x48000000 | ((base - loc - 8) & 0x3fffffc));       // b            ROM_BASE+0x3101b0
779	<	lp = (uint32 *)(ROM_BASE + base);
779	>	lp = (uint32 *)(ROMBaseHost + base);
780		*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);            // lwz  r1,(pointer to Kernel Data)
781		*lp++ = htonl(0x3da0dead);              // lis  r13,0xdead      (start of kernel memory)
782		*lp++ = htonl(0x3dc00010);              // lis  r14,0x0010      (size of page table)
#	Line 788 | Line 786 | static bool patch_nanokernel_boot(void)
786		static const uint8 pvr_read_dat[] = {0x7d, 0x9f, 0x42, 0xa6};
787		if ((base = find_rom_data(0x3103b0, 0x3108b0, pvr_read_dat, sizeof(pvr_read_dat))) == 0) return false;
788		D(bug("pvr_read %08lx\n", base));
789	<	lp = (uint32 *)(ROM_BASE + base);
789	>	lp = (uint32 *)(ROMBaseHost + base);
790		*lp = htonl(0x81800000 + XLM_PVR);      // lwz  r12,(theoretical PVR)
791
792		// Set CPU specific data (even if ROM doesn't have support for that CPU)
#	Line 797 | Line 795 | static bool patch_nanokernel_boot(void)
795		uint32 ofs = ntohl(lp[7]) & 0xffff;
796		D(bug("ofs %08lx\n", ofs));
797		lp[8] = htonl((ntohl(lp[8]) & 0xffff) | 0x48000000);    // beq -> b
798	<	loc = (ntohl(lp[8]) & 0xffff) + (uint32)(lp+8) - ROM_BASE;
798	>	loc = (ntohl(lp[8]) & 0xffff) + (uintptr)(lp+8) - (uintptr)ROMBaseHost;
799		D(bug("loc %08lx\n", loc));
800	<	lp = (uint32 *)(ROM_BASE + ofs + 0x310000);
800	>	lp = (uint32 *)(ROMBaseHost + ofs + 0x310000);
801		switch (PVR >> 16) {
802		case 1:         // 601
803		lp[0] = htonl(0x1000);          // Page size
#	Line 931 | Line 929 | static bool patch_nanokernel_boot(void)
929		static const uint8 sprg3_mq_dat[] = {0x7d, 0x13, 0x43, 0xa6, 0x3d, 0x00, 0x00, 0x04, 0x7d, 0x00, 0x03, 0xa6, 0x39, 0x00, 0x00, 0x00, 0x7d, 0x00, 0x02, 0xa6};
930		if ((base = find_rom_data(loc + 0x20, loc + 0x60, sprg3_mq_dat, sizeof(sprg3_mq_dat))) == 0) return false;
931		D(bug("sprg3/mq %08lx\n", base));
932	<	lp = (uint32 *)(ROM_BASE + base);
932	>	lp = (uint32 *)(ROMBaseHost + base);
933		lp[0] = htonl(POWERPC_NOP);
934		lp[2] = htonl(POWERPC_NOP);
935		lp[4] = htonl(POWERPC_NOP);
#	Line 940 | Line 938 | static bool patch_nanokernel_boot(void)
938		static const uint8 msr_dat[] = {0x7d, 0xc0, 0x00, 0xa6};
939		if ((base = find_rom_data(loc + 0x40, loc + 0x80, msr_dat, sizeof(msr_dat))) == 0) return false;
940		D(bug("msr %08lx\n", base));
941	<	lp = (uint32 *)(ROM_BASE + base);
941	>	lp = (uint32 *)(ROMBaseHost + base);
942		*lp = htonl(0x39c00000);                // li   r14,0
943
944		// Don't write to DEC
945	<	lp = (uint32 *)(ROM_BASE + loc + 0x70);
945	>	lp = (uint32 *)(ROMBaseHost + loc + 0x70);
946		*lp++ = htonl(POWERPC_NOP);
947	<	loc = (ntohl(lp[0]) & 0xffff) + (uint32)lp - ROM_BASE;
947	>	loc = (ntohl(lp[0]) & 0xffff) + (uintptr)lp - (uintptr)ROMBaseHost;
948		D(bug("loc %08lx\n", loc));
949
950		// Don't set SPRG3
951		static const uint8 sprg3_dat[] = {0x39, 0x21, 0x03, 0x60, 0x7d, 0x33, 0x43, 0xa6, 0x39, 0x01, 0x04, 0x20};
952		if ((base = find_rom_data(0x310000, 0x314000, sprg3_dat, sizeof(sprg3_dat))) == 0) return false;
953		D(bug("sprg3 %08lx\n", base + 4));
954	<	lp = (uint32 *)(ROM_BASE + base + 4);
954	>	lp = (uint32 *)(ROMBaseHost + base + 4);
955		*lp = htonl(POWERPC_NOP);
956
957		// Don't read PVR
958		static const uint8 pvr_read2_dat[] = {0x7e, 0xff, 0x42, 0xa6, 0x56, 0xf7, 0x84, 0x3e};
959		if ((base = find_rom_data(0x310000, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) == 0) return false;
960		D(bug("pvr_read2 %08lx\n", base));
961	<	lp = (uint32 *)(ROM_BASE + base);
961	>	lp = (uint32 *)(ROMBaseHost + base);
962		*lp = htonl(0x82e00000 + XLM_PVR);              // lwz  r23,(theoretical PVR)
963		if ((base = find_rom_data(base + 4, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) != 0) {
964		D(bug("pvr_read2 %08lx\n", base));
965	<	lp = (uint32 *)(ROM_BASE + base);
965	>	lp = (uint32 *)(ROMBaseHost + base);
966		*lp = htonl(0x82e00000 + XLM_PVR);      // lwz  r23,(theoretical PVR)
967		}
968		static const uint8 pvr_read3_dat[] = {0x7e, 0x5f, 0x42, 0xa6, 0x56, 0x52, 0x84, 0x3e};
969		if ((base = find_rom_data(0x310000, 0x320000, pvr_read3_dat, sizeof(pvr_read3_dat))) != 0) {
970		D(bug("pvr_read3 %08lx\n", base));
971	<	lp = (uint32 *)(ROM_BASE + base);
971	>	lp = (uint32 *)(ROMBaseHost + base);
972		*lp = htonl(0x82400000 + XLM_PVR);      // lwz  r18,(theoretical PVR)
973		}
974		static const uint8 pvr_read4_dat[] = {0x7d, 0x3f, 0x42, 0xa6, 0x55, 0x29, 0x84, 0x3e};
975		if ((base = find_rom_data(0x310000, 0x320000, pvr_read4_dat, sizeof(pvr_read4_dat))) != 0) {
976		D(bug("pvr_read4 %08lx\n", base));
977	<	lp = (uint32 *)(ROM_BASE + base);
977	>	lp = (uint32 *)(ROMBaseHost + base);
978		*lp = htonl(0x81200000 + XLM_PVR);      // lzw  r9,(theoritical PVR)
979		}
980
#	Line 984 | Line 982 | static bool patch_nanokernel_boot(void)
982		static const uint8 sdr1_read_dat[] = {0x7d, 0x19, 0x02, 0xa6, 0x55, 0x16, 0x81, 0xde};
983		if ((base = find_rom_data(0x310000, 0x320000, sdr1_read_dat, sizeof(sdr1_read_dat))) == 0) return false;
984		D(bug("sdr1_read %08lx\n", base));
985	<	lp = (uint32 *)(ROM_BASE + base);
985	>	lp = (uint32 *)(ROMBaseHost + base);
986		*lp++ = htonl(0x3d00dead);              // lis  r8,0xdead               (pointer to page table)
987		*lp++ = htonl(0x3ec0001f);              // lis  r22,0x001f      (size of page table)
988		*lp = htonl(POWERPC_NOP);
#	Line 993 | Line 991 | static bool patch_nanokernel_boot(void)
991		static const uint8 pgtb_clear_dat[] = {0x36, 0xd6, 0xff, 0xfc, 0x7e, 0xe8, 0xb1, 0x2e, 0x41, 0x81, 0xff, 0xf8};
992		if ((base = find_rom_data(0x310000, 0x320000, pgtb_clear_dat, sizeof(pgtb_clear_dat))) == 0) return false;
993		D(bug("pgtb_clear %08lx\n", base + 4));
994	<	lp = (uint32 *)(ROM_BASE + base + 4);
994	>	lp = (uint32 *)(ROMBaseHost + base + 4);
995		*lp = htonl(POWERPC_NOP);
996		D(bug("tblie %08lx\n", base + 12));
997	<	lp = (uint32 *)(ROM_BASE + base + 12);
997	>	lp = (uint32 *)(ROMBaseHost + base + 12);
998		*lp = htonl(POWERPC_NOP);
999
1000		// Don't create RAM descriptor table
1001		static const uint8 desc_create_dat[] = {0x97, 0xfd, 0x00, 0x04, 0x3b, 0xff, 0x10, 0x00, 0x4b, 0xff, 0xff, 0xdc};
1002		if ((base = find_rom_data(0x310000, 0x320000, desc_create_dat, sizeof(desc_create_dat))) == 0) return false;
1003		D(bug("desc_create %08lx\n", base))
1004	<	lp = (uint32 *)(ROM_BASE + base);
1004	>	lp = (uint32 *)(ROMBaseHost + base);
1005		*lp = htonl(POWERPC_NOP);
1006
1007		// Don't load SRs and BATs
#	Line 1013 | Line 1011 | static bool patch_nanokernel_boot(void)
1011		if ((base = find_rom_data(0x310000, 0x320000, sr_load_caller, sizeof(sr_load_caller))) == 0) return false;
1012		if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false;
1013		D(bug("sr_load %08lx, called from %08lx\n", loc, base));
1014	<	lp = (uint32 *)(ROM_BASE + base);
1014	>	lp = (uint32 *)(ROMBaseHost + base);
1015		*lp = htonl(POWERPC_NOP);
1016
1017		// Don't mess with SRs
1018		static const uint8 sr_load2_dat[] = {0x83, 0xa1, 0x05, 0xe8, 0x57, 0x7c, 0x3e, 0x78, 0x7f, 0xbd, 0xe0, 0x2e};
1019		if ((base = find_rom_data(0x310000, 0x320000, sr_load2_dat, sizeof(sr_load2_dat))) == 0) return false;
1020		D(bug("sr_load2 %08lx\n", base));
1021	<	lp = (uint32 *)(ROM_BASE + base);
1021	>	lp = (uint32 *)(ROMBaseHost + base);
1022		*lp = htonl(POWERPC_BLR);
1023
1024		// Don't check performance monitor
1025		static const uint8 pm_check_dat[] = {0x7e, 0x58, 0xeb, 0xa6, 0x7e, 0x53, 0x90, 0xf8, 0x7e, 0x78, 0xea, 0xa6};
1026		if ((base = find_rom_data(0x310000, 0x320000, pm_check_dat, sizeof(pm_check_dat))) == 0) return false;
1027		D(bug("pm_check %08lx\n", base));
1028	<	lp = (uint32 *)(ROM_BASE + base);
1028	>	lp = (uint32 *)(ROMBaseHost + base);
1029
1030		static const int spr_check_list[] = {
1031		952 /* mmcr0 */, 953 /* pmc1 */, 954 /* pmc2 */, 955 /* sia */,
#	Line 1056 | Line 1054 | static bool patch_nanokernel_boot(void)
1054		if ((base = find_rom_data(0x310000, 0x320000, jump68k_caller_dat, sizeof(jump68k_caller_dat))) == 0) return false;
1055		if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false;
1056		D(bug("jump68k %08lx, called from %08lx\n", loc, base));
1057	<	lp = (uint32 *)(ROM_BASE + base);
1057	>	lp = (uint32 *)(ROMBaseHost + base);
1058		*lp++ = htonl(0x80610634);              // lwz  r3,0x0634(r1)   (pointer to Emulator Data)
1059		*lp++ = htonl(0x8081119c);              // lwz  r4,0x119c(r1)   (pointer to opcode table)
1060		*lp++ = htonl(0x80011184);              // lwz  r0,0x1184(r1)   (pointer to emulator init routine)
#	Line 1079 | Line 1077 | static bool patch_68k_emul(void)
1077		static const uint8 twi_dat[] = {0x0f, 0xff, 0x00, 0x00, 0x0f, 0xff, 0x00, 0x01, 0x0f, 0xff, 0x00, 0x02};
1078		if ((base = find_rom_data(0x36e600, 0x36ea00, twi_dat, sizeof(twi_dat))) == 0) return false;
1079		D(bug("twi %08lx\n", base));
1080	<	lp = (uint32 *)(ROM_BASE + base);
1080	>	lp = (uint32 *)(ROMBaseHost + base);
1081		*lp++ = htonl(0x48000000 + 0x36f900 - base);            // b 0x36f900 (Emulator start)
1082		*lp++ = htonl(0x48000000 + 0x36fa00 - base - 4);        // b 0x36fa00 (Mixed mode)
1083		*lp++ = htonl(0x48000000 + 0x36fb00 - base - 8);        // b 0x36fb00 (Reset/FC1E opcode)
1084		*lp++ = htonl(0x48000000 + 0x36fc00 - base - 12);       // FE0A opcode
1085		*lp++ = htonl(POWERPC_ILLEGAL);                                         // Interrupt
1086	<	*lp++ = htonl(POWERPC_ILLEGAL);                                         // ?
1086	>	*lp++ = htonl(0x48000000 + 0x36fd00 - base - 20);       // FE0F opcode
1087		*lp++ = htonl(POWERPC_ILLEGAL);
1088		*lp++ = htonl(POWERPC_ILLEGAL);
1089		*lp++ = htonl(POWERPC_ILLEGAL);
#	Line 1099 | Line 1097 | static bool patch_68k_emul(void)
1097
1098		#if EMULATED_PPC
1099		// Install EMUL_RETURN, EXEC_RETURN, EXEC_NATIVE and EMUL_OP opcodes
1100	<	lp = (uint32 *)(ROM_BASE + 0x380000 + (M68K_EMUL_RETURN << 3));
1100	>	lp = (uint32 *)(ROMBaseHost + 0x380000 + (M68K_EMUL_RETURN << 3));
1101		*lp++ = htonl(POWERPC_EMUL_OP);
1102		*lp++ = htonl(0x4bf66e80);                                                      // b    0x366084
1103		*lp++ = htonl(POWERPC_EMUL_OP | 1);
#	Line 1112 | Line 1110 | static bool patch_68k_emul(void)
1110		}
1111		#else
1112		// Install EMUL_RETURN, EXEC_RETURN and EMUL_OP opcodes
1113	<	lp = (uint32 *)(ROM_BASE + 0x380000 + (M68K_EMUL_RETURN << 3));
1113	>	lp = (uint32 *)(ROMBaseHost + 0x380000 + (M68K_EMUL_RETURN << 3));
1114		*lp++ = htonl(0x80000000 + XLM_EMUL_RETURN_PROC);       // lwz  r0,XLM_EMUL_RETURN_PROC
1115		*lp++ = htonl(0x4bf705fc);                                                      // b    0x36f800
1116		*lp++ = htonl(0x80000000 + XLM_EXEC_RETURN_PROC);       // lwz  r0,XLM_EXEC_RETURN_PROC
#	Line 1125 | Line 1123 | static bool patch_68k_emul(void)
1123		}
1124
1125		// Extra routines for EMUL_RETURN/EXEC_RETURN/EMUL_OP
1126	<	lp = (uint32 *)(ROM_BASE + 0x36f800);
1126	>	lp = (uint32 *)(ROMBaseHost + 0x36f800);
1127		*lp++ = htonl(0x7c0803a6);                                              // mtlr r0
1128		*lp++ = htonl(0x4e800020);                                              // blr
1129
#	Line 1135 | Line 1133 | static bool patch_68k_emul(void)
1133		#endif
1134
1135		// Extra routine for 68k emulator start
1136	<	lp = (uint32 *)(ROM_BASE + 0x36f900);
1136	>	lp = (uint32 *)(ROMBaseHost + 0x36f900);
1137		*lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1138		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1139		*lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
#	Line 1165 | Line 1163 | static bool patch_68k_emul(void)
1163		*lp = htonl(0x4e800020);                                        // blr
1164
1165		// Extra routine for Mixed Mode
1166	<	lp = (uint32 *)(ROM_BASE + 0x36fa00);
1166	>	lp = (uint32 *)(ROMBaseHost + 0x36fa00);
1167		*lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1168		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1169		*lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
#	Line 1195 | Line 1193 | static bool patch_68k_emul(void)
1193		*lp = htonl(0x4e800020);                                        // blr
1194
1195		// Extra routine for Reset/FC1E opcode
1196	<	lp = (uint32 *)(ROM_BASE + 0x36fb00);
1196	>	lp = (uint32 *)(ROMBaseHost + 0x36fb00);
1197		*lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1198		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1199		*lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
#	Line 1225 | Line 1223 | static bool patch_68k_emul(void)
1223		*lp = htonl(0x4e800020);                                        // blr
1224
1225		// Extra routine for FE0A opcode (QuickDraw 3D needs this)
1226	<	lp = (uint32 *)(ROM_BASE + 0x36fc00);
1226	>	lp = (uint32 *)(ROMBaseHost + 0x36fc00);
1227		*lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1228		*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1229		*lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
#	Line 1254 | Line 1252 | static bool patch_68k_emul(void)
1252		*lp++ = htonl(0x50e7deb4);                                      // rlwimi       r7,r7,27,$00000020
1253		*lp = htonl(0x4e800020);                                        // blr
1254
1255	+	// Extra routine for FE0F opcode (power management)
1256	+	lp = (uint32 *)(ROMBaseHost + 0x36fd00);
1257	+	*lp++ = htonl(0x7c2903a6);                                      // mtctr        r1
1258	+	*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);       // lwz          r1,XLM_IRQ_NEST
1259	+	*lp++ = htonl(0x38210001);                                      // addi         r1,r1,1
1260	+	*lp++ = htonl(0x90200000 + XLM_IRQ_NEST);       // stw          r1,XLM_IRQ_NEST
1261	+	*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz              r1,XLM_KERNEL_DATA
1262	+	*lp++ = htonl(0x90c10018);                                      // stw          r6,0x18(r1)
1263	+	*lp++ = htonl(0x7cc902a6);                                      // mfctr        r6
1264	+	*lp++ = htonl(0x90c10004);                                      // stw          r6,$0004(r1)
1265	+	*lp++ = htonl(0x80c1065c);                                      // lwz          r6,$065c(r1)
1266	+	*lp++ = htonl(0x90e6013c);                                      // stw          r7,$013c(r6)
1267	+	*lp++ = htonl(0x91060144);                                      // stw          r8,$0144(r6)
1268	+	*lp++ = htonl(0x9126014c);                                      // stw          r9,$014c(r6)
1269	+	*lp++ = htonl(0x91460154);                                      // stw          r10,$0154(r6)
1270	+	*lp++ = htonl(0x9166015c);                                      // stw          r11,$015c(r6)
1271	+	*lp++ = htonl(0x91860164);                                      // stw          r12,$0164(r6)
1272	+	*lp++ = htonl(0x91a6016c);                                      // stw          r13,$016c(r6)
1273	+	*lp++ = htonl(0x7da00026);                                      // mfcr         r13
1274	+	*lp++ = htonl(0x80e10660);                                      // lwz          r7,$0660(r1)
1275	+	*lp++ = htonl(0x7d8802a6);                                      // mflr         r12
1276	+	*lp++ = htonl(0x50e74001);                                      // rlwimi.      r7,r7,8,$80000000
1277	+	*lp++ = htonl(0x81410604);                                      // lwz          r10,0x0604(r1)
1278	+	*lp++ = htonl(0x7d4803a6);                                      // mtlr         r10
1279	+	*lp++ = htonl(0x7d8a6378);                                      // mr           r10,r12
1280	+	*lp++ = htonl(0x3d600002);                                      // lis          r11,0x0002
1281	+	*lp++ = htonl(0x616bf072);                                      // ori          r11,r11,0xf072 (MSR)
1282	+	*lp++ = htonl(0x50e7deb4);                                      // rlwimi       r7,r7,27,$00000020
1283	+	*lp = htonl(0x4e800020);                                        // blr
1284	+
1285		// Patch DR emulator to jump to right address when an interrupt occurs
1286	<	lp = (uint32 *)(ROM_BASE + 0x370000);
1287	<	while (lp < (uint32 *)(ROM_BASE + 0x380000)) {
1286	>	lp = (uint32 *)(ROMBaseHost + 0x370000);
1287	>	while (lp < (uint32 *)(ROMBaseHost + 0x380000)) {
1288		if (ntohl(*lp) == 0x4ca80020)           // bclr         5,8
1289		goto dr_found;
1290		lp++;
#	Line 1265 | Line 1293 | static bool patch_68k_emul(void)
1293		return false;
1294		dr_found:
1295		lp++;
1296	<	loc = (uint32)lp - ROM_BASE;
1297	<	if ((base = powerpc_branch_target(ROM_BASE + loc)) == 0) base = ROM_BASE + loc;
1296	>	loc = (uintptr)lp - (uintptr)ROMBaseHost;
1297	>	if ((base = rom_powerpc_branch_target(loc)) == 0) base = loc;
1298		static const uint8 dr_ret_dat[] = {0x80, 0xbf, 0x08, 0x14, 0x53, 0x19, 0x4d, 0xac, 0x7c, 0xa8, 0x03, 0xa6};
1299	<	if ((base = find_rom_data(base - ROM_BASE, 0x380000, dr_ret_dat, sizeof(dr_ret_dat))) == 0) return false;
1299	>	if ((base = find_rom_data(base, 0x380000, dr_ret_dat, sizeof(dr_ret_dat))) == 0) return false;
1300		D(bug("dr_ret %08lx\n", base));
1301		if (base != loc) {
1302		// OldWorld ROMs contain an absolute branch
1303	<	D(bug(" patching absolute branch at %08x\n", (uint32)lp - ROM_BASE));
1304	<	*lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff));          // b    DR_CACHE_BASE+0x1f000
1305	<	lp = (uint32 *)(ROM_BASE + 0x37f000);
1303	>	D(bug(" patching absolute branch at %08x\n", loc));
1304	>	*lp = htonl(0x48000000 + 0xf000 - (loc & 0xffff));                              // b    DR_CACHE_BASE+0x1f000
1305	>	lp = (uint32 *)(ROMBaseHost + 0x37f000);
1306		*lp++ = htonl(0x3c000000 + ((ROM_BASE + base) >> 16));                  // lis  r0,xxx
1307		*lp++ = htonl(0x60000000 + ((ROM_BASE + base) & 0xffff));               // ori  r0,r0,xxx
1308		*lp++ = htonl(0x7c0803a6);                                                                              // mtlr r0
#	Line 1297 | Line 1325 | static bool patch_nanokernel(void)
1325		static const uint8 virt2phys_dat[] = {0x7d, 0x1b, 0x43, 0x78, 0x3b, 0xa1, 0x03, 0x20};
1326		if ((base = find_rom_data(0x313000, 0x314000, virt2phys_dat, sizeof(virt2phys_dat))) == 0) return false;
1327		D(bug("virt2phys %08lx\n", base + 8));
1328	<	lp = (uint32 *)(ROM_BASE + base + 8);   // Don't translate virtual->physical
1328	>	lp = (uint32 *)(ROMBaseHost + base + 8);        // Don't translate virtual->physical
1329		lp[0] = htonl(0x7f7fdb78);                                      // mr           r31,r27
1330		lp[2] = htonl(POWERPC_NOP);
1331
1332		static const uint8 ppc_excp_tbl_dat[] = {0x39, 0x01, 0x04, 0x20, 0x7d, 0x13, 0x43, 0xa6};
1333		if ((base = find_rom_data(0x313000, 0x314000, ppc_excp_tbl_dat, sizeof(ppc_excp_tbl_dat))) == 0) return false;
1334		D(bug("ppc_excp_tbl %08lx\n", base));
1335	<	lp = (uint32 *)(ROM_BASE + base);               // Don't activate PPC exception table
1335	>	lp = (uint32 *)(ROMBaseHost + base);            // Don't activate PPC exception table
1336		*lp++ = htonl(0x39000000 + MODE_NATIVE);        // li   r8,MODE_NATIVE
1337		*lp = htonl(0x91000000 + XLM_RUN_MODE);         // stw  r8,XLM_RUN_MODE
1338
1339		static const uint8 save_fpu_dat[] = {0x7d, 0x00, 0x00, 0xa6, 0x61, 0x08, 0x20, 0x00, 0x7d, 0x00, 0x01, 0x24};
1340		if ((base = find_rom_data(0x310000, 0x314000, save_fpu_dat, sizeof(save_fpu_dat))) == 0) return false;
1341		D(bug("save_fpu %08lx\n", base));
1342	<	lp = (uint32 *)(ROM_BASE + base);               // Don't modify MSR to turn on FPU
1342	>	lp = (uint32 *)(ROMBaseHost + base);            // Don't modify MSR to turn on FPU
1343		if (ntohl(lp[4]) != 0x556b04e2) return false;
1344	<	loc = ROM_BASE + base;
1344	>	loc = base;
1345		#if 1
1346		// FIXME: is that really intended?
1347		*lp++ = htonl(POWERPC_NOP);
#	Line 1331 | Line 1359 | static bool patch_nanokernel(void)
1359		static const uint8 save_fpu_caller_dat[] = {0x93, 0xa6, 0x01, 0xec, 0x93, 0xc6, 0x01, 0xf4, 0x93, 0xe6, 0x01, 0xfc, 0x40};
1360		if ((base = find_rom_data(0x310000, 0x314000, save_fpu_caller_dat, sizeof(save_fpu_caller_dat))) == 0) return false;
1361		D(bug("save_fpu_caller %08lx\n", base + 12));
1362	<	if (powerpc_branch_target(ROM_BASE + base + 12) != loc) return false;
1363	<	lp = (uint32 *)(ROM_BASE + base + 12);  // Always save FPU state
1362	>	if (rom_powerpc_branch_target(base + 12) != loc) return false;
1363	>	lp = (uint32 *)(ROMBaseHost + base + 12);       // Always save FPU state
1364		*lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312e88
1365
1366		static const uint8 mdec_dat[] = {0x7f, 0xf6, 0x02, 0xa6, 0x2c, 0x08, 0x00, 0x00, 0x93, 0xe1, 0x06, 0x68, 0x7d, 0x16, 0x03, 0xa6};
1367		if ((base = find_rom_data(0x310000, 0x314000, mdec_dat, sizeof(mdec_dat))) == 0) return false;
1368		D(bug("mdec %08lx\n", base));
1369	<	lp = (uint32 *)(ROM_BASE + base);               // Don't modify DEC
1369	>	lp = (uint32 *)(ROMBaseHost + base);            // Don't modify DEC
1370		lp[0] = htonl(0x3be00000);                                      // li   r31,0
1371		#if 1
1372		lp[3] = htonl(POWERPC_NOP);
#	Line 1351 | Line 1379 | static bool patch_nanokernel(void)
1379		static const uint8 restore_fpu_caller_dat[] = {0x81, 0x06, 0x00, 0xf4, 0x81, 0x46, 0x00, 0xfc, 0x7d, 0x09, 0x03, 0xa6, 0x40};
1380		if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller_dat, sizeof(restore_fpu_caller_dat))) == 0) return false;
1381		D(bug("restore_fpu_caller %08lx\n", base + 12));
1382	<	lp = (uint32 *)(ROM_BASE + base + 12);  // Always restore FPU state
1382	>	lp = (uint32 *)(ROMBaseHost + base + 12);       // Always restore FPU state
1383		*lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312ddc
1384
1385		static const uint8 m68k_excp_tbl_dat[] = {0x81, 0x21, 0x06, 0x58, 0x39, 0x01, 0x03, 0x60, 0x7d, 0x13, 0x43, 0xa6};
1386		if ((base = find_rom_data(0x310000, 0x314000, m68k_excp_tbl_dat, sizeof(m68k_excp_tbl_dat))) == 0) return false;
1387		D(bug("m68k_excp %08lx\n", base + 4));
1388	<	lp = (uint32 *)(ROM_BASE + base + 4);   // Don't activate 68k exception table
1388	>	lp = (uint32 *)(ROMBaseHost + base + 4);        // Don't activate 68k exception table
1389		*lp++ = htonl(0x39000000 + MODE_68K);           // li   r8,MODE_68K
1390		*lp = htonl(0x91000000 + XLM_RUN_MODE);         // stw  r8,XLM_RUN_MODE
1391
#	Line 1365 | Line 1393 | static bool patch_nanokernel(void)
1393		static const uint8 restore_fpu_caller2_dat[] = {0x81, 0x86, 0x00, 0x8c, 0x80, 0x66, 0x00, 0x94, 0x80, 0x86, 0x00, 0x9c, 0x40};
1394		if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller2_dat, sizeof(restore_fpu_caller2_dat))) == 0) return false;
1395		D(bug("restore_fpu_caller2 %08lx\n", base + 12));
1396	<	loc = powerpc_branch_target(ROM_BASE + base + 12) - ROM_BASE;
1397	<	lp = (uint32 *)(ROM_BASE + base + 12);  // Always restore FPU state
1396	>	loc = rom_powerpc_branch_target(base + 12);
1397	>	lp = (uint32 *)(ROMBaseHost + base + 12);       // Always restore FPU state
1398		*lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff));        // bl   0x00312dd4
1399
1400		static const uint8 restore_fpu_dat[] = {0x55, 0x68, 0x04, 0xa5, 0x4c, 0x82, 0x00, 0x20, 0x81, 0x06, 0x00, 0xe4};
1401		if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_dat, sizeof(restore_fpu_dat))) == 0) return false;
1402		D(bug("restore_fpu %08lx\n", base));
1403		if (base != loc) return false;
1404	<	lp = (uint32 *)(ROM_BASE + base + 4);   // Don't modify MSR to turn on FPU
1404	>	lp = (uint32 *)(ROMBaseHost + base + 4);        // Don't modify MSR to turn on FPU
1405		*lp++ = htonl(POWERPC_NOP);
1406		lp += 2;
1407		*lp++ = htonl(POWERPC_NOP);
#	Line 1382 | Line 1410 | static bool patch_nanokernel(void)
1410		*lp++ = htonl(POWERPC_NOP);
1411		*lp = htonl(POWERPC_NOP);
1412
1413	+	// Disable suspend (FE0F opcode)
1414	+	// TODO: really suspend SheepShaver?
1415	+	static const uint8 suspend_dat[] = {0x7c, 0x88, 0x68, 0x39, 0x41, 0x9d};
1416	+	if ((base = find_rom_data(0x315000, 0x316000, suspend_dat, sizeof(suspend_dat))) == 0) return false;
1417	+	D(bug("suspend %08lx\n", base));
1418	+	lp = (uint32 *)(ROMBaseHost + base + 4);
1419	+	*lp = htonl((ntohl(*lp) & 0xffff) | 0x48000000);        // bgt -> b
1420	+
1421		// Patch trap return routine
1422		static const uint8 trap_return_dat[] = {0x80, 0xc1, 0x00, 0x18, 0x80, 0x21, 0x00, 0x04, 0x4c, 0x00, 0x00, 0x64};
1423		if ((base = find_rom_data(0x312000, 0x320000, trap_return_dat, sizeof(trap_return_dat))) == 0) return false;
1424		D(bug("trap_return %08lx\n", base + 8));
1425	<	lp = (uint32 *)(ROM_BASE + base + 8);   // Replace rfi
1425	>	lp = (uint32 *)(ROMBaseHost + base + 8);        // Replace rfi
1426		*lp = htonl(POWERPC_BCTR);
1427
1428		while (ntohl(*lp) != 0x7d5a03a6) lp--;
1429		*lp++ = htonl(0x7d4903a6);                                      // mtctr        r10
1430		*lp++ = htonl(0x7daff120);                                      // mtcr r13
1431	<	*lp = htonl(0x48000000 + ((0x318000 - ((uint32)lp - ROM_BASE)) & 0x03fffffc));  // b            ROM_BASE+0x318000
1432	<	uint32 npc = (uint32)(lp + 1) - ROM_BASE;
1431	>	*lp = htonl(0x48000000 + ((0x318000 - ((uintptr)lp - (uintptr)ROMBaseHost)) & 0x03fffffc));     // b            ROM_BASE+0x318000
1432	>	uint32 npc = (uintptr)(lp + 1) - (uintptr)ROMBaseHost;
1433
1434	<	lp = (uint32 *)(ROM_BASE + 0x318000);
1434	>	lp = (uint32 *)(ROMBaseHost + 0x318000);
1435		*lp++ = htonl(0x81400000 + XLM_IRQ_NEST);       // lwz  r10,XLM_IRQ_NEST
1436		*lp++ = htonl(0x394affff);                                      // subi r10,r10,1
1437		*lp++ = htonl(0x91400000 + XLM_IRQ_NEST);       // stw  r10,XLM_IRQ_NEST
#	Line 1426 | Line 1462 | static bool patch_68k(void)
1462		static const uint8 reset_dat[] = {0x4e, 0x70};
1463		if ((base = find_rom_data(0xc8, 0x120, reset_dat, sizeof(reset_dat))) == 0) return false;
1464		D(bug("reset %08lx\n", base));
1465	<	wp = (uint16 *)(ROM_BASE + base);
1465	>	wp = (uint16 *)(ROMBaseHost + base);
1466		*wp = htons(M68K_NOP);
1467
1468		// Fake reading PowerMac ID (via Universal)
1469		static const uint8 powermac_id_dat[] = {0x45, 0xf9, 0x5f, 0xff, 0xff, 0xfc, 0x20, 0x12, 0x72, 0x00};
1470		if ((base = find_rom_data(0xe000, 0x15000, powermac_id_dat, sizeof(powermac_id_dat))) == 0) return false;
1471		D(bug("powermac_id %08lx\n", base));
1472	<	wp = (uint16 *)(ROM_BASE + base);
1472	>	wp = (uint16 *)(ROMBaseHost + base);
1473		*wp++ = htons(0x203c);                  // move.l       #id,d0
1474		*wp++ = htons(0);
1475		//      if (ROMType == ROMTYPE_NEWWORLD)
#	Line 1448 | Line 1484 | static bool patch_68k(void)
1484		static const uint8 univ_info_dat[] = {0x3f, 0xff, 0x04, 0x00};
1485		if ((base = find_rom_data(0x14000, 0x18000, univ_info_dat, sizeof(univ_info_dat))) == 0) return false;
1486		D(bug("universal_info %08lx\n", base));
1487	<	lp = (uint32 *)(ROM_BASE + base - 0x14);
1487	>	lp = (uint32 *)(ROMBaseHost + base - 0x14);
1488		lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1489		lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1490		lp[0x14 >> 2] = htonl(0x3fff0401);
#	Line 1460 | Line 1496 | static bool patch_68k(void)
1496		lp[0x60 >> 2] = htonl(0x0000003d);
1497		} else if (ROMType == ROMTYPE_ZANZIBAR) {
1498		base = 0x12b70;
1499	<	lp = (uint32 *)(ROM_BASE + base - 0x14);
1499	>	lp = (uint32 *)(ROMBaseHost + base - 0x14);
1500		lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1501		lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1502		lp[0x14 >> 2] = htonl(0x3fff0401);
#	Line 1472 | Line 1508 | static bool patch_68k(void)
1508		lp[0x60 >> 2] = htonl(0x0000003d);
1509		} else if (ROMType == ROMTYPE_GOSSAMER) {
1510		base = 0x12d20;
1511	<	lp = (uint32 *)(ROM_BASE + base - 0x14);
1511	>	lp = (uint32 *)(ROMBaseHost + base - 0x14);
1512		lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1513		lp[0x10 >> 2] = htonl(0xcc003d11);              // Make it like the PowerMac 9500 UniversalInfo
1514		lp[0x14 >> 2] = htonl(0x3fff0401);
#	Line 1486 | Line 1522 | static bool patch_68k(void)
1522
1523		// Construct AddrMap for NewWorld ROM
1524		if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) {
1525	<	lp = (uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE);
1525	>	lp = (uint32 *)(ROMBaseHost + ADDR_MAP_PATCH_SPACE);
1526		memset(lp - 10, 0, 0x128);
1527		lp[-10] = htonl(0x0300001c);
1528		lp[-9] = htonl(0x000108c4);
#	Line 1510 | Line 1546 | static bool patch_68k(void)
1546		static const uint8 via_init_dat[] = {0x08, 0x00, 0x00, 0x02, 0x67, 0x00, 0x00, 0x2c, 0x24, 0x68, 0x00, 0x08};
1547		if ((base = find_rom_data(0xe000, 0x15000, via_init_dat, sizeof(via_init_dat))) == 0) return false;
1548		D(bug("via_init %08lx\n", base));
1549	<	wp = (uint16 *)(ROM_BASE + base + 4);
1549	>	wp = (uint16 *)(ROMBaseHost + base + 4);
1550		*wp = htons(0x6000);                    // bra
1551
1552		static const uint8 via_init2_dat[] = {0x24, 0x68, 0x00, 0x08, 0x00, 0x12, 0x00, 0x30, 0x4e, 0x71};
1553		if ((base = find_rom_data(0xa000, 0x10000, via_init2_dat, sizeof(via_init2_dat))) == 0) return false;
1554		D(bug("via_init2 %08lx\n", base));
1555	<	wp = (uint16 *)(ROM_BASE + base);
1555	>	wp = (uint16 *)(ROMBaseHost + base);
1556		*wp = htons(0x4ed6);                    // jmp  (a6)
1557
1558		static const uint8 via_init3_dat[] = {0x22, 0x68, 0x00, 0x08, 0x28, 0x3c, 0x20, 0x00, 0x01, 0x00};
1559		if ((base = find_rom_data(0xa000, 0x10000, via_init3_dat, sizeof(via_init3_dat))) == 0) return false;
1560		D(bug("via_init3 %08lx\n", base));
1561	<	wp = (uint16 *)(ROM_BASE + base);
1561	>	wp = (uint16 *)(ROMBaseHost + base);
1562		*wp = htons(0x4ed6);                    // jmp  (a6)
1563
1564		// Don't RunDiags, get BootGlobs pointer directly
#	Line 1530 | Line 1566 | static bool patch_68k(void)
1566		static const uint8 run_diags_dat[] = {0x60, 0xff, 0x00, 0x0c};
1567		if ((base = find_rom_data(0x110, 0x128, run_diags_dat, sizeof(run_diags_dat))) == 0) return false;
1568		D(bug("run_diags %08lx\n", base));
1569	<	wp = (uint16 *)(ROM_BASE + base);
1569	>	wp = (uint16 *)(ROMBaseHost + base);
1570		*wp++ = htons(0x4df9);                  // lea  xxx,a6
1571		*wp++ = htons((RAMBase + RAMSize - 0x1c) >> 16);
1572		*wp = htons((RAMBase + RAMSize - 0x1c) & 0xffff);
#	Line 1538 | Line 1574 | static bool patch_68k(void)
1574		static const uint8 run_diags_dat[] = {0x74, 0x00, 0x2f, 0x0e};
1575		if ((base = find_rom_data(0xd0, 0xf0, run_diags_dat, sizeof(run_diags_dat))) == 0) return false;
1576		D(bug("run_diags %08lx\n", base));
1577	<	wp = (uint16 *)(ROM_BASE + base - 6);
1577	>	wp = (uint16 *)(ROMBaseHost + base - 6);
1578		*wp++ = htons(0x4df9);                  // lea  xxx,a6
1579		*wp++ = htons((RAMBase + RAMSize - 0x1c) >> 16);
1580		*wp = htons((RAMBase + RAMSize - 0x1c) & 0xffff);
#	Line 1548 | Line 1584 | static bool patch_68k(void)
1584		static const uint8 nvram1_dat[] = {0x48, 0xe7, 0x01, 0x0e, 0x24, 0x68, 0x00, 0x08, 0x08, 0x83, 0x00, 0x1f};
1585		if ((base = find_rom_data(0x7000, 0xc000, nvram1_dat, sizeof(nvram1_dat))) == 0) return false;
1586		D(bug("nvram1 %08lx\n", base));
1587	<	wp = (uint16 *)(ROM_BASE + base);
1587	>	wp = (uint16 *)(ROMBaseHost + base);
1588		*wp++ = htons(M68K_EMUL_OP_XPRAM1);
1589		*wp = htons(M68K_RTS);
1590
#	Line 1556 | Line 1592 | static bool patch_68k(void)
1592		static const uint8 nvram2_dat[] = {0x48, 0xe7, 0x1c, 0xe0, 0x4f, 0xef, 0xff, 0xb4};
1593		if ((base = find_rom_data(0xa000, 0xd000, nvram2_dat, sizeof(nvram2_dat))) == 0) return false;
1594		D(bug("nvram2 %08lx\n", base));
1595	<	wp = (uint16 *)(ROM_BASE + base);
1595	>	wp = (uint16 *)(ROMBaseHost + base);
1596		*wp++ = htons(M68K_EMUL_OP_XPRAM2);
1597		*wp = htons(0x4ed3);                    // jmp  (a3)
1598
1599		static const uint8 nvram3_dat[] = {0x48, 0xe7, 0xdc, 0xe0, 0x4f, 0xef, 0xff, 0xb4};
1600		if ((base = find_rom_data(0xa000, 0xd000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1601		D(bug("nvram3 %08lx\n", base));
1602	<	wp = (uint16 *)(ROM_BASE + base);
1602	>	wp = (uint16 *)(ROMBaseHost + base);
1603		*wp++ = htons(M68K_EMUL_OP_XPRAM3);
1604		*wp = htons(0x4ed3);                    // jmp  (a3)
1605
1606		static const uint8 nvram4_dat[] = {0x4e, 0x56, 0xff, 0xa8, 0x48, 0xe7, 0x1f, 0x38, 0x16, 0x2e, 0x00, 0x13};
1607		if ((base = find_rom_data(0xa000, 0xd000, nvram4_dat, sizeof(nvram4_dat))) == 0) return false;
1608		D(bug("nvram4 %08lx\n", base));
1609	<	wp = (uint16 *)(ROM_BASE + base + 16);
1609	>	wp = (uint16 *)(ROMBaseHost + base + 16);
1610		*wp++ = htons(0x1a2e);                  // move.b       ($000f,a6),d5
1611		*wp++ = htons(0x000f);
1612		*wp++ = htons(M68K_EMUL_OP_NVRAM3);
#	Line 1583 | Line 1619 | static bool patch_68k(void)
1619		static const uint8 nvram5_dat[] = {0x0c, 0x80, 0x03, 0x00, 0x00, 0x00, 0x66, 0x0a, 0x70, 0x00, 0x21, 0xf8, 0x02, 0x0c, 0x01, 0xe4};
1620		if ((base = find_rom_data(0xa000, 0xd000, nvram5_dat, sizeof(nvram5_dat))) == 0) return false;
1621		D(bug("nvram5 %08lx\n", base));
1622	<	wp = (uint16 *)(ROM_BASE + base + 6);
1622	>	wp = (uint16 *)(ROMBaseHost + base + 6);
1623		*wp = htons(M68K_NOP);
1624
1625		static const uint8 nvram6_dat[] = {0x2f, 0x0a, 0x24, 0x48, 0x4f, 0xef, 0xff, 0xa0, 0x20, 0x0f};
1626		if ((base = find_rom_data(0x9000, 0xb000, nvram6_dat, sizeof(nvram6_dat))) == 0) return false;
1627		D(bug("nvram6 %08lx\n", base));
1628	<	wp = (uint16 *)(ROM_BASE + base);
1628	>	wp = (uint16 *)(ROMBaseHost + base);
1629		*wp++ = htons(0x7000);                  // moveq        #0,d0
1630		*wp++ = htons(0x2080);                  // move.l       d0,(a0)
1631		*wp++ = htons(0x4228);                  // clr.b        4(a0)
#	Line 1600 | Line 1636 | static bool patch_68k(void)
1636		base = find_rom_data(0x9000, 0xb000, nvram7_dat, sizeof(nvram7_dat));
1637		if (base) {
1638		D(bug("nvram7 %08lx\n", base));
1639	<	wp = (uint16 *)(ROM_BASE + base + 12);
1639	>	wp = (uint16 *)(ROMBaseHost + base + 12);
1640		*wp = htons(M68K_RTS);
1641		}
1642		} else {
1643		static const uint8 nvram2_dat[] = {0x4e, 0xd6, 0x06, 0x41, 0x13, 0x00};
1644		if ((base = find_rom_data(0x7000, 0xb000, nvram2_dat, sizeof(nvram2_dat))) == 0) return false;
1645		D(bug("nvram2 %08lx\n", base));
1646	<	wp = (uint16 *)(ROM_BASE + base + 2);
1646	>	wp = (uint16 *)(ROMBaseHost + base + 2);
1647		*wp++ = htons(M68K_EMUL_OP_XPRAM2);
1648		*wp = htons(0x4ed3);                    // jmp  (a3)
1649
1650		static const uint8 nvram3_dat[] = {0x4e, 0xd3, 0x06, 0x41, 0x13, 0x00};
1651		if ((base = find_rom_data(0x7000, 0xb000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1652		D(bug("nvram3 %08lx\n", base));
1653	<	wp = (uint16 *)(ROM_BASE + base + 2);
1653	>	wp = (uint16 *)(ROMBaseHost + base + 2);
1654		*wp++ = htons(M68K_EMUL_OP_XPRAM3);
1655		*wp = htons(0x4ed3);                    // jmp  (a3)
1656
1657		static const uint32 nvram4_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0x538d0, 0};
1658	<	wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1658	>	wp = (uint16 *)(ROMBaseHost + nvram4_loc[ROMType]);
1659		*wp++ = htons(0x202f);                  // move.l       4(sp),d0
1660		*wp++ = htons(0x0004);
1661		*wp++ = htons(M68K_EMUL_OP_NVRAM1);
#	Line 1633 | Line 1669 | static bool patch_68k(void)
1669		}
1670
1671		static const uint32 nvram5_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0x53a20, 0};
1672	<	wp = (uint16 *)(ROM_BASE + nvram5_loc[ROMType]);
1672	>	wp = (uint16 *)(ROMBaseHost + nvram5_loc[ROMType]);
1673		if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GAZELLE) {
1674		*wp++ = htons(0x202f);                  // move.l       4(sp),d0
1675		*wp++ = htons(0x0004);
#	Line 1656 | Line 1692 | static bool patch_68k(void)
1692		static const uint8 mem_top_dat[] = {0x2c, 0x6c, 0xff, 0xec, 0x2a, 0x4c, 0xdb, 0xec, 0xff, 0xf4};
1693		if ((base = find_rom_data(0x120, 0x180, mem_top_dat, sizeof(mem_top_dat))) == 0) return false;
1694		D(bug("mem_top %08lx\n", base));
1695	<	wp = (uint16 *)(ROM_BASE + base);
1695	>	wp = (uint16 *)(ROMBaseHost + base);
1696		*wp++ = htons(M68K_EMUL_OP_FIX_MEMTOP);
1697		*wp = htons(M68K_NOP);
1698
#	Line 1664 | Line 1700 | static bool patch_68k(void)
1700		static const uint8 scc_init_caller_dat[] = {0x21, 0xce, 0x01, 0x08, 0x22, 0x78, 0x0d, 0xd8};
1701		if ((base = find_rom_data(0x180, 0x1f0, scc_init_caller_dat, sizeof(scc_init_caller_dat))) == 0) return false;
1702		D(bug("scc_init_caller %08lx\n", base + 12));
1703	<	wp = (uint16 *)(ROM_BASE + base + 12);
1704	<	loc = ntohs(wp[1]) + ((uintptr)wp - ROM_BASE) + 2;
1703	>	wp = (uint16 *)(ROMBaseHost + base + 12);
1704	>	loc = ntohs(wp[1]) + ((uintptr)wp - (uintptr)ROMBaseHost) + 2;
1705		static const uint8 scc_init_dat[] = {0x20, 0x78, 0x01, 0xdc, 0x22, 0x78, 0x01, 0xd8};
1706		if ((base = find_rom_data(loc, loc + 0x80, scc_init_dat, sizeof(scc_init_dat))) == 0) return false;
1707		D(bug("scc_init %08lx\n", base));
1708	<	wp = (uint16 *)(ROM_BASE + base);
1708	>	wp = (uint16 *)(ROMBaseHost + base);
1709		*wp++ = htons(M68K_EMUL_OP_RESET);
1710		*wp = htons(M68K_RTS);
1711
#	Line 1677 | Line 1713 | static bool patch_68k(void)
1713		static const uint8 ext_cache_dat[] = {0x4e, 0x7b, 0x00, 0x02};
1714		if ((base = find_rom_data(0x1d0, 0x230, ext_cache_dat, sizeof(ext_cache_dat))) == 0) return false;
1715		D(bug("ext_cache %08lx\n", base));
1716	<	lp = (uint32 *)(ROM_BASE + base + 6);
1717	<	wp = (uint16 *)(ROM_BASE + ntohl(*lp) + base + 6);
1716	>	loc = ReadMacInt32(ROM_BASE + base + 6);
1717	>	wp = (uint16 *)(ROMBaseHost + loc + base + 6);
1718		*wp = htons(M68K_RTS);
1719	<	lp = (uint32 *)(ROM_BASE + base + 12);
1720	<	wp = (uint16 *)(ROM_BASE + ntohl(*lp) + base + 12);
1719	>	loc = ReadMacInt32(ROM_BASE + base + 12);
1720	>	wp = (uint16 *)(ROMBaseHost + loc + base + 12);
1721		*wp = htons(M68K_RTS);
1722
1723		// Fake CPU speed test (SetupTimeK)
1724		static const uint8 timek_dat[] = {0x0c, 0x38, 0x00, 0x04, 0x01, 0x2f, 0x6d, 0x3c};
1725		if ((base = find_rom_data(0x400, 0x500, timek_dat, sizeof(timek_dat))) == 0) return false;
1726		D(bug("timek %08lx\n", base));
1727	<	wp = (uint16 *)(ROM_BASE + base);
1727	>	wp = (uint16 *)(ROMBaseHost + base);
1728		*wp++ = htons(0x31fc);                  // move.w       #xxx,TimeDBRA
1729		*wp++ = htons(100);
1730		*wp++ = htons(0x0d00);
#	Line 1707 | Line 1743 | static bool patch_68k(void)
1743		static const uint8 jump_tab_dat[] = {0x41, 0xfa, 0x00, 0x0e, 0x21, 0xc8, 0x20, 0x10, 0x4e, 0x75};
1744		if ((base = find_rom_data(0x3000, 0x6000, jump_tab_dat, sizeof(jump_tab_dat))) == 0) return false;
1745		D(bug("jump_tab %08lx\n", base));
1746	<	lp = (uint32 *)(ROM_BASE + base + 16);
1746	>	lp = (uint32 *)(ROMBaseHost + base + 16);
1747		for (;;) {
1748	<	D(bug(" %08lx\n", (uint32)lp - ROM_BASE));
1748	>	D(bug(" %08lx\n", (uintptr)lp - (uintptr)ROMBaseHost));
1749		while ((ntohl(*lp) & 0xff000000) == 0xff000000) {
1750		*lp = htonl((ntohl(*lp) & (ROM_SIZE-1)) + ROM_BASE);
1751		lp++;
#	Line 1724 | Line 1760 | static bool patch_68k(void)
1760		static const uint8 sys_zone_dat[] = {0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x40, 0x00};
1761		if ((base = find_rom_data(0x600, 0x900, sys_zone_dat, sizeof(sys_zone_dat))) == 0) return false;
1762		D(bug("sys_zone %08lx\n", base));
1763	<	lp = (uint32 *)(ROM_BASE + base);
1763	>	lp = (uint32 *)(ROMBaseHost + base);
1764		*lp++ = htonl(RAMBase ? RAMBase : 0x3000);
1765		*lp = htonl(RAMBase ? RAMBase + 0x1800 : 0x4800);
1766
#	Line 1733 | Line 1769 | static bool patch_68k(void)
1769		static const uint8 boot_stack_dat[] = {0x08, 0x38, 0x00, 0x06, 0x24, 0x0b};
1770		if ((base = find_rom_data(0x580, 0x800, boot_stack_dat, sizeof(boot_stack_dat))) == 0) return false;
1771		D(bug("boot_stack %08lx\n", base));
1772	<	wp = (uint16 *)(ROM_BASE + base);
1772	>	wp = (uint16 *)(ROMBaseHost + base);
1773		*wp++ = htons(0x207c);                  // move.l       #RAMBase+0x3ffffe,a0
1774		*wp++ = htons((RAMBase + 0x3ffffe) >> 16);
1775		*wp++ = htons((RAMBase + 0x3ffffe) & 0xffff);
#	Line 1744 | Line 1780 | static bool patch_68k(void)
1780		static const uint8 page_size_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x10};
1781		if ((base = find_rom_data(0xb000, 0x12000, page_size_dat, sizeof(page_size_dat))) == 0) return false;
1782		D(bug("page_size %08lx\n", base));
1783	<	wp = (uint16 *)(ROM_BASE + base);
1783	>	wp = (uint16 *)(ROMBaseHost + base);
1784		*wp++ = htons(0x203c);                  // move.l       #$1000,d0
1785		*wp++ = htons(0);
1786		*wp++ = htons(0x1000);
1787		*wp++ = htons(M68K_NOP);
1788		*wp = htons(M68K_NOP);
1789
1790	<	// Gestalt PowerPC page size, RAM size (InitGestalt, via 0x25c)
1790	>	// Gestalt PowerPC page size, CPU type, RAM size (InitGestalt, via 0x25c)
1791		static const uint8 page_size2_dat[] = {0x26, 0x79, 0x5f, 0xff, 0xef, 0xd8, 0x25, 0x6b, 0x00, 0x10, 0x00, 0x1e};
1792		if ((base = find_rom_data(0x50000, 0x70000, page_size2_dat, sizeof(page_size2_dat))) == 0) return false;
1793		D(bug("page_size2 %08lx\n", base));
1794	<	wp = (uint16 *)(ROM_BASE + base);
1794	>	wp = (uint16 *)(ROMBaseHost + base);
1795		*wp++ = htons(0x257c);                  // move.l       #$1000,$1e(a2)
1796		*wp++ = htons(0);
1797		*wp++ = htons(0x1000);
1798		*wp++ = htons(0x001e);
1799		*wp++ = htons(0x157c);                  // move.b       #PVR,$1d(a2)
1800	<	*wp++ = htons(((PVR & 0x80000000) ? 0x10 : 0) | ((PVR >> 16) & 0xff));
1800	>	uint32 cput = (PVR >> 16);
1801	>	if (cput == 0x7000)
1802	>	cput |= 0x20;
1803	>	else if (cput >= 0x8000 && cput <= 0x8002)
1804	>	cput |= 0x10;
1805	>	cput &= 0xff;
1806	>	*wp++ = htons(cput);
1807		*wp++ = htons(0x001d);
1808		*wp++ = htons(0x263c);                  // move.l       #RAMSize,d3
1809		*wp++ = htons(RAMSize >> 16);
#	Line 1770 | Line 1812 | static bool patch_68k(void)
1812		*wp++ = htons(M68K_NOP);
1813		*wp = htons(M68K_NOP);
1814		if (ROMType == ROMTYPE_NEWWORLD)
1815	<	wp = (uint16 *)(ROM_BASE + base + 0x4a);
1815	>	wp = (uint16 *)(ROMBaseHost + base + 0x4a);
1816		else
1817	<	wp = (uint16 *)(ROM_BASE + base + 0x28);
1817	>	wp = (uint16 *)(ROMBaseHost + base + 0x28);
1818		*wp++ = htons(M68K_NOP);
1819		*wp = htons(M68K_NOP);
1820
1821		// Gestalt CPU/bus clock speed (InitGestalt, via 0x25c)
1822		if (ROMType == ROMTYPE_ZANZIBAR) {
1823	<	wp = (uint16 *)(ROM_BASE + 0x5d87a);
1823	>	wp = (uint16 *)(ROMBaseHost + 0x5d87a);
1824		*wp++ = htons(0x203c);                  // move.l       #Hz,d0
1825		*wp++ = htons(BusClockSpeed >> 16);
1826		*wp++ = htons(BusClockSpeed & 0xffff);
1827		*wp++ = htons(M68K_NOP);
1828		*wp = htons(M68K_NOP);
1829	<	wp = (uint16 *)(ROM_BASE + 0x5d888);
1829	>	wp = (uint16 *)(ROMBaseHost + 0x5d888);
1830		*wp++ = htons(0x203c);                  // move.l       #Hz,d0
1831		*wp++ = htons(CPUClockSpeed >> 16);
1832		*wp++ = htons(CPUClockSpeed & 0xffff);
#	Line 1797 | Line 1839 | static bool patch_68k(void)
1839		static const uint8 gc_mask_dat[] = {0x83, 0xa8, 0x00, 0x24, 0x4e, 0x71};
1840		if ((base = find_rom_data(0x13000, 0x20000, gc_mask_dat, sizeof(gc_mask_dat))) == 0) return false;
1841		D(bug("gc_mask %08lx\n", base));
1842	<	wp = (uint16 *)(ROM_BASE + base);
1842	>	wp = (uint16 *)(ROMBaseHost + base);
1843		*wp++ = htons(M68K_NOP);
1844		*wp = htons(M68K_NOP);
1845	<	wp = (uint16 *)(ROM_BASE + base + 0x40);
1845	>	wp = (uint16 *)(ROMBaseHost + base + 0x40);
1846		*wp++ = htons(M68K_NOP);
1847		*wp = htons(M68K_NOP);
1848	<	wp = (uint16 *)(ROM_BASE + base + 0x78);
1848	>	wp = (uint16 *)(ROMBaseHost + base + 0x78);
1849		*wp++ = htons(M68K_NOP);
1850		*wp = htons(M68K_NOP);
1851	<	wp = (uint16 *)(ROM_BASE + base + 0x96);
1851	>	wp = (uint16 *)(ROMBaseHost + base + 0x96);
1852		*wp++ = htons(M68K_NOP);
1853		*wp = htons(M68K_NOP);
1854
1855		static const uint8 gc_mask2_dat[] = {0x02, 0xa8, 0x00, 0x00, 0x00, 0x80, 0x00, 0x24};
1856		if ((base = find_rom_data(0x13000, 0x20000, gc_mask2_dat, sizeof(gc_mask2_dat))) == 0) return false;
1857		D(bug("gc_mask2 %08lx\n", base));
1858	<	wp = (uint16 *)(ROM_BASE + base);
1859	<	if (ROMType == ROMTYPE_GOSSAMER)
1858	>	wp = (uint16 *)(ROMBaseHost + base);
1859	>	if (ROMType == ROMTYPE_GOSSAMER) {
1860		*wp++ = htons(M68K_NOP);
1861	+	*wp++ = htons(M68K_NOP);
1862	+	*wp++ = htons(M68K_NOP);
1863	+	*wp++ = htons(M68K_NOP);
1864	+	}
1865		for (int i=0; i<5; i++) {
1866		*wp++ = htons(M68K_NOP);
1867		*wp++ = htons(M68K_NOP);
#	Line 1838 | Line 1884 | static bool patch_68k(void)
1884		static const uint8 cuda_init_dat[] = {0x08, 0xa9, 0x00, 0x04, 0x16, 0x00, 0x4e, 0x71, 0x13, 0x7c, 0x00, 0x84, 0x1c, 0x00, 0x4e, 0x71};
1885		if ((base = find_rom_data(0xa000, 0x12000, cuda_init_dat, sizeof(cuda_init_dat))) == 0) return false;
1886		D(bug("cuda_init %08lx\n", base));
1887	<	wp = (uint16 *)(ROM_BASE + base);
1887	>	wp = (uint16 *)(ROMBaseHost + base);
1888		*wp++ = htons(M68K_NOP);
1889		*wp++ = htons(M68K_NOP);
1890		*wp++ = htons(M68K_NOP);
#	Line 1851 | Line 1897 | static bool patch_68k(void)
1897		static const uint8 cpu_speed_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x04, 0x4c, 0x7c};
1898		if ((base = find_rom_data(0x6000, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) == 0) return false;
1899		D(bug("cpu_speed %08lx\n", base));
1900	<	wp = (uint16 *)(ROM_BASE + base);
1900	>	wp = (uint16 *)(ROMBaseHost + base);
1901		*wp++ = htons(0x203c);                  // move.l       #(MHz<<16)|MHz,d0
1902		*wp++ = htons(CPUClockSpeed / 1000000);
1903		*wp++ = htons(CPUClockSpeed / 1000000);
1904		*wp = htons(M68K_RTS);
1905		if ((base = find_rom_data(base, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) != 0) {
1906		D(bug("cpu_speed2 %08lx\n", base));
1907	<	wp = (uint16 *)(ROM_BASE + base);
1907	>	wp = (uint16 *)(ROMBaseHost + base);
1908		*wp++ = htons(0x203c);                  // move.l       #(MHz<<16)|MHz,d0
1909		*wp++ = htons(CPUClockSpeed / 1000000);
1910		*wp++ = htons(CPUClockSpeed / 1000000);
#	Line 1869 | Line 1915 | static bool patch_68k(void)
1915		static const uint8 time_via_dat[] = {0x40, 0xe7, 0x00, 0x7c, 0x07, 0x00, 0x28, 0x78, 0x01, 0xd4, 0x43, 0xec, 0x10, 0x00};
1916		if ((base = find_rom_data(0x30000, 0x40000, time_via_dat, sizeof(time_via_dat))) == 0) return false;
1917		D(bug("time_via %08lx\n", base));
1918	<	wp = (uint16 *)(ROM_BASE + base);
1918	>	wp = (uint16 *)(ROMBaseHost + base);
1919		*wp++ = htons(0x4cdf);                  // movem.l      (sp)+,d0-d5/a0-a4
1920		*wp++ = htons(0x1f3f);
1921		*wp = htons(M68K_RTS);
#	Line 1879 | Line 1925 | static bool patch_68k(void)
1925		static const uint8 open_firmware_dat[] = {0x2f, 0x79, 0xff, 0x80, 0x00, 0x00, 0x00, 0xfc};
1926		if ((base = find_rom_data(0x48000, 0x58000, open_firmware_dat, sizeof(open_firmware_dat))) == 0) return false;
1927		D(bug("open_firmware %08lx\n", base));
1928	<	wp = (uint16 *)(ROM_BASE + base);
1928	>	wp = (uint16 *)(ROMBaseHost + base);
1929		*wp++ = htons(0x2f7c);                  // move.l               #deadbeef,0xfc(a7)
1930		*wp++ = htons(0xdead);
1931		*wp++ = htons(0xbeef);
1932		*wp = htons(0x00fc);
1933	<	wp = (uint16 *)(ROM_BASE + base + 0x1a);
1933	>	wp = (uint16 *)(ROMBaseHost + base + 0x1a);
1934		*wp++ = htons(M68K_NOP);                // (FE03 opcode, tries to jump to 0xdeadbeef)
1935		*wp = htons(M68K_NOP);
1936
#	Line 1892 | Line 1938 | static bool patch_68k(void)
1938		static const uint8 ext_cache2_dat[] = {0x4f, 0xef, 0xff, 0xec, 0x20, 0x4f, 0x10, 0xbc, 0x00, 0x01, 0x11, 0x7c, 0x00, 0x1b};
1939		if ((base = find_rom_data(0x13000, 0x20000, ext_cache2_dat, sizeof(ext_cache2_dat))) == 0) return false;
1940		D(bug("ext_cache2 %08lx\n", base));
1941	<	wp = (uint16 *)(ROM_BASE + base);
1941	>	wp = (uint16 *)(ROMBaseHost + base);
1942		*wp = htons(M68K_RTS);
1943
1944		// Don't install Time Manager task for 60Hz interrupt (Enable60HzInts, via 0x2b8)
#	Line 1900 | Line 1946 | static bool patch_68k(void)
1946		static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9};
1947		if ((base = find_rom_data(0x2a0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1948		D(bug("tm_task %08lx\n", base));
1949	<	wp = (uint16 *)(ROM_BASE + base + 28);
1949	>	wp = (uint16 *)(ROMBaseHost + base + 28);
1950		*wp++ = htons(M68K_NOP);
1951		*wp++ = htons(M68K_NOP);
1952		*wp++ = htons(M68K_NOP);
#	Line 1911 | Line 1957 | static bool patch_68k(void)
1957		static const uint8 tm_task_dat[] = {0x20, 0x3c, 0x73, 0x79, 0x73, 0x61};
1958		if ((base = find_rom_data(0x280, 0x300, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1959		D(bug("tm_task %08lx\n", base));
1960	<	wp = (uint16 *)(ROM_BASE + base - 6);
1960	>	wp = (uint16 *)(ROMBaseHost + base - 6);
1961		*wp++ = htons(M68K_NOP);
1962		*wp++ = htons(M68K_NOP);
1963		*wp = htons(M68K_NOP);
#	Line 1928 | Line 1974 | static bool patch_68k(void)
1974		if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_pvr_dat, sizeof(dsl_pvr_dat))) == 0) return false;
1975		}
1976		D(bug("dsl_pvr %08lx\n", base));
1977	<	lp = (uint32 *)(ROM_BASE + base + 12);
1977	>	lp = (uint32 *)(ROMBaseHost + base + 12);
1978		*lp = htonl(0x3c800000 | (PVR >> 16));  // lis  r4,PVR
1979
1980		// Don't read bus clock from 0x5fffef88 in DriverServicesLib (via 0x316)
#	Line 1936 | Line 1982 | static bool patch_68k(void)
1982		static const uint8 dsl_bus_dat[] = {0x81, 0x07, 0x00, 0x00, 0x39, 0x20, 0x42, 0x40, 0x81, 0x62, 0xff, 0x20};
1983		if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_bus_dat, sizeof(dsl_bus_dat))) == 0) return false;
1984		D(bug("dsl_bus %08lx\n", base));
1985	<	lp = (uint32 *)(ROM_BASE + base);
1985	>	lp = (uint32 *)(ROMBaseHost + base);
1986		*lp = htonl(0x81000000 + XLM_BUS_CLOCK);        // lwz  r8,(bus clock speed)
1987		} else {
1988		static const uint8 dsl_bus_dat[] = {0x80, 0x83, 0xef, 0xe8, 0x80, 0x62, 0x00, 0x10, 0x7c, 0x04, 0x03, 0x96};
1989		if ((base = find_rom_data(dsl_offset, dsl_offset + 0x6000, dsl_bus_dat, sizeof(dsl_bus_dat))) == 0) return false;
1990		D(bug("dsl_bus %08lx\n", base));
1991	<	lp = (uint32 *)(ROM_BASE + base);
1991	>	lp = (uint32 *)(ROMBaseHost + base);
1992		*lp = htonl(0x80800000 + XLM_BUS_CLOCK);        // lwz  r4,(bus clock speed)
1993		}
1994		}
1995
1996		// Don't open InterruptTreeTNT in MotherBoardHAL init in DriverServicesLib init
1997		if (ROMType == ROMTYPE_ZANZIBAR) {
1998	<	lp = (uint32 *)(ROM_BASE + find_rom_resource(FOURCC('n','l','i','b'), -16408) + 0x16c);
1998	>	lp = (uint32 *)(ROMBaseHost + find_rom_resource(FOURCC('n','l','i','b'), -16408) + 0x16c);
1999		*lp = htonl(0x38600000);                // li   r3,0
2000		}
2001
#	Line 1959 | Line 2005 | static bool patch_68k(void)
2005		static const uint8 hpchk_dat[] = {0x80, 0x80, 0x03, 0x16, 0x94, 0x21, 0xff, 0xb0, 0x83, 0xc4, 0x00, 0x04};
2006		if ((base = find_rom_data(hpchk_offset, hpchk_offset + 0x3000, hpchk_dat, sizeof(hpchk_dat))) == 0) return false;
2007		D(bug("hpchk %08lx\n", base));
2008	<	lp = (uint32 *)(ROM_BASE + base);
2008	>	lp = (uint32 *)(ROMBaseHost + base);
2009		*lp = htonl(0x80800000 + XLM_ZERO_PAGE);                // lwz  r4,(zero page)
2010		}
2011
#	Line 1967 | Line 2013 | static bool patch_68k(void)
2013		static const uint8 name_reg_dat[] = {0x70, 0xff, 0xab, 0xeb};
2014		if ((base = find_rom_data(0x300, 0x380, name_reg_dat, sizeof(name_reg_dat))) == 0) return false;
2015		D(bug("name_reg %08lx\n", base));
2016	<	wp = (uint16 *)(ROM_BASE + base);
2016	>	wp = (uint16 *)(ROMBaseHost + base);
2017		*wp = htons(M68K_EMUL_OP_NAME_REGISTRY);
2018
2019		#if DISABLE_SCSI
#	Line 1979 | Line 2025 | static bool patch_68k(void)
2025		if ((base = find_rom_data(0x1c000, 0x28000, scsi_mgr_b_dat, sizeof(scsi_mgr_b_dat))) == 0) return false;
2026		}
2027		D(bug("scsi_mgr %08lx\n", base));
2028	<	wp = (uint16 *)(ROM_BASE + base);
2028	>	wp = (uint16 *)(ROMBaseHost + base);
2029		*wp++ = htons(0x21fc);                  // move.l       #xxx,0x624      (SCSIAtomic)
2030		*wp++ = htons((ROM_BASE + base + 18) >> 16);
2031		*wp++ = htons((ROM_BASE + base + 18) & 0xffff);
#	Line 1993 | Line 2039 | static bool patch_68k(void)
2039		*wp++ = htons(M68K_RTS);
2040		*wp++ = htons(M68K_EMUL_OP_SCSI_DISPATCH);
2041		*wp = htons(0x4ed0);                    // jmp          (a0)
2042	<	wp = (uint16 *)(ROM_BASE + base + 0x20);
2042	>	wp = (uint16 *)(ROMBaseHost + base + 0x20);
2043		*wp++ = htons(0x7000);                  // moveq        #0,d0
2044		*wp = htons(M68K_RTS);
2045		#endif
#	Line 2005 | Line 2051 | static bool patch_68k(void)
2051		static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
2052		if ((base = find_rom_data(0x1f500, 0x1f600, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
2053		D(bug("scsi_var %08lx\n", base));
2054	<	wp = (uint16 *)(ROM_BASE + base + 12);
2054	>	wp = (uint16 *)(ROMBaseHost + base + 12);
2055		*wp = htons(0x6000);    // bra
2056		}
2057
2058		static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x58, 0x48, 0xe7, 0x1f, 0x38};
2059		if ((base = find_rom_data(0x1f700, 0x1f800, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
2060		D(bug("scsi_var2 %08lx\n", base));
2061	<	wp = (uint16 *)(ROM_BASE + base);
2061	>	wp = (uint16 *)(ROMBaseHost + base);
2062		*wp++ = htons(0x7000);  // moveq #0,d0
2063		*wp = htons(M68K_RTS);
2064		}
#	Line 2021 | Line 2067 | static bool patch_68k(void)
2067		static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
2068		if ((base = find_rom_data(0x1d700, 0x1d800, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
2069		D(bug("scsi_var %08lx\n", base));
2070	<	wp = (uint16 *)(ROM_BASE + base + 12);
2070	>	wp = (uint16 *)(ROMBaseHost + base + 12);
2071		*wp = htons(0x6000);    // bra
2072		}
2073
2074		static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x5a, 0x48, 0xe7, 0x1f, 0x38};
2075		if ((base = find_rom_data(0x1d900, 0x1da00, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
2076		D(bug("scsi_var2 %08lx\n", base));
2077	<	wp = (uint16 *)(ROM_BASE + base);
2077	>	wp = (uint16 *)(ROMBaseHost + base);
2078		*wp++ = htons(0x7000);  // moveq #0,d0
2079		*wp = htons(M68K_RTS);
2080		}
#	Line 2039 | Line 2085 | static bool patch_68k(void)
2085		static const uint8 adb_init_dat[] = {0x08, 0x2b, 0x00, 0x05, 0x01, 0x5d, 0x66, 0xf8};
2086		if ((base = find_rom_data(0x31000, 0x3d000, adb_init_dat, sizeof(adb_init_dat))) == 0) return false;
2087		D(bug("adb_init %08lx\n", base));
2088	<	wp = (uint16 *)(ROM_BASE + base + 6);
2088	>	wp = (uint16 *)(ROMBaseHost + base + 6);
2089		*wp = htons(M68K_NOP);
2090
2091		// Modify check in InitResources() so that addresses >0x80000000 work
2092		static const uint8 init_res_dat[] = {0x4a, 0xb8, 0x0a, 0x50, 0x6e, 0x20};
2093		if ((base = find_rom_data(0x78000, 0x8c000, init_res_dat, sizeof(init_res_dat))) == 0) return false;
2094		D(bug("init_res %08lx\n", base));
2095	<	bp = (uint8 *)(ROM_BASE + base + 4);
2095	>	bp = (uint8 *)(ROMBaseHost + base + 4);
2096		*bp = 0x66;
2097
2098		// Modify vCheckLoad() so that we can patch resources (68k Resource Manager)
2099		static const uint8 check_load_dat[] = {0x20, 0x78, 0x07, 0xf0, 0x4e, 0xd0};
2100		if ((base = find_rom_data(0x78000, 0x8c000, check_load_dat, sizeof(check_load_dat))) == 0) return false;
2101		D(bug("check_load %08lx\n", base));
2102	<	wp = (uint16 *)(ROM_BASE + base);
2102	>	wp = (uint16 *)(ROMBaseHost + base);
2103		*wp++ = htons(M68K_JMP);
2104		*wp++ = htons((ROM_BASE + CHECK_LOAD_PATCH_SPACE) >> 16);
2105		*wp = htons((ROM_BASE + CHECK_LOAD_PATCH_SPACE) & 0xffff);
2106	<	wp = (uint16 *)(ROM_BASE + CHECK_LOAD_PATCH_SPACE);
2106	>	wp = (uint16 *)(ROMBaseHost + CHECK_LOAD_PATCH_SPACE);
2107		*wp++ = htons(0x2f03);                  // move.l       d3,-(a7)
2108		*wp++ = htons(0x2078);                  // move.l       $07f0,a0
2109		*wp++ = htons(0x07f0);
#	Line 2073 | Line 2119 | static bool patch_68k(void)
2119		sony_offset = find_rom_resource(FOURCC('n','d','r','v'), -20196);               // NewWorld 1.6 has "PCFloppy" ndrv
2120		if (sony_offset == 0)
2121		return false;
2122	<	lp = (uint32 *)(ROM_BASE + rsrc_ptr + 8);
2122	>	lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 8);
2123		*lp = htonl(FOURCC('D','R','V','R'));
2124	<	wp = (uint16 *)(ROM_BASE + rsrc_ptr + 12);
2124	>	wp = (uint16 *)(ROMBaseHost + rsrc_ptr + 12);
2125		*wp = htons(4);
2126		}
2127		D(bug("sony_offset %08lx\n", sony_offset));
2128	<	memcpy((void *)(ROM_BASE + sony_offset), sony_driver, sizeof(sony_driver));
2128	>	memcpy((void *)(ROMBaseHost + sony_offset), sony_driver, sizeof(sony_driver));
2129
2130		// Install .Disk and .AppleCD drivers
2131	<	memcpy((void *)(ROM_BASE + sony_offset + 0x100), disk_driver, sizeof(disk_driver));
2132	<	memcpy((void *)(ROM_BASE + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2131	>	memcpy((void *)(ROMBaseHost + sony_offset + 0x100), disk_driver, sizeof(disk_driver));
2132	>	memcpy((void *)(ROMBaseHost + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2133
2134		// Install serial drivers
2135		gen_ain_driver( ROM_BASE + sony_offset + 0x300);
#	Line 2093 | Line 2139 | static bool patch_68k(void)
2139
2140		// Copy icons to ROM
2141		SonyDiskIconAddr = ROM_BASE + sony_offset + 0x800;
2142	<	memcpy((void *)(ROM_BASE + sony_offset + 0x800), SonyDiskIcon, sizeof(SonyDiskIcon));
2142	>	memcpy(ROMBaseHost + sony_offset + 0x800, SonyDiskIcon, sizeof(SonyDiskIcon));
2143		SonyDriveIconAddr = ROM_BASE + sony_offset + 0xa00;
2144	<	memcpy((void *)(ROM_BASE + sony_offset + 0xa00), SonyDriveIcon, sizeof(SonyDriveIcon));
2144	>	memcpy(ROMBaseHost + sony_offset + 0xa00, SonyDriveIcon, sizeof(SonyDriveIcon));
2145		DiskIconAddr = ROM_BASE + sony_offset + 0xc00;
2146	<	memcpy((void *)(ROM_BASE + sony_offset + 0xc00), DiskIcon, sizeof(DiskIcon));
2146	>	memcpy(ROMBaseHost + sony_offset + 0xc00, DiskIcon, sizeof(DiskIcon));
2147		CDROMIconAddr = ROM_BASE + sony_offset + 0xe00;
2148	<	memcpy((void *)(ROM_BASE + sony_offset + 0xe00), CDROMIcon, sizeof(CDROMIcon));
2148	>	memcpy(ROMBaseHost + sony_offset + 0xe00, CDROMIcon, sizeof(CDROMIcon));
2149
2150		// Patch driver install routine
2151		static const uint8 drvr_install_dat[] = {0xa7, 0x1e, 0x21, 0xc8, 0x01, 0x1c, 0x4e, 0x75};
2152		if ((base = find_rom_data(0xb00, 0xd00, drvr_install_dat, sizeof(drvr_install_dat))) == 0) return false;
2153		D(bug("drvr_install %08lx\n", base));
2154	<	wp = (uint16 *)(ROM_BASE + base + 8);
2154	>	wp = (uint16 *)(ROMBaseHost + base + 8);
2155		*wp++ = htons(M68K_EMUL_OP_INSTALL_DRIVERS);
2156		*wp = htons(M68K_RTS);
2157
2158		// Don't install serial drivers from ROM
2159		if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
2160	<	wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('S','E','R','D'), 0));
2160	>	wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('S','E','R','D'), 0));
2161		*wp = htons(M68K_RTS);
2162		} else {
2163	<	wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0xc4);
2163	>	wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0xc4);
2164		*wp++ = htons(M68K_NOP);
2165		*wp++ = htons(M68K_NOP);
2166		*wp++ = htons(M68K_NOP);
2167		*wp++ = htons(M68K_NOP);
2168		*wp = htons(0x7000);                    // moveq        #0,d0
2169	<	wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0x8ee);
2169	>	wp = (uint16 *)(ROMBaseHost + find_rom_resource(FOURCC('s','l','0','5'), 2) + 0x8ee);
2170		*wp = htons(M68K_NOP);
2171		}
2172		uint32 nsrd_offset = find_rom_resource(FOURCC('n','s','r','d'), 1);
2173		if (nsrd_offset) {
2174	<	lp = (uint32 *)(ROM_BASE + rsrc_ptr + 8);
2174	>	lp = (uint32 *)(ROMBaseHost + rsrc_ptr + 8);
2175		*lp = htonl(FOURCC('x','s','r','d'));
2176		}
2177
2178		// Replace ADBOp()
2179	<	memcpy((void *)(ROM_BASE + find_rom_trap(0xa07c)), adbop_patch, sizeof(adbop_patch));
2179	>	memcpy(ROMBaseHost + find_rom_trap(0xa07c), adbop_patch, sizeof(adbop_patch));
2180
2181		// Replace Time Manager
2182	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa058));
2182	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa058));
2183		*wp++ = htons(M68K_EMUL_OP_INSTIME);
2184		*wp = htons(M68K_RTS);
2185	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa059));
2185	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa059));
2186		*wp++ = htons(0x40e7);          // move sr,-(sp)
2187		*wp++ = htons(0x007c);          // ori  #$0700,sr
2188		*wp++ = htons(0x0700);
2189		*wp++ = htons(M68K_EMUL_OP_RMVTIME);
2190		*wp++ = htons(0x46df);          // move (sp)+,sr
2191		*wp = htons(M68K_RTS);
2192	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa05a));
2192	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa05a));
2193		*wp++ = htons(0x40e7);          // move sr,-(sp)
2194		*wp++ = htons(0x007c);          // ori  #$0700,sr
2195		*wp++ = htons(0x0700);
2196		*wp++ = htons(M68K_EMUL_OP_PRIMETIME);
2197		*wp++ = htons(0x46df);          // move (sp)+,sr
2198		*wp = htons(M68K_RTS);
2199	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa093));
2199	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa093));
2200		*wp++ = htons(M68K_EMUL_OP_MICROSECONDS);
2201		*wp = htons(M68K_RTS);
2202
#	Line 2158 | Line 2204 | static bool patch_68k(void)
2204		static const uint8 egret_dat[] = {0x2f, 0x30, 0x81, 0xe2, 0x20, 0x10, 0x00, 0x18};
2205		if ((base = find_rom_data(0xa000, 0x10000, egret_dat, sizeof(egret_dat))) == 0) return false;
2206		D(bug("egret %08lx\n", base));
2207	<	wp = (uint16 *)(ROM_BASE + base);
2207	>	wp = (uint16 *)(ROMBaseHost + base);
2208		*wp++ = htons(0x7000);
2209		*wp = htons(M68K_RTS);
2210
#	Line 2166 | Line 2212 | static bool patch_68k(void)
2212		static const uint8 shutdown_dat[] = {0x40, 0xe7, 0x00, 0x7c, 0x07, 0x00, 0x48, 0xe7, 0x3f, 0x00, 0x2c, 0x00, 0x2e, 0x01};
2213		if ((base = find_rom_data(0x30000, 0x40000, shutdown_dat, sizeof(shutdown_dat))) == 0) return false;
2214		D(bug("shutdown %08lx\n", base));
2215	<	wp = (uint16 *)(ROM_BASE + base);
2215	>	wp = (uint16 *)(ROMBaseHost + base);
2216		if (ROMType == ROMTYPE_ZANZIBAR)
2217		*wp = htons(M68K_RTS);
2218		else if (ntohs(wp[-4]) == 0x61ff)
#	Line 2175 | Line 2221 | static bool patch_68k(void)
2221		wp[-2] = htons(0x6000); // bra
2222
2223		// Patch PowerOff()
2224	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xa05b));      // PowerOff()
2224	>	wp = (uint16 *)(ROMBaseHost + find_rom_trap(0xa05b));   // PowerOff()
2225		*wp = htons(M68K_EMUL_RETURN);
2226
2227		// Patch VIA interrupt handler
#	Line 2183 | Line 2229 | static bool patch_68k(void)
2229		if ((base = find_rom_data(0x13000, 0x1c000, via_int_dat, sizeof(via_int_dat))) == 0) return false;
2230		D(bug("via_int %08lx\n", base));
2231		uint32 level1_int = ROM_BASE + base;
2232	<	wp = (uint16 *)level1_int;                      // Level 1 handler
2232	>	wp = (uint16 *)(ROMBaseHost + base);    // Level 1 handler
2233		*wp++ = htons(0x7002);                  // moveq        #2,d0 (60Hz interrupt)
2234		*wp++ = htons(M68K_NOP);
2235		*wp++ = htons(M68K_NOP);
#	Line 2193 | Line 2239 | static bool patch_68k(void)
2239		static const uint8 via_int2_dat[] = {0x13, 0x7c, 0x00, 0x02, 0x1a, 0x00, 0x4e, 0x71, 0x52, 0xb8, 0x01, 0x6a};
2240		if ((base = find_rom_data(0x10000, 0x18000, via_int2_dat, sizeof(via_int2_dat))) == 0) return false;
2241		D(bug("via_int2 %08lx\n", base));
2242	<	wp = (uint16 *)(ROM_BASE + base);       // 60Hz handler
2242	>	wp = (uint16 *)(ROMBaseHost + base);    // 60Hz handler
2243		*wp++ = htons(M68K_EMUL_OP_IRQ);
2244		*wp++ = htons(0x4a80);                  // tst.l        d0
2245		*wp++ = htons(0x6700);                  // beq          xxx
#	Line 2203 | Line 2249 | static bool patch_68k(void)
2249		static const uint8 via_int3_dat[] = {0x48, 0xe7, 0xf0, 0xf0, 0x76, 0x01, 0x60, 0x26};
2250		if ((base = find_rom_data(0x15000, 0x19000, via_int3_dat, sizeof(via_int3_dat))) == 0) return false;
2251		D(bug("via_int3 %08lx\n", base));
2252	<	wp = (uint16 *)(ROM_BASE + base);       // CHRP level 1 handler
2252	>	wp = (uint16 *)(ROMBaseHost + base);    // CHRP level 1 handler
2253		*wp++ = htons(M68K_JMP);
2254		*wp++ = htons((level1_int - 12) >> 16);
2255		*wp = htons((level1_int - 12) & 0xffff);
#	Line 2211 | Line 2257 | static bool patch_68k(void)
2257
2258		// Patch PutScrap() for clipboard exchange with host OS
2259		uint32 put_scrap = find_rom_trap(0xa9fe);       // PutScrap()
2260	<	wp = (uint16 *)(ROM_BASE + PUT_SCRAP_PATCH_SPACE);
2260	>	wp = (uint16 *)(ROMBaseHost + PUT_SCRAP_PATCH_SPACE);
2261		*wp++ = htons(M68K_EMUL_OP_PUT_SCRAP);
2262		*wp++ = htons(M68K_JMP);
2263		*wp++ = htons((ROM_BASE + put_scrap) >> 16);
2264		*wp++ = htons((ROM_BASE + put_scrap) & 0xffff);
2265	<	lp = (uint32 *)(ROM_BASE + 0x22);
2266	<	lp = (uint32 *)(ROM_BASE + ntohl(*lp));
2221	<	lp[0xa9fe & 0x3ff] = htonl(PUT_SCRAP_PATCH_SPACE);
2265	>	base = ROM_BASE + ReadMacInt32(ROM_BASE + 0x22);
2266	>	WriteMacInt32(base + 4 * (0xa9fe & 0x3ff), PUT_SCRAP_PATCH_SPACE);
2267
2268		// Patch GetScrap() for clipboard exchange with host OS
2269		uint32 get_scrap = find_rom_trap(0xa9fd);       // GetScrap()
2270	<	wp = (uint16 *)(ROM_BASE + GET_SCRAP_PATCH_SPACE);
2270	>	wp = (uint16 *)(ROMBaseHost + GET_SCRAP_PATCH_SPACE);
2271		*wp++ = htons(M68K_EMUL_OP_GET_SCRAP);
2272		*wp++ = htons(M68K_JMP);
2273		*wp++ = htons((ROM_BASE + get_scrap) >> 16);
2274		*wp++ = htons((ROM_BASE + get_scrap) & 0xffff);
2275	<	lp = (uint32 *)(ROM_BASE + 0x22);
2276	<	lp = (uint32 *)(ROM_BASE + ntohl(*lp));
2232	<	lp[0xa9fd & 0x3ff] = htonl(GET_SCRAP_PATCH_SPACE);
2275	>	base = ROM_BASE + ReadMacInt32(ROM_BASE + 0x22);
2276	>	WriteMacInt32(base + 4 * (0xa9fd & 0x3ff), GET_SCRAP_PATCH_SPACE);
2277
2278		// Patch SynchIdleTime()
2279		if (PrefsFindBool("idlewait")) {
2280	<	wp = (uint16 *)(ROM_BASE + find_rom_trap(0xabf7) + 4);  // SynchIdleTime()
2281	<	D(bug("SynchIdleTime at %08lx\n", wp));
2280	>	base = find_rom_trap(0xabf7) + 4;                                               // SynchIdleTime()
2281	>	wp = (uint16 *)(ROMBaseHost + base);
2282	>	D(bug("SynchIdleTime at %08lx\n", base));
2283		if (ntohs(*wp) == 0x2078) {                                                             // movea.l      ExpandMem,a0
2284		*wp++ = htons(M68K_EMUL_OP_IDLE_TIME);
2285		*wp = htons(M68K_NOP);
#	Line 2268 | Line 2313 | static bool patch_68k(void)
2313		if ((thing = find_rom_resource(sifter_list[i].type, sifter_list[i].id)) != 0) {
2314		D(bug(" patching type %08x, id %d\n", sifter_list[i].type, sifter_list[i].id));
2315		// Install 68k glue code
2316	<	uint16 *wp = (uint16 *)(ROM_BASE + thing);
2316	>	uint16 *wp = (uint16 *)(ROMBaseHost + thing);
2317		*wp++ = htons(0x4e56); *wp++ = htons(0x0000);   // link a6,#0
2318		*wp++ = htons(0x48e7); *wp++ = htons(0x8018);   // movem.l d0/a3-a4,-(a7)
2319		*wp++ = htons(0x266e); *wp++ = htons(0x000c);   // movea.l $c(a6),a3
#	Line 2295 | Line 2340 | void InstallDrivers(void)
2340		SheepArray<SIZEOF_IOParam> pb_var;
2341		const uintptr pb = pb_var.addr();
2342
2343	+	#if DISABLE_SCSI
2344	+	// Setup fake SCSI Globals
2345	+	r.d[0] = 0x1000;
2346	+	Execute68kTrap(0xa71e, &r);             // NewPtrSysClear()
2347	+	uint32 scsi_globals = r.a[0];
2348	+	D(bug("Fake SCSI globals at %08lx\n", scsi_globals));
2349	+	WriteMacInt32(0xc0c, scsi_globals);     // Set SCSIGlobals
2350	+	#endif
2351	+
2352		// Install floppy driver
2353		if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) {
2354
#	Line 2309 | Line 2363 | void InstallDrivers(void)
2363		WriteMacInt16(dce + dCtlFlags, SonyDriverFlags);
2364		}
2365
2312	–	#if DISABLE_SCSI && HAVE_SIGSEGV_SKIP_INSTRUCTION
2313	–	// Fake SCSIGlobals
2314	–	WriteMacInt32(0xc0c, SheepMem::ZeroPage());
2315	–	#endif
2316	–
2366		// Open .Sony driver
2367		SheepString sony_str("\005.Sony");
2368		WriteMacInt8(pb + ioPermssn, 0);

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