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root/cebix/mon/src/mon_z80.cpp

Comparing mon/src/mon_z80.cpp (file contents):
Revision 1.1 by cebix, 2000-10-15T15:07:16Z vs.
Revision 1.7 by cebix, 2007-01-14T14:01:09Z

#	Line 1 | Line 1
1		/*
2		*  mon_z80.cpp - Z80 disassembler
3		*
4	<	*  cxmon (C) 1997-2000 Christian Bauer, Marc Hellwig
4	>	*  cxmon (C) 1997-2007 Christian Bauer, Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 46 | Line 46 | enum {
46		A_COND,         // condition code (bits 3..5 of opcode)
47		A_COND2,        // condition code (bits 3..4 of opcode)
48		A_BIT,          // bit number (bits 3..5 of opcode)
49	+	A_BIT_REG1,     // bit number (bits 3..5 of opcode) followed by 8-bit register (bits 0..2 of opcode)
50		A_RST,          // restart
51		A_BC_IND,       // (bc)
52		A_DE_IND,       // (de)
53		A_HL_IND,       // (hl) or (ix) or (iy)
54	+	A_XY_IND,       // (ix+d) or (iy+d)
55		A_SP_IND,       // (sp)
56		A_DE_HL,        // de,hl
57		A_AF_AF,        // af,af'
#	Line 206 | Line 208 | static void operand(SFILE *f, char mode,
208		break;
209
210		case A_REL:
211	<	mon_sprintf(f, "$%04x", (adr + 2 + (int8)mon_read_byte(adr)) & 0xffff); adr++;
211	>	mon_sprintf(f, "$%04x", (adr + 1 + (int8)mon_read_byte(adr)) & 0xffff); adr++;
212		break;
213
214		case A_A:
#	Line 227 | Line 229 | static void operand(SFILE *f, char mode,
229		if (reg == 6) {
230		if (ix || iy) {
231		mon_sprintf(f, "(%s+$%02x)", ix ? "ix" : "iy", mon_read_byte(adr)); adr++;
232	<	} else
232	>	} else {
233		mon_sprintf(f, "(hl)");
234	<	} else if (mode == A_REG1)
234	>	}
235	>	} else if (mode == A_REG1) {
236		mon_sprintf(f, "%s", ix ? reg_name_ix[reg] : (iy ? reg_name_iy[reg] : reg_name[reg]));
237	<	else
237	>	} else {
238		mon_sprintf(f, "%s", reg_name[reg]);
239	+	}
240		break;
241		}
242
#	Line 242 | Line 246 | static void operand(SFILE *f, char mode,
246		if (reg == 6) {
247		if (ix || iy) {
248		mon_sprintf(f, "(%s+$%02x)", ix ? "ix" : "iy", mon_read_byte(adr)); adr++;
249	<	} else
249	>	} else {
250		mon_sprintf(f, "(hl)");
251	<	} else if (mode == A_REG2)
251	>	}
252	>	} else if (mode == A_REG2) {
253		mon_sprintf(f, "%s", ix ? reg_name_ix[reg] : (iy ? reg_name_iy[reg] : reg_name[reg]));
254	<	else
254	>	} else {
255		mon_sprintf(f, "%s", reg_name[reg]);
256	+	}
257		break;
258		}
259
260	<	case A_REG3:
261	<	mon_sprintf(f, reg_name_16[(op >> 4) & 3]);
260	>	case A_REG3: {
261	>	int reg = (op >> 4) & 3;
262	>	if (reg == 2 && (ix || iy)) {
263	>	mon_sprintf(f, ix ? "ix" : "iy");
264	>	} else {
265	>	mon_sprintf(f, reg_name_16[reg]);
266	>	}
267		break;
268	+	}
269
270	<	case A_REG4:
271	<	mon_sprintf(f, reg_name_16_2[(op >> 4) & 3]);
270	>	case A_REG4: {
271	>	int reg = (op >> 4) & 3;
272	>	if (reg == 2 && (ix || iy)) {
273	>	mon_sprintf(f, ix ? "ix" : "iy");
274	>	} else {
275	>	mon_sprintf(f, reg_name_16_2[reg]);
276	>	}
277		break;
278	+	}
279
280		case A_COND:
281		mon_sprintf(f, cond_name[(op >> 3) & 7]);
#	Line 271 | Line 289 | static void operand(SFILE *f, char mode,
289		mon_sprintf(f, "%d", (op >> 3) & 7);
290		break;
291
292	+	case A_BIT_REG1: { // undoc
293	+	int reg = op & 7;
294	+	if (reg == 6) {
295	+	mon_sprintf(f, "%d", (op >> 3) & 7);
296	+	} else {
297	+	mon_sprintf(f, "%d,%s", (op >> 3) & 7, reg_name[reg]);
298	+	}
299	+	break;
300	+	}
301	+
302		case A_RST:
303		mon_sprintf(f, "$%02x", op & 0x38);
304		break;
#	Line 287 | Line 315 | static void operand(SFILE *f, char mode,
315		mon_sprintf(f, ix ? "(ix)" : (iy ? "(iy)" : "(hl)"));
316		break;
317
318	+	case A_XY_IND: // undoc
319	+	mon_sprintf(f, "(%s+$%02x)", ix ? "ix" : "iy", mon_read_byte(adr)); adr++;
320	+	break;
321	+
322		case A_SP_IND:
323		mon_sprintf(f, "(sp)");
324		break;
#	Line 334 | Line 366 | static int disass_cb(SFILE *f, uint32 ad
366		}
367
368		// Decode mnemonic and addressing modes
369	<	char mnem, dst_mode = A_IMPL, src_mode = A_IMPL;
369	>	char mnem = M_ILLEGAL, dst_mode = A_IMPL, src_mode = A_IMPL;
370		switch (op & 0xc0) {
371		case 0x00:
372	<	dst_mode = A_REG1;
372	>	dst_mode = A_REG1X;
373	>	if ((ix || iy) && ((op & 7) != 6))
374	>	src_mode = A_XY_IND;
375		switch ((op >> 3) & 7) {
376		case 0: mnem = M_RLC; break;
377		case 1: mnem = M_RRC; break;
#	Line 345 | Line 379 | static int disass_cb(SFILE *f, uint32 ad
379		case 3: mnem = M_RR; break;
380		case 4: mnem = M_SLA; break;
381		case 5: mnem = M_SRA; break;
382	<	case 6: mnem = M_SL1; break;
382	>	case 6: mnem = M_SL1; break; // undoc
383		case 7: mnem = M_SRL; break;
384		}
385		break;
386		case 0x40:
387	<	mnem = M_BIT; dst_mode = A_BIT; src_mode = A_REG1;
387	>	mnem = M_BIT; dst_mode = A_BIT;
388	>	if (ix || iy)
389	>	src_mode = A_XY_IND;
390	>	else
391	>	src_mode = A_REG1;
392		break;
393		case 0x80:
394	<	mnem = M_RES; dst_mode = A_BIT; src_mode = A_REG1;
394	>	mnem = M_RES;
395	>	if (ix || iy) {
396	>	dst_mode = A_BIT_REG1;
397	>	src_mode = A_XY_IND;
398	>	} else {
399	>	dst_mode = A_BIT;
400	>	src_mode = A_REG1;
401	>	}
402		break;
403		case 0xc0:
404	<	mnem = M_SET; dst_mode = A_BIT; src_mode = A_REG1;
404	>	mnem = M_SET;
405	>	if (ix || iy) {
406	>	dst_mode = A_BIT_REG1;
407	>	src_mode = A_XY_IND;
408	>	} else {
409	>	dst_mode = A_BIT;
410	>	src_mode = A_REG1;
411	>	}
412		break;
413		}
414
#	Line 380 | Line 432 | static int disass_ed(SFILE *f, uint32 ad
432		case 0x60:
433		case 0x68:
434		case 0x78:
435	<	mon_sprintf(f, "in\t%s,(c)", reg_name[(op >> 3) & 7]);
435	>	mon_sprintf(f, "in   %s,(c)", reg_name[(op >> 3) & 7]);
436		return 1;
437		case 0x70:
438	<	mon_sprintf(f, "in\t(c)");
438	>	mon_sprintf(f, "in   (c)");
439		return 1;
440
441		case 0x41:
#	Line 393 | Line 445 | static int disass_ed(SFILE *f, uint32 ad
445		case 0x61:
446		case 0x69:
447		case 0x79:
448	<	mon_sprintf(f, "out\t(c),%s", reg_name[(op >> 3) & 7]);
448	>	mon_sprintf(f, "out  (c),%s", reg_name[(op >> 3) & 7]);
449		return 1;
450		case 0x71:      // undoc
451	<	mon_sprintf(f, "out\t(c),0");
451	>	mon_sprintf(f, "out  (c),0");
452		return 1;
453
454		case 0x42:
#	Line 465 | Line 517 | static int disass_ed(SFILE *f, uint32 ad
517		break;
518
519		case 0x47:
520	<	mon_sprintf(f, "ld\ti,a");
520	>	mon_sprintf(f, "ld   i,a");
521		return 1;
522		case 0x4f:
523	<	mon_sprintf(f, "ld\tr,a");
523	>	mon_sprintf(f, "ld   r,a");
524		return 1;
525		case 0x57:
526	<	mon_sprintf(f, "ld\ta,i");
526	>	mon_sprintf(f, "ld   a,i");
527		return 1;
528		case 0x5f:
529	<	mon_sprintf(f, "ld\ta,r");
529	>	mon_sprintf(f, "ld   a,r");
530		return 1;
531
532		case 0x67: mnem = M_RRD; break;
#	Line 498 | Line 550 | static int disass_ed(SFILE *f, uint32 ad
550		case 0xbb: mnem = M_OTDR; break;
551
552		default:
553	<	mnem = M_ILLEGAL;
553	>	mnem = M_NOP;
554		break;
555		}
556

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