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root/cebix/mon/src/mon_z80.cpp
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Comparing mon/src/mon_z80.cpp (file contents):
Revision 1.7 by cebix, 2007-01-14T14:01:09Z vs.
Revision 1.8 by cebix, 2007-01-21T17:32:05Z

# Line 27 | Line 27
27  
28  
29   // Addressing modes
30 < enum {
30 > enum AddrMode {
31          A_IMPL,
32          A_IMM8,         // xx
33          A_IMM16,        // xxxx
# Line 58 | Line 58 | enum {
58   };
59  
60   // Mnemonics
61 < enum {
61 > enum Mnemonic {
62          M_ADC, M_ADD, M_AND, M_BIT, M_CALL, M_CCF, M_CP, M_CPD, M_CPDR, M_CPI,
63          M_CPIR, M_CPL, M_DAA, M_DEC, M_DI, M_DJNZ, M_EI, M_EX, M_EXX, M_HALT,
64          M_IM0, M_IM1, M_IM2, M_IN, M_INC, M_IND, M_INDR, M_INI, M_INIR, M_JP,
# Line 79 | Line 79 | static const char mnem_3[] = "cddtlf ddi
79   static const char mnem_4[] = "    l   r r    z   t012   r r    r r   rr di h  in   a    a            ";
80  
81   // Mnemonic for each opcode
82 < static const char mnemonic[256] = {
82 > static const Mnemonic mnemonic[256] = {
83          M_NOP , M_LD , M_LD , M_INC    , M_INC , M_DEC    , M_LD  , M_RLCA,     // 00
84          M_EX  , M_ADD, M_LD , M_DEC    , M_INC , M_DEC    , M_LD  , M_RRCA,
85          M_DJNZ, M_LD , M_LD , M_INC    , M_INC , M_DEC    , M_LD  , M_RLA ,     // 10
# Line 117 | Line 117 | static const char mnemonic[256] = {
117   // Source/destination addressing modes for each opcode
118   #define A(d,s) (((A_ ## d) << 8) | (A_ ## s))
119  
120 < static const short adr_mode[256] = {
120 > static const int adr_mode[256] = {
121          A(IMPL,IMPL)  , A(REG3,IMM16) , A(BC_IND,A)  , A(REG3,IMPL) , A(REG2,IMPL) , A(REG2,IMPL) , A(REG2,IMM8) , A(IMPL,IMPL) ,       // 00
122          A(AF_AF,IMPL) , A(HL,REG3)    , A(A,BC_IND)  , A(REG3,IMPL) , A(REG2,IMPL) , A(REG2,IMPL) , A(REG2,IMM8) , A(IMPL,IMPL) ,
123          A(REL,IMPL)   , A(REG3,IMM16) , A(DE_IND,A)  , A(REG3,IMPL) , A(REG2,IMPL) , A(REG2,IMPL) , A(REG2,IMM8) , A(IMPL,IMPL) ,       // 10
# Line 333 | Line 333 | static void operand(SFILE *f, char mode,
333          }
334   }
335  
336 < static int print_instr(SFILE *f, char mnem, char dst_mode, char src_mode, uint32 adr, uint8 op, bool ix, bool iy)
336 > static int print_instr(SFILE *f, Mnemonic mnem, AddrMode dst_mode, AddrMode src_mode, uint32 adr, uint8 op, bool ix, bool iy)
337   {
338          uint32 orig_adr = adr;
339  
# Line 366 | Line 366 | static int disass_cb(SFILE *f, uint32 ad
366          }
367  
368          // Decode mnemonic and addressing modes
369 <        char mnem = M_ILLEGAL, dst_mode = A_IMPL, src_mode = A_IMPL;
369 >        Mnemonic mnem = M_ILLEGAL;
370 >        AddrMode dst_mode = A_IMPL, src_mode = A_IMPL;
371 >
372          switch (op & 0xc0) {
373                  case 0x00:
374                          dst_mode = A_REG1X;
# Line 423 | Line 425 | static int disass_ed(SFILE *f, uint32 ad
425          uint8 op = mon_read_byte(adr);
426  
427          // Decode mnemonic and addressing modes
428 <        char mnem, dst_mode = A_IMPL, src_mode = A_IMPL;
428 >        Mnemonic mnem;
429 >        AddrMode dst_mode = A_IMPL, src_mode = A_IMPL;
430 >
431          switch (op) {
432                  case 0x40:
433                  case 0x48:
# Line 564 | Line 568 | static int disass(SFILE *f, uint32 adr,
568          if (op == 0xcb)
569                  return disass_cb(f, adr + 1, ix, iy) + 1;
570          else
571 <                return print_instr(f, mnemonic[op], adr_mode[op] >> 8, adr_mode[op] & 0xff, adr + 1, op, ix, iy) + 1;
571 >                return print_instr(f, mnemonic[op], AddrMode(adr_mode[op] >> 8), AddrMode(adr_mode[op] & 0xff), adr + 1, op, ix, iy) + 1;
572   }
573  
574   int disass_z80(FILE *f, uint32 adr)

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