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root/cebix/BasiliskII/src/rsrc_patches.cpp

Comparing BasiliskII/src/rsrc_patches.cpp (file contents):
Revision 1.5 by cebix, 2000-07-22T16:07:18Z vs.
Revision 1.11 by cebix, 2002-01-15T14:58:32Z

#	Line 1 | Line 1
1		/*
2		*  rsrc_patches.cpp - Resource patches
3		*
4	<	*  Basilisk II (C) 1997-2000 Christian Bauer
4	>	*  Basilisk II (C) 1997-2002 Christian Bauer
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 37 | Line 37
37		#include "debug.h"
38
39
40	–	#if !EMULATED_68K
41	–	// Assembly functions
42	–	extern "C" void Scod060Patch1(void);
43	–	extern "C" void Scod060Patch2(void);
44	–	extern "C" void ThInitFPUPatch(void);
45	–	#endif
46	–
47	–
40		/*
41		*  Search resource for byte string, return offset (or 0)
42		*/
#	Line 68 | Line 60 | void CheckLoad(uint32 type, int16 id, ui
60		{
61		uint16 *p16;
62		uint32 base;
63	<	D(bug("vCheckLoad %c%c%c%c (%08x) ID %d, data %08x, size %d\n", (char)(type >> 24), (char)((type >> 16) & 0xff), (char )((type >> 8) & 0xff), (char )(type & 0xff), type, id, p, size));
64	<
63	>	D(bug("vCheckLoad %c%c%c%c (%08x) ID %d, data %p, size %d\n", (char)(type >> 24), (char)((type >> 16) & 0xff), (char )((type >> 8) & 0xff), (char )(type & 0xff), type, id, p, size));
64	>
65		if (type == FOURCC('b','o','o','t') && id == 3) {
66		D(bug(" boot 3 found\n"));
67
#	Line 84 | Line 76 | void CheckLoad(uint32 type, int16 id, ui
76		}
77
78		#if !ROM_IS_WRITE_PROTECTED
79	<	// Set fake handle at 0x0000 to some safe place (so broken Mac programs won't write into Mac ROM) (7.5, 8.0)
79	>	// Set fake handle at 0x0000 to some safe place (so broken Mac programs won't write into Mac ROM) (7.1, 7.5, 8.0)
80		static const uint8 dat2[] = {0x20, 0x78, 0x02, 0xae, 0xd1, 0xfc, 0x00, 0x01, 0x00, 0x00, 0x21, 0xc8, 0x00, 0x00};
81		base = find_rsrc_data(p, size, dat2, sizeof(dat2));
82		if (base) {
83		p16 = (uint16 *)(p + base);
84
85	<	#if defined(AMIGA) || defined(__NetBSD__)
85	>	#if defined(USE_SCRATCHMEM_SUBTERFUGE)
86		// Set 0x0000 to scratch memory area
87	<	extern uint32 ScratchMem;
87	>	extern uint8 *ScratchMem;
88	>	const uint32 ScratchMemBase = Host2MacAddr(ScratchMem);
89		*p16++ = htons(0x207c);                 // move.l       #ScratchMem,a0
90	<	*p16++ = htons(ScratchMem >> 16);
91	<	*p16++ = htons(ScratchMem);
90	>	*p16++ = htons(ScratchMemBase >> 16);
91	>	*p16++ = htons(ScratchMemBase);
92		*p16++ = htons(M68K_NOP);
93		*p16 = htons(M68K_NOP);
94		#else
#	Line 108 | Line 101 | void CheckLoad(uint32 type, int16 id, ui
101		} else if (type == FOURCC('b','o','o','t') && id == 2) {
102		D(bug(" boot 2 found\n"));
103
104	<	// Set fake handle at 0x0000 to some safe place (so broken Mac programs won't write into Mac ROM) (7.5, 8.0)
104	>	// Set fake handle at 0x0000 to some safe place (so broken Mac programs won't write into Mac ROM) (7.1, 7.5, 8.0)
105		static const uint8 dat[] = {0x20, 0x78, 0x02, 0xae, 0xd1, 0xfc, 0x00, 0x01, 0x00, 0x00, 0x21, 0xc8, 0x00, 0x00};
106		base = find_rsrc_data(p, size, dat, sizeof(dat));
107		if (base) {
108		p16 = (uint16 *)(p + base);
109
110	<	#if defined(AMIGA) || defined(__NetBSD__)
110	>	#if defined(USE_SCRATCHMEM_SUBTERFUGE)
111		// Set 0x0000 to scratch memory area
112	<	extern uint32 ScratchMem;
112	>	extern uint8 *ScratchMem;
113	>	const uint32 ScratchMemBase = Host2MacAddr(ScratchMem);
114		*p16++ = htons(0x207c);                 // move.l       #ScratchMem,a0
115	<	*p16++ = htons(ScratchMem >> 16);
116	<	*p16++ = htons(ScratchMem);
115	>	*p16++ = htons(ScratchMemBase >> 16);
116	>	*p16++ = htons(ScratchMemBase);
117		*p16++ = htons(M68K_NOP);
118		*p16 = htons(M68K_NOP);
119		#else
#	Line 160 | Line 154 | void CheckLoad(uint32 type, int16 id, ui
154		} else if (type == FOURCC('p','t','c','h') && id == 26) {
155		D(bug(" ptch 26 found\n"));
156
157	<	// Trap ABC4 is initialized with absolute ROM address (7.5, 7.6, 7.6.1, 8.0)
157	>	// Trap ABC4 is initialized with absolute ROM address (7.1, 7.5, 7.6, 7.6.1, 8.0)
158		static const uint8 dat[] = {0x40, 0x83, 0x36, 0x10};
159		base = find_rsrc_data(p, size, dat, sizeof(dat));
160		if (base) {
#	Line 195 | Line 189 | void CheckLoad(uint32 type, int16 id, ui
189		D(bug("  patch 2 applied\n"));
190		}
191
198	–	#if !EMULATED_68K
199	–	} else if (CPUIs68060 && (type == FOURCC('g','p','c','h') && id == 669 || type == FOURCC('l','p','c','h') && id == 63)) {
200	–	D(bug(" gpch 669/lpch 63 found\n"));
201	–
202	–	static uint16 ThPatchSpace[1024];       // Replacement routines are constructed here
203	–	uint16 *q = ThPatchSpace;
204	–	uint32 start;
205	–	int i;
206	–
207	–	// Patch Thread Manager thread switcher for 68060 FPU (7.5, 8.0)
208	–	static const uint8 dat[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x18};
209	–	base = find_rsrc_data(p, size, dat, sizeof(dat));
210	–	if (base) {     // Skip first routine (no FPU -> no FPU)
211	–
212	–	base = find_rsrc_data(p, size - base - 2, dat, sizeof(dat), base + 2);
213	–	if (base) {     // no FPU -> FPU
214	–
215	–	p16 = (uint16 *)(p + base);
216	–	start = (uint32)q;
217	–	for (i=0; i<28; i++) *q++ = *p16++;
218	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state or "FPU state saved" flag set?)
219	–	*q++ = htons(2);
220	–	*q++ = htons(0x6712);           // beq
221	–	*q++ = htons(0x588f);           // addq.l #2,sp                         (flag set, skip it)
222	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpcr           (restore FPU registers)
223	–	*q++ = htons(0x9000);
224	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpsr
225	–	*q++ = htons(0x8800);
226	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpiar
227	–	*q++ = htons(0x8400);
228	–	*q++ = htons(0xf21f);           // fmovem.x (sp)+,fp0-fp7
229	–	*q++ = htons(0xd0ff);
230	–	*q++ = htons(0xf35f);           // frestore (sp)+
231	–	*q++ = htons(0x4e75);           // rts
232	–
233	–	p16 = (uint16 *)(p + base);
234	–	*p16++ = htons(M68K_JMP);
235	–	*p16++ = htons(start >> 16);
236	–	*p16 = htons(start & 0xffff);
237	–	FlushCodeCache(p + base, 6);
238	–	D(bug("  patch 1 applied\n"));
239	–
240	–	static const uint8 dat2[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x28};
241	–	base = find_rsrc_data(p, size, dat2, sizeof(dat2));
242	–	if (base) {     // FPU -> FPU
243	–
244	–	p16 = (uint16 *)(p + base);
245	–	start = (uint32)q;
246	–	for (i=0; i<4; i++) *q++ = *p16++;
247	–	*q++ = htons(0x6736);           // beq
248	–	*q++ = htons(0xf327);           // fsave -(sp)                          (save FPU state frame)
249	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state?)
250	–	*q++ = htons(2);
251	–	*q++ = htons(0x6716);           // beq
252	–	*q++ = htons(0xf227);           // fmovem.x fp0-fp7,-(sp)       (no, save FPU registers)
253	–	*q++ = htons(0xe0ff);
254	–	*q++ = htons(0xf227);           // fmove.l fpiar,-(sp)
255	–	*q++ = htons(0xa400);
256	–	*q++ = htons(0xf227);           // fmove.l fpsr,-(sp)
257	–	*q++ = htons(0xa800);
258	–	*q++ = htons(0xf227);           // fmove.l fpcr,-(sp)
259	–	*q++ = htons(0xb000);
260	–	*q++ = htons(0x4879);           // pea -1                                       (push "FPU state saved" flag)
261	–	*q++ = htons(0xffff);
262	–	*q++ = htons(0xffff);
263	–	p16 += 9;
264	–	for (i=0; i<23; i++) *q++ = *p16++;
265	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state or "FPU state saved" flag set?)
266	–	*q++ = htons(2);
267	–	*q++ = htons(0x6712);           // beq
268	–	*q++ = htons(0x588f);           // addq.l #2,sp                         (flag set, skip it)
269	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpcr           (restore FPU registers)
270	–	*q++ = htons(0x9000);
271	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpsr
272	–	*q++ = htons(0x8800);
273	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpiar
274	–	*q++ = htons(0x8400);
275	–	*q++ = htons(0xf21f);           // fmovem.x (sp)+,fp0-fp7
276	–	*q++ = htons(0xd0ff);
277	–	*q++ = htons(0xf35f);           // frestore (sp)+
278	–	*q++ = htons(0x4e75);           // rts
279	–
280	–	p16 = (uint16 *)(p + base);
281	–	*p16++ = htons(M68K_JMP);
282	–	*p16++ = htons(start >> 16);
283	–	*p16 = htons(start & 0xffff);
284	–	FlushCodeCache(p + base, 6);
285	–	D(bug("  patch 2 applied\n"));
286	–
287	–	base = find_rsrc_data(p, size - base - 2, dat2, sizeof(dat2), base + 2);
288	–	if (base) {     // FPU -> no FPU
289	–
290	–	p16 = (uint16 *)(p + base);
291	–	start = (uint32)q;
292	–	for (i=0; i<4; i++) *q++ = *p16++;
293	–	*q++ = htons(0x6736);           // beq
294	–	*q++ = htons(0xf327);           // fsave -(sp)                          (save FPU state frame)
295	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state?)
296	–	*q++ = htons(2);
297	–	*q++ = htons(0x6716);           // beq
298	–	*q++ = htons(0xf227);           // fmovem.x fp0-fp7,-(sp)       (no, save FPU registers)
299	–	*q++ = htons(0xe0ff);
300	–	*q++ = htons(0xf227);           // fmove.l fpiar,-(sp)
301	–	*q++ = htons(0xa400);
302	–	*q++ = htons(0xf227);           // fmove.l fpsr,-(sp)
303	–	*q++ = htons(0xa800);
304	–	*q++ = htons(0xf227);           // fmove.l fpcr,-(sp)
305	–	*q++ = htons(0xb000);
306	–	*q++ = htons(0x4879);           // pea -1                                       (push "FPU state saved" flag)
307	–	*q++ = htons(0xffff);
308	–	*q++ = htons(0xffff);
309	–	p16 += 9;
310	–	for (i=0; i<24; i++) *q++ = *p16++;
311	–
312	–	p16 = (uint16 *)(p + base);
313	–	*p16++ = htons(M68K_JMP);
314	–	*p16++ = htons(start >> 16);
315	–	*p16 = htons(start & 0xffff);
316	–	FlushCodeCache(p + base, 6);
317	–	D(bug("  patch 3 applied\n"));
318	–	}
319	–	}
320	–	}
321	–	}
322	–
323	–	// Patch Thread Manager thread switcher for 68060 FPU (additional routines under 8.0 for Mixed Mode Manager)
324	–	static const uint8 dat3[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x40};
325	–	base = find_rsrc_data(p, size, dat3, sizeof(dat3));
326	–	if (base) {     // Skip first routine (no FPU -> no FPU)
327	–
328	–	base = find_rsrc_data(p, size - base - 2, dat3, sizeof(dat3), base + 2);
329	–	if (base) {     // no FPU -> FPU
330	–
331	–	p16 = (uint16 *)(p + base);
332	–	start = (uint32)q;
333	–	for (i=0; i<48; i++) *q++ = *p16++;
334	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state or "FPU state saved" flag set?)
335	–	*q++ = htons(2);
336	–	*q++ = htons(0x6712);           // beq
337	–	*q++ = htons(0x588f);           // addq.l #2,sp                         (flag set, skip it)
338	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpcr           (restore FPU registers)
339	–	*q++ = htons(0x9000);
340	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpsr
341	–	*q++ = htons(0x8800);
342	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpiar
343	–	*q++ = htons(0x8400);
344	–	*q++ = htons(0xf21f);           // fmovem.x (sp)+,fp0-fp7
345	–	*q++ = htons(0xd0ff);
346	–	p16 += 7;
347	–	for (i=0; i<20; i++) *q++ = *p16++;
348	–
349	–	p16 = (uint16 *)(p + base);
350	–	*p16++ = htons(M68K_JMP);
351	–	*p16++ = htons(start >> 16);
352	–	*p16 = htons(start & 0xffff);
353	–	FlushCodeCache(p + base, 6);
354	–	D(bug("  patch 4 applied\n"));
355	–
356	–	static const uint8 dat4[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x50};
357	–	base = find_rsrc_data(p, size, dat4, sizeof(dat4));
358	–	if (base) {     // FPU -> FPU
359	–
360	–	p16 = (uint16 *)(p + base);
361	–	start = (uint32)q;
362	–	for (i=0; i<4; i++) *q++ = *p16++;
363	–	*q++ = htons(0x675e);           // beq
364	–	p16++;
365	–	for (i=0; i<21; i++) *q++ = *p16++;
366	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state?)
367	–	*q++ = htons(2);
368	–	*q++ = htons(0x6716);           // beq
369	–	*q++ = htons(0xf227);           // fmovem.x fp0-fp7,-(sp)       (no, save FPU registers)
370	–	*q++ = htons(0xe0ff);
371	–	*q++ = htons(0xf227);           // fmove.l fpiar,-(sp)
372	–	*q++ = htons(0xa400);
373	–	*q++ = htons(0xf227);           // fmove.l fpsr,-(sp)
374	–	*q++ = htons(0xa800);
375	–	*q++ = htons(0xf227);           // fmove.l fpcr,-(sp)
376	–	*q++ = htons(0xb000);
377	–	*q++ = htons(0x4879);           // pea -1                                       (push "FPU state saved" flag)
378	–	*q++ = htons(0xffff);
379	–	*q++ = htons(0xffff);
380	–	p16 += 7;
381	–	for (i=0; i<23; i++) *q++ = *p16++;
382	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state or "FPU state saved" flag set?)
383	–	*q++ = htons(2);
384	–	*q++ = htons(0x6712);           // beq
385	–	*q++ = htons(0x588f);           // addq.l #2,sp                         (flag set, skip it)
386	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpcr           (restore FPU registers)
387	–	*q++ = htons(0x9000);
388	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpsr
389	–	*q++ = htons(0x8800);
390	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpiar
391	–	*q++ = htons(0x8400);
392	–	*q++ = htons(0xf21f);           // fmovem.x (sp)+,fp0-fp7
393	–	*q++ = htons(0xd0ff);
394	–	p16 += 7;
395	–	for (i=0; i<20; i++) *q++ = *p16++;
396	–
397	–	p16 = (uint16 *)(p + base);
398	–	*p16++ = htons(M68K_JMP);
399	–	*p16++ = htons(start >> 16);
400	–	*p16 = htons(start & 0xffff);
401	–	FlushCodeCache(p + base, 6);
402	–	D(bug("  patch 5 applied\n"));
403	–
404	–	base = find_rsrc_data(p, size - base - 2, dat4, sizeof(dat4), base + 2);
405	–	if (base) {     // FPU -> no FPU
406	–
407	–	p16 = (uint16 *)(p + base);
408	–	start = (uint32)q;
409	–	for (i=0; i<4; i++) *q++ = *p16++;
410	–	*q++ = htons(0x675e);           // beq
411	–	p16++;
412	–	for (i=0; i<21; i++) *q++ = *p16++;
413	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state?)
414	–	*q++ = htons(2);
415	–	*q++ = htons(0x6716);           // beq
416	–	*q++ = htons(0xf227);           // fmovem.x fp0-fp7,-(sp)       (no, save FPU registers)
417	–	*q++ = htons(0xe0ff);
418	–	*q++ = htons(0xf227);           // fmove.l fpiar,-(sp)
419	–	*q++ = htons(0xa400);
420	–	*q++ = htons(0xf227);           // fmove.l fpsr,-(sp)
421	–	*q++ = htons(0xa800);
422	–	*q++ = htons(0xf227);           // fmove.l fpcr,-(sp)
423	–	*q++ = htons(0xb000);
424	–	*q++ = htons(0x4879);           // pea -1                                       (push "FPU state saved" flag)
425	–	*q++ = htons(0xffff);
426	–	*q++ = htons(0xffff);
427	–	p16 += 7;
428	–	for (i=0; i<42; i++) *q++ = *p16++;
429	–
430	–	p16 = (uint16 *)(p + base);
431	–	*p16++ = htons(M68K_JMP);
432	–	*p16++ = htons(start >> 16);
433	–	*p16 = htons(start & 0xffff);
434	–	FlushCodeCache(p + base, 6);
435	–	D(bug("  patch 6 applied\n"));
436	–	}
437	–	}
438	–	}
439	–	}
440	–
441	–	FlushCodeCache(ThPatchSpace, 1024);
442	–
443	–	// Patch Thread Manager FPU init for 68060 FPU (7.5, 8.0)
444	–	static const uint8 dat5[] = {0x4a, 0x28, 0x00, 0xa4, 0x67, 0x0a, 0x4a, 0x2c, 0x00, 0x40};
445	–	base = find_rsrc_data(p, size, dat5, sizeof(dat5));
446	–	if (base) {
447	–	p16 = (uint16 *)(p + base + 6);
448	–	*p16++ = htons(M68K_JSR);
449	–	*p16++ = htons((uint32)ThInitFPUPatch >> 16);
450	–	*p16++ = htons((uint32)ThInitFPUPatch & 0xffff);
451	–	*p16++ = htons(M68K_NOP);
452	–	*p16 = htons(M68K_NOP);
453	–	FlushCodeCache(p + base + 6, 10);
454	–	D(bug("  patch 7 applied\n"));
455	–	}
456	–	#endif
457	–
192		} else if (type == FOURCC('g','p','c','h') && id == 750) {
193		D(bug(" gpch 750 found\n"));
194
195		// Don't use PTEST instruction in BlockMove() (7.5, 7.6, 7.6.1, 8.0)
196	<	static const uint8 dat[] = {0xa0, 0x8d, 0x0c, 0x81, 0x00, 0x00, 0x0c, 0x00, 0x65, 0x06, 0x4e, 0x71, 0xf4, 0xf8};
196	>	static const uint8 dat[] = {0x20, 0x5f, 0x22, 0x5f, 0x0c, 0x38, 0x00, 0x04, 0x01, 0x2f};
197		base = find_rsrc_data(p, size, dat, sizeof(dat));
198		if (base) {
199	<	p16 = (uint16 *)(p + base + 8);
200	<	*p16 = htons(M68K_NOP);
201	<	FlushCodeCache(p + base + 8, 2);
199	>	p16 = (uint16 *)(p + base + 4);
200	>	*p16++ = htons(M68K_EMUL_OP_BLOCK_MOVE);
201	>	*p16++ = htons(0x7000);
202	>	*p16 = htons(M68K_RTS);
203	>	FlushCodeCache(p + base + 4, 6);
204		D(bug("  patch 1 applied\n"));
205		}
206
#	Line 510 | Line 246 | void CheckLoad(uint32 type, int16 id, ui
246		D(bug("  patch 2 applied\n"));
247		}
248
513	–	#if !EMULATED_68K
514	–	} else if (CPUIs68060 && type == FOURCC('s','c','o','d') && (id == -16463 || id == -16464)) {
515	–	D(bug(" scod -16463/-16464 found\n"));
516	–
517	–	// Correct 68060 FP frame handling in Process Manager task switches (7.1, 7.5, 8.0)
518	–	static const uint8 dat[] = {0xf3, 0x27, 0x4a, 0x17};
519	–	base = find_rsrc_data(p, size, dat, sizeof(dat));
520	–	if (base) {
521	–	p16 = (uint16 *)(p + base);
522	–	*p16++ = htons(M68K_JMP);
523	–	*p16++ = htons((uint32)Scod060Patch1 >> 16);
524	–	*p16 = htons((uint32)Scod060Patch1 & 0xffff);
525	–	FlushCodeCache(p + base, 6);
526	–	D(bug("  patch 1 applied\n"));
527	–	}
528	–
529	–	// Even a null FP frame is 3 longwords on the 68060 (7.1, 7.5, 8.0)
530	–	static const uint8 dat2[] = {0xf3, 0x5f, 0x4e, 0x75};
531	–	base = find_rsrc_data(p, size, dat2, sizeof(dat2));
532	–	if (base) {
533	–	p16 = (uint16 *)(p + base - 2);
534	–	*p16++ = htons(M68K_JMP);
535	–	*p16++ = htons((uint32)Scod060Patch2 >> 16);
536	–	*p16 = htons((uint32)Scod060Patch2 & 0xffff);
537	–	FlushCodeCache(p + base - 2, 6);
538	–	D(bug("  patch 2 applied\n"));
539	–	}
540	–	#endif
541	–
249		} else if (type == FOURCC('t','h','n','g') && id == -16563) {
250		D(bug(" thng -16563 found\n"));
251
#	Line 600 | Line 307 | void CheckLoad(uint32 type, int16 id, ui
307		FlushCodeCache(p, 6);
308		D(bug("  patch 1 applied\n"));
309		}
310	+	#if REAL_ADDRESSING && !defined(AMIGA)
311	+	else if (type == FOURCC('D','R','V','R') && id == 41) {
312	+	D(bug(" DRVR 41 found\n"));
313	+
314	+	// gb-- [0x28E (ROM85)] contains 0x3fff that will be placed into a0
315	+	// Seems to be caused by the AppleShare extension from MacOS 8.1 (3.7.4)
316	+	// .AFPTranslator (DRVR addr 0x2372)
317	+	static const uint8 dat[] = {0x3a, 0x2e, 0x00, 0x0a, 0x55, 0x4f, 0x3e, 0xb8, 0x02, 0x8e, 0x30, 0x1f, 0x48, 0xc0, 0x24, 0x40, 0x20, 0x40};
318	+	base = find_rsrc_data(p, size, dat, sizeof(dat));
319	+	if (base) {
320	+	p16 = (uint16 *)(p + base + 4);
321	+	*p16++ = htons(0x3078);         // movea.w      ROM85,%a0
322	+	*p16++ = htons(0x028e);
323	+	*p16++ = htons(0xd1fc);         // adda.l       #RAMBaseMac,%a0
324	+	*p16++ = htons((RAMBaseMac >> 16) & 0xffff);
325	+	*p16++ = htons(RAMBaseMac & 0xffff);
326	+	*p16++ = htons(0x2448);         // movea.l      %a0,%a2
327	+	*p16++ = htons(M68K_NOP);
328	+	FlushCodeCache(p + base + 4, 14);
329	+	D(bug("  patch 1 applied\n"));
330	+	}
331	+	}
332	+	#endif
333		}

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