ViewVC Help

View File | Revision Log | Show Annotations | Revision Graph | Root Listing

root/cebix/BasiliskII/src/uae_cpu/gencpu.c

Comparing BasiliskII/src/uae_cpu/gencpu.c (file contents):
Revision 1.12 by gbeauche, 2001-03-19T13:11:40Z vs.
Revision 1.17 by gbeauche, 2002-09-01T15:17:13Z

#	Line 715 | Line 715 | static void genflags_normal (flagtypes t
715
716		static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
717		{
718	<	#ifdef SPARC_V8_ASSEMBLY
719	<	switch(type)
720	<	{
721	<	case flag_add:
722	<	start_brace();
723	<	printf("\tuae_u32 %s;\n", value);
724	<	switch(size)
725	<	{
726	<	case sz_byte:
727	<	printf("\t%s = sparc_v8_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
728	<	break;
729	<	case sz_word:
730	<	printf("\t%s = sparc_v8_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
731	<	break;
732	<	case sz_long:
733	<	printf("\t%s = sparc_v8_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
734	<	break;
735	<	}
736	<	return;
737	<
738	<	case flag_sub:
739	<	start_brace();
740	<	printf("\tuae_u32 %s;\n", value);
741	<	switch(size)
742	<	{
743	<	case sz_byte:
744	<	printf("\t%s = sparc_v8_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
745	<	break;
746	<	case sz_word:
747	<	printf("\t%s = sparc_v8_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
748	<	break;
749	<	case sz_long:
750	<	printf("\t%s = sparc_v8_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
751	<	break;
752	<	}
753	<	return;
754	<
755	<	case flag_cmp:
756	<	switch(size)
757	<	{
758	<	case sz_byte:
759	<	//                                      printf("\tsparc_v8_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
760	<	break;
761	<	case sz_word:
762	<	//                                      printf("\tsparc_v8_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
763	<	break;
764	<	case sz_long:
765	<	#if 1
766	<	printf("\tsparc_v8_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
767	<	return;
768	<	#endif
769	<	break;
770	<	}
771	<	//                      return;
772	<	break;
773	<	}
774	<	#elif defined(SPARC_V9_ASSEMBLY)
775	<	switch(type)
776	<	{
777	<	case flag_add:
778	<	start_brace();
779	<	printf("\tuae_u32 %s;\n", value);
780	<	switch(size)
781	<	{
782	<	case sz_byte:
783	<	printf("\t%s = sparc_v9_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
784	<	break;
785	<	case sz_word:
786	<	printf("\t%s = sparc_v9_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
787	<	break;
788	<	case sz_long:
789	<	printf("\t%s = sparc_v9_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
790	<	break;
791	<	}
792	<	return;
793	<
794	<	case flag_sub:
795	<	start_brace();
796	<	printf("\tuae_u32 %s;\n", value);
797	<	switch(size)
798	<	{
799	<	case sz_byte:
800	<	printf("\t%s = sparc_v9_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
801	<	break;
802	<	case sz_word:
803	<	printf("\t%s = sparc_v9_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
804	<	break;
805	<	case sz_long:
806	<	printf("\t%s = sparc_v9_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
807	<	break;
808	<	}
809	<	return;
810	<
811	<	case flag_cmp:
812	<	switch(size)
813	<	{
814	<	case sz_byte:
815	<	printf("\tsparc_v9_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
816	<	break;
817	<	case sz_word:
818	<	printf("\tsparc_v9_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
819	<	break;
820	<	case sz_long:
821	<	printf("\tsparc_v9_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
822	<	break;
823	<	}
824	<	return;
825	<
826	<	case flag_logical:
827	<	if (strcmp(value, "0") == 0) {
828	<	printf("\tregflags.nzvc = 0x04;\n");
829	<	} else {
830	<	switch(size) {
831	<	case sz_byte:
832	<	printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
833	<	break;
834	<	case sz_word:
835	<	printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
836	<	break;
837	<	case sz_long:
838	<	printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
839	<	break;
840	<	}
841	<	}
842	<	return;
843	<
844	<	#if 0
845	<	case flag_logical_noclobber:
846	<	printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n");
847	<	if (strcmp(value, "0") == 0) {
848	<	printf("\tregflags.nzvc = old_flags | 0x04;\n");
849	<	} else {
850	<	switch(size) {
851	<	case sz_byte:
852	<	printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
853	<	break;
854	<	case sz_word:
855	<	printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
856	<	break;
857	<	case sz_long:
858	<	printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
859	<	break;
860	<	}
861	<	printf("\tregflags.nzvc |= old_flags;\n");
862	<	}
863	<	printf("\t}\n");
864	<	return;
865	<	#endif
866	<	}
867	<	#elif defined(X86_ASSEMBLY)
718	>	/* Temporarily deleted 68k/ARM flag optimizations.  I'd prefer to have
719	>	them in the appropriate m68k.h files and use just one copy of this
720	>	code here.  The API can be changed if necessary.  */
721	>	#ifdef OPTIMIZED_FLAGS
722		switch (type) {
723		case flag_add:
724		case flag_sub:
725		start_brace ();
726		printf ("\tuae_u32 %s;\n", value);
727		break;
874	–
728		default:
729		break;
730		}
#	Line 879 | Line 732 | static void genflags (flagtypes type, wo
732		/* At least some of those casts are fairly important! */
733		switch (type) {
734		case flag_logical_noclobber:
735	<	printf ("\t{uae_u32 oldcznv = regflags.cznv & ~0xC0;\n");
735	>	printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n");
736		if (strcmp (value, "0") == 0) {
737	<	printf ("\tregflags.cznv = olcznv | 64;\n");
737	>	printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n");
738		} else {
739		switch (size) {
740	<	case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
741	<	case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
742	<	case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
740	>	case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
741	>	case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
742	>	case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
743		}
744	<	printf ("\tregflags.cznv |= oldcznv;\n");
744	>	printf ("\tIOR_CZNV (oldcznv);\n");
745		}
746		printf ("\t}\n");
747		return;
748	+
749		case flag_logical:
750		if (strcmp (value, "0") == 0) {
751	<	printf ("\tregflags.cznv = 64;\n");
751	>	printf ("\tSET_CZNV (FLAGVAL_Z);\n");
752		} else {
753		switch (size) {
754	<	case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
755	<	case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
756	<	case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
754	>	case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
755	>	case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
756	>	case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
757		}
758		}
759		return;
760
761		case flag_add:
762		switch (size) {
763	<	case sz_byte: printf ("\tx86_flag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
764	<	case sz_word: printf ("\tx86_flag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
765	<	case sz_long: printf ("\tx86_flag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
763	>	case sz_byte: printf ("\toptflag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
764	>	case sz_word: printf ("\toptflag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
765	>	case sz_long: printf ("\toptflag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
766		}
767		return;
768
769		case flag_sub:
770		switch (size) {
771	<	case sz_byte: printf ("\tx86_flag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
772	<	case sz_word: printf ("\tx86_flag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
773	<	case sz_long: printf ("\tx86_flag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
771	>	case sz_byte: printf ("\toptflag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
772	>	case sz_word: printf ("\toptflag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
773	>	case sz_long: printf ("\toptflag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
774		}
775		return;
776
777		case flag_cmp:
778		switch (size) {
779	<	case sz_byte: printf ("\tx86_flag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
780	<	case sz_word: printf ("\tx86_flag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
781	<	case sz_long: printf ("\tx86_flag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
779	>	case sz_byte: printf ("\toptflag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
780	>	case sz_word: printf ("\toptflag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
781	>	case sz_long: printf ("\toptflag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
782		}
783		return;
784
785		default:
786		break;
787		}
934	–	#elif defined(M68K_FLAG_OPT)
935	–	/* sam: here I'm cloning what X86_ASSEMBLY does */
936	–	#define EXT(size)  (size==sz_byte?"b":(size==sz_word?"w":"l"))
937	–	#define CAST(size) (size==sz_byte?"uae_s8":(size==sz_word?"uae_s16":"uae_s32"))
938	–	switch (type) {
939	–	case flag_add:
940	–	case flag_sub:
941	–	start_brace ();
942	–	printf ("\tuae_u32 %s;\n", value);
943	–	break;
944	–
945	–	default:
946	–	break;
947	–	}
948	–
949	–	switch (type) {
950	–	case flag_logical:
951	–	if (strcmp (value, "0") == 0) {
952	–	printf ("\t*(uae_u16 *)&regflags = 4;\n");  /* Z = 1 */
953	–	} else {
954	–	printf ("\tm68k_flag_tst (%s, (%s)(%s));\n",
955	–	EXT (size), CAST (size), value);
956	–	}
957	–	return;
958	–
959	–	case flag_add:
960	–	printf ("\t{uae_u16 ccr;\n");
961	–	printf ("\tm68k_flag_add (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
962	–	EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
963	–	printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
964	–	return;
965	–
966	–	case flag_sub:
967	–	printf ("\t{uae_u16 ccr;\n");
968	–	printf ("\tm68k_flag_sub (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
969	–	EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
970	–	printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
971	–	return;
972	–
973	–	case flag_cmp:
974	–	printf ("\tm68k_flag_cmp (%s, (%s)(%s), (%s)(%s));\n",
975	–	EXT (size), CAST (size), src, CAST (size), dst);
976	–	return;
977	–
978	–	default:
979	–	break;
980	–	}
981	–	#elif defined(ACORN_FLAG_OPT) && defined(__GNUC_MINOR__)
982	–	/*
983	–	* This is new. Might be quite buggy.
984	–	*/
985	–	switch (type) {
986	–	case flag_av:
987	–	case flag_sv:
988	–	case flag_zn:
989	–	case flag_addx:
990	–	case flag_subx:
991	–	break;
992	–
993	–	case flag_logical:
994	–	if (strcmp (value, "0") == 0) {
995	–	/* v=c=n=0 z=1 */
996	–	printf ("\t*(ULONG*)&regflags = 0x40000000;\n");
997	–	return;
998	–	} else {
999	–	start_brace ();
1000	–	switch (size) {
1001	–	case sz_byte:
1002	–	printf ("\tUBYTE ccr;\n");
1003	–	printf ("\tULONG shift;\n");
1004	–	printf ("\t__asm__(\"mov %%2,%%1,lsl#24\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1005	–	"\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value);
1006	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1007	–	return;
1008	–	case sz_word:
1009	–	printf ("\tUBYTE ccr;\n");
1010	–	printf ("\tULONG shift;\n");
1011	–	printf ("\t__asm__(\"mov %%2,%%1,lsl#16\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1012	–	"\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value);
1013	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1014	–	return;
1015	–	case sz_long:
1016	–	printf ("\tUBYTE ccr;\n");
1017	–	printf ("\t__asm__(\"tst %%1,%%1\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1018	–	"\t: \"=r\" (ccr) : \"r\" ((LONG)%s) : \"cc\" );\n", value);
1019	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1020	–	return;
1021	–	}
1022	–	}
1023	–	break;
1024	–	case flag_add:
1025	–	if (strcmp (dst, "0") == 0) {
1026	–	printf ("/* Error! Hier muss Peter noch was machen !!! (ADD-Flags) */");
1027	–	} else {
1028	–	start_brace ();
1029	–	switch (size) {
1030	–	case sz_byte:
1031	–	printf ("\tULONG ccr, shift, %s;\n", value);
1032	–	printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tadds %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1033	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1034	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1035	–	return;
1036	–	case sz_word:
1037	–	printf ("\tULONG ccr, shift, %s;\n", value);
1038	–	printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tadds %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1039	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1040	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1041	–	return;
1042	–	case sz_long:
1043	–	printf ("\tULONG ccr, %s;\n", value);
1044	–	printf ("\t__asm__(\"adds %%0,%%3,%%2\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1045	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1046	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1047	–	return;
1048	–	}
1049	–	}
1050	–	break;
1051	–	case flag_sub:
1052	–	if (strcmp (dst, "0") == 0) {
1053	–	printf ("/* Error! Hier muss Peter noch was machen !!! (SUB-Flags) */");
1054	–	} else {
1055	–	start_brace ();
1056	–	switch (size) {
1057	–	case sz_byte:
1058	–	printf ("\tULONG ccr, shift, %s;\n", value);
1059	–	printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tsubs %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1060	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1061	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1062	–	return;
1063	–	case sz_word:
1064	–	printf ("\tULONG ccr, shift, %s;\n", value);
1065	–	printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tsubs %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1066	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1067	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1068	–	return;
1069	–	case sz_long:
1070	–	printf ("\tULONG ccr, %s;\n", value);
1071	–	printf ("\t__asm__(\"subs %%0,%%3,%%2\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1072	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1073	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1074	–	return;
1075	–	}
1076	–	}
1077	–	break;
1078	–	case flag_cmp:
1079	–	if (strcmp (dst, "0") == 0) {
1080	–	printf ("/*Error! Hier muss Peter noch was machen !!! (CMP-Flags)*/");
1081	–	} else {
1082	–	start_brace ();
1083	–	switch (size) {
1084	–	case sz_byte:
1085	–	printf ("\tULONG shift, ccr;\n");
1086	–	printf ("\t__asm__(\"mov %%3,%%2,lsl#24\n\tcmp %%3,%%1,lsl#24\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1087	–	"\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1088	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1089	–	return;
1090	–	case sz_word:
1091	–	printf ("\tULONG shift, ccr;\n");
1092	–	printf ("\t__asm__(\"mov %%3,%%2,lsl#16\n\tcmp %%3,%%1,lsl#16\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1093	–	"\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1094	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1095	–	return;
1096	–	case sz_long:
1097	–	printf ("\tULONG ccr;\n");
1098	–	printf ("\t__asm__(\"cmp %%2,%%1\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1099	–	"\t: \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", src, dst);
1100	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1101	–	/*printf ("\tprintf (\"%%08x %%08x %%08x\\n\", %s, %s, *((ULONG*)&regflags));\n", src, dst); */
1102	–	return;
1103	–	}
1104	–	}
1105	–	break;
1106	–	}
788		#endif
789		genflags_normal (type, size, value, src, dst);
790		}
#	Line 1142 | Line 823 | static int source_is_imm1_8 (struct inst
823		return i->stype == 3;
824		}
825
826	+	static const char * cflow_string_of(uae_u32 opcode)
827	+	{
828	+	const char * cflow_type_str;
829	+
830	+	int cflow_type = table68k[opcode].cflow & ~fl_trap;
831	+	switch (cflow_type) {
832	+	case fl_branch:         cflow_type_str = "CFLOW_BRANCH";                break;
833	+	case fl_jump:           cflow_type_str = "CFLOW_JUMP";                  break;
834	+	case fl_return:         cflow_type_str = "CFLOW_RETURN";                break;
835	+	default:                        cflow_type_str = "CFLOW_NORMAL";
836	+	}
837	+
838	+	/* Patch M68K_EXEC_RETURN instruction */
839	+	if (table68k[opcode].mnemo == i_EMULOP_RETURN)
840	+	cflow_type_str = "CFLOW_EXEC_RETURN";
841	+
842	+	return cflow_type_str;
843	+	}
844	+
845		static void gen_opcode (unsigned long int opcode)
846		{
847		struct instr *curi = table68k + opcode;
#	Line 1228 | Line 928 | static void gen_opcode (unsigned long in
928		genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
929		break;
930		case i_SBCD:
1231	–	/* Let's hope this works... */
931		genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
932		genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
933		start_brace ();
934		printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
935		printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
936	<	printf ("\tuae_u16 newv;\n");
937	<	printf ("\tint cflg;\n");
938	<	printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
939	<	printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
940	<	printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
936	>	printf ("\tuae_u16 newv, tmp_newv;\n");
937	>	printf ("\tint bcd = 0;\n");
938	>	printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
939	>	printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n");
940	>	printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n");
941	>	printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);\n");
942		duplicate_carry ();
1243	–	printf ("\tif (cflg) newv -= 0x60;\n");
943		genflags (flag_zn, curi->size, "newv", "", "");
944	<	genflags (flag_sv, curi->size, "newv", "src", "dst");
944	>	printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
945		genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
946		break;
947		case i_ADD:
#	Line 1274 | Line 973 | static void gen_opcode (unsigned long in
973		start_brace ();
974		printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
975		printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
976	<	printf ("\tuae_u16 newv;\n");
976	>	printf ("\tuae_u16 newv, tmp_newv;\n");
977		printf ("\tint cflg;\n");
978	<	printf ("\tif (newv_lo > 9) { newv_lo +=6; }\n");
979	<	printf ("\tnewv = newv_hi + newv_lo;");
980	<	printf ("\tSET_CFLG (cflg = (newv & 0x1F0) > 0x90);\n");
1282	<	duplicate_carry ();
978	>	printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
979	>	printf ("\tif (newv_lo > 9) { newv += 6; }\n");
980	>	printf ("\tcflg = (newv & 0x3F0) > 0x90;\n");
981		printf ("\tif (cflg) newv += 0x60;\n");
982	+	printf ("\tSET_CFLG (cflg);\n");
983	+	duplicate_carry ();
984		genflags (flag_zn, curi->size, "newv", "", "");
985	<	genflags (flag_sv, curi->size, "newv", "src", "dst");
985	>	printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n");
986		genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
987		break;
988		case i_NEG:
#	Line 1306 | Line 1006 | static void gen_opcode (unsigned long in
1006		printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
1007		printf ("\tuae_u16 newv;\n");
1008		printf ("\tint cflg;\n");
1009	<	printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1010	<	printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1011	<	printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1312	<	duplicate_carry();
1009	>	printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
1010	>	printf ("\tnewv = newv_hi + newv_lo;\n");
1011	>	printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
1012		printf ("\tif (cflg) newv -= 0x60;\n");
1013	+	printf ("\tSET_CFLG (cflg);\n");
1014	+	duplicate_carry();
1015		genflags (flag_zn, curi->size, "newv", "", "");
1016		genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1017		break;
#	Line 1347 | Line 1048 | static void gen_opcode (unsigned long in
1048		else
1049		printf ("\tsrc &= 31;\n");
1050		printf ("\tdst ^= (1 << src);\n");
1051	<	printf ("\tSET_ZFLG ((dst & (1 << src)) >> src);\n");
1051	>	printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n");
1052		genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1053		break;
1054		case i_BCLR:
#	Line 1518 | Line 1219 | static void gen_opcode (unsigned long in
1219		printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1220		printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1221		printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1222	+	/* gb-- the next two lines are deleted in Bernie's gencpu.c */
1223		printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n");
1224		printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n");
1225		printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
#	Line 1536 | Line 1238 | static void gen_opcode (unsigned long in
1238		m68k_pc_offset = 0;
1239		break;
1240		case i_RTD:
1539	–	printf ("\tcompiler_flush_jsr_stack();\n");
1241		genamode (Aipi, "7", sz_long, "pc", 1, 0);
1242		genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1243		printf ("\tm68k_areg(regs, 7) += offs;\n");
#	Line 1570 | Line 1271 | static void gen_opcode (unsigned long in
1271		need_endlabel = 1;
1272		break;
1273		case i_RTR:
1573	–	printf ("\tcompiler_flush_jsr_stack();\n");
1274		printf ("\tMakeSR();\n");
1275		genamode (Aipi, "7", sz_word, "sr", 1, 0);
1276		genamode (Aipi, "7", sz_long, "pc", 1, 0);
#	Line 1608 | Line 1308 | static void gen_opcode (unsigned long in
1308		m68k_pc_offset = 0;
1309		break;
1310		case i_Bcc:
1311	+	if (0 && !using_prefetch && !using_exception_3 && (cpu_level >= 2)) {
1312	+	/* gb-- variant probably more favorable to compiler optimizations
1313	+	also assumes no prefetch buffer is used
1314	+	Hmm, that would make sense with processors capable of conditional moves */
1315	+	if (curi->size == sz_long && next_cpu_level < 1)
1316	+	next_cpu_level = 1;
1317	+	genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1318	+	printf ("\tm68k_incpc (cctrue(%d) ? ((uae_s32)src + 2) : %d);\n", curi->cc, m68k_pc_offset);
1319	+	m68k_pc_offset = 0;
1320	+	}
1321	+	else {
1322	+	/* original code for branch instructions */
1323		if (curi->size == sz_long) {
1324		if (cpu_level < 2) {
1325		printf ("\tm68k_incpc(2);\n");
#	Line 1631 | Line 1343 | static void gen_opcode (unsigned long in
1343		printf ("\t}\n");
1344		need_endlabel = 1;
1345		}
1634	–	#ifdef USE_COMPILER
1635	–	printf ("\tm68k_setpc_bcc(m68k_getpc() + 2 + (uae_s32)src);\n");
1636	–	#else
1346		printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1638	–	#endif
1347		fill_prefetch_0 ();
1348	<	printf ("\tgoto %s;\n", endlabelstr);
1348	>	printf ("cpuop_return(%s);\n", cflow_string_of(opcode));
1349		printf ("didnt_jump:;\n");
1350		need_endlabel = 1;
1351	+	}
1352		break;
1353		case i_LEA:
1354		genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
#	Line 1667 | Line 1376 | static void gen_opcode (unsigned long in
1376		printf ("\t\t}\n");
1377		need_endlabel = 1;
1378		}
1670	–	#ifdef USE_COMPILER
1671	–	printf ("\t\t\tm68k_setpc_bcc(m68k_getpc() + (uae_s32)offs + 2);\n");
1672	–	#else
1379		printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1674	–	#endif
1380		fill_prefetch_0 ();
1381	<	printf ("\t\tgoto %s;\n", endlabelstr);
1381	>	printf ("cpuop_return(%s);\n", cflow_string_of(opcode));
1382		printf ("\t\t}\n");
1383		printf ("\t}\n");
1384		need_endlabel = 1;
#	Line 1688 | Line 1393 | static void gen_opcode (unsigned long in
1393		printf ("\tuaecptr oldpc = m68k_getpc();\n");
1394		genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1395		genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1396	<	printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1396	>	sync_m68k_pc ();
1397	>	/* Clear V flag when dividing by zero - Alcatraz Odyssey demo depends
1398	>	* on this (actually, it's doing a DIVS).  */
1399	>	printf ("\tif (src == 0) { SET_VFLG (0); Exception (5, oldpc); goto %s; } else {\n", endlabelstr);
1400		printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1401		printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1402		/* The N flag appears to be set each time there is an overflow.
#	Line 1706 | Line 1414 | static void gen_opcode (unsigned long in
1414		printf ("\tuaecptr oldpc = m68k_getpc();\n");
1415		genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1416		genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1417	<	printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1417	>	sync_m68k_pc ();
1418	>	printf ("\tif (src == 0) { SET_VFLG (0); Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1419		printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1420		printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1421		printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
#	Line 1767 | Line 1476 | static void gen_opcode (unsigned long in
1476		abort ();
1477		}
1478		printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1479	<	printf ("\tSET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1479	>	printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1480		printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1481		need_endlabel = 1;
1482		break;
#	Line 1966 | Line 1675 | static void gen_opcode (unsigned long in
1675		}
1676		printf ("\tcnt &= 63;\n");
1677		printf ("\tCLEAR_CZNV;\n");
1969	–	if (! source_is_imm1_8 (curi))
1970	–	force_range_for_rox ("cnt", curi->size);
1678		if (source_is_imm1_8 (curi))
1679		printf ("{");
1680	<	else
1680	>	else {
1681	>	force_range_for_rox ("cnt", curi->size);
1682		printf ("\tif (cnt > 0) {\n");
1683	+	}
1684		printf ("\tcnt--;\n");
1685		printf ("\t{\n\tuae_u32 carry;\n");
1686		printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
#	Line 1996 | Line 1705 | static void gen_opcode (unsigned long in
1705		}
1706		printf ("\tcnt &= 63;\n");
1707		printf ("\tCLEAR_CZNV;\n");
1999	–	if (! source_is_imm1_8 (curi))
2000	–	force_range_for_rox ("cnt", curi->size);
1708		if (source_is_imm1_8 (curi))
1709		printf ("{");
1710	<	else
1710	>	else {
1711	>	force_range_for_rox ("cnt", curi->size);
1712		printf ("\tif (cnt > 0) {\n");
1713	+	}
1714		printf ("\tcnt--;\n");
1715		printf ("\t{\n\tuae_u32 carry;\n");
1716		printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
#	Line 2157 | Line 1866 | static void gen_opcode (unsigned long in
1866		start_brace ();
1867		printf ("\tint regno = (src >> 12) & 15;\n");
1868		printf ("\tuae_u32 *regp = regs.regs + regno;\n");
1869	<	printf ("\tm68k_movec2(src & 0xFFF, regp);\n");
1869	>	printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
1870		break;
1871		case i_MOVE2C:
1872		genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1873		start_brace ();
1874		printf ("\tint regno = (src >> 12) & 15;\n");
1875		printf ("\tuae_u32 *regp = regs.regs + regno;\n");
1876	<	printf ("\tm68k_move2c(src & 0xFFF, regp);\n");
1876	>	printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
1877		break;
1878		case i_CAS:
1879		{
#	Line 2304 | Line 2013 | static void gen_opcode (unsigned long in
2013		printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
2014		}
2015		printf ("\ttmp >>= (32 - width);\n");
2016	<	printf ("\tSET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);\n");
2016	>	printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width-1)) ? 1 : 0);\n");
2017		printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
2018		switch (curi->mnemo) {
2019		case i_BFTST:
#	Line 2332 | Line 2041 | static void gen_opcode (unsigned long in
2041		break;
2042		case i_BFINS:
2043		printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2044	+	printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width - 1)) ? 1 : 0);\n");
2045	+	printf ("\tSET_ZFLG (tmp == 0);\n");
2046		break;
2047		default:
2048		break;
#	Line 2488 | Line 2199 | static void gen_opcode (unsigned long in
2199		swap_opcode ();
2200		printf ("\tmmu_op(opcode,extra);\n");
2201		break;
2202	+
2203	+	case i_EMULOP_RETURN:
2204	+	printf ("\tm68k_emulop_return();\n");
2205	+	m68k_pc_offset = 0;
2206	+	break;
2207	+
2208	+	case i_EMULOP:
2209	+	printf ("\n");
2210	+	swap_opcode ();
2211	+	printf ("\tm68k_emulop(opcode);\n");
2212	+	break;
2213	+
2214		default:
2215		abort ();
2216		break;
#	Line 2499 | Line 2222 | static void gen_opcode (unsigned long in
2222		static void generate_includes (FILE * f)
2223		{
2224		fprintf (f, "#include \"sysdeps.h\"\n");
2225	+
2226		fprintf (f, "#include \"m68k.h\"\n");
2227		fprintf (f, "#include \"memory.h\"\n");
2228		fprintf (f, "#include \"readcpu.h\"\n");
2229		fprintf (f, "#include \"newcpu.h\"\n");
2506	–	fprintf (f, "#include \"compiler.h\"\n");
2230		fprintf (f, "#include \"cputbl.h\"\n");
2231	+
2232	+	fprintf (f, "#define SET_CFLG_ALWAYS(x) SET_CFLG(x)\n");
2233	+	fprintf (f, "#define SET_NFLG_ALWAYS(x) SET_NFLG(x)\n");
2234	+	fprintf (f, "#define CPUFUNC_FF(x) x##_ff\n");
2235	+	fprintf (f, "#define CPUFUNC_NF(x) x##_nf\n");
2236	+	fprintf (f, "#define CPUFUNC(x) CPUFUNC_FF(x)\n");
2237	+
2238	+	fprintf (f, "#ifdef NOFLAGS\n");
2239	+	fprintf (f, "# include \"noflags.h\"\n");
2240	+	fprintf (f, "#endif\n");
2241		}
2242
2243		static int postfix;
#	Line 2528 | Line 2261 | static void generate_one_opcode (int rp)
2261		return;
2262
2263		if (opcode_next_clev[rp] != cpu_level) {
2264	<	fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2264	>	fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2265		opcode, lookuptab[i].name);
2266		return;
2267		}
2268	<	fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2269	<	fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix);
2270	<	printf ("void REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2268	>
2269	>	if (table68k[opcode].flagdead == 0)
2270	>	/* force to the "ff" variant since the instruction doesn't set at all the condition codes */
2271	>	fprintf (stblfile, "{ CPUFUNC_FF(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2272	>	else
2273	>	fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2274	>
2275	>	fprintf (headerfile, "extern cpuop_func op_%lx_%d_nf;\n", opcode, postfix);
2276	>	fprintf (headerfile, "extern cpuop_func op_%lx_%d_ff;\n", opcode, postfix);
2277	>	printf ("cpuop_rettype REGPARAM2 CPUFUNC(op_%lx_%d)(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2278	>	printf ("\tcpuop_begin();\n");
2279	>
2280	>	/* gb-- The "nf" variant for an instruction that doesn't set the condition
2281	>	codes at all is the same as the "ff" variant, so we don't need the "nf"
2282	>	variant to be compiled since it is mapped to the "ff" variant in the
2283	>	smalltbl. */
2284	>	if (table68k[opcode].flagdead == 0)
2285	>	printf ("#ifndef NOFLAGS\n");
2286
2287		switch (table68k[opcode].stype) {
2288		case 0: smsk = 7; break;
#	Line 2543 | Line 2291 | static void generate_one_opcode (int rp)
2291		case 3: smsk = 7; break;
2292		case 4: smsk = 7; break;
2293		case 5: smsk = 63; break;
2294	+	case 6: smsk = 255; break;
2295		case 7: smsk = 3; break;
2296		default: abort ();
2297		}
#	Line 2553 | Line 2302 | static void generate_one_opcode (int rp)
2302		&& table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2303		&& table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2304		&& table68k[opcode].smode != absw && table68k[opcode].smode != absl
2305	<	&& table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
2305	>	&& table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16
2306	>	/* gb-- We don't want to fetch the EmulOp code since the EmulOp()
2307	>	routine uses the whole opcode value. Maybe all the EmulOps
2308	>	could be expanded out but I don't think it is an improvement */
2309	>	&& table68k[opcode].stype != 6
2310	>	)
2311		{
2312		if (table68k[opcode].spos == -1) {
2313		if (((int) table68k[opcode].sreg) >= 128)
#	Line 2649 | Line 2403 | static void generate_one_opcode (int rp)
2403		gen_opcode (opcode);
2404		if (need_endlabel)
2405		printf ("%s: ;\n", endlabelstr);
2406	+	if (table68k[opcode].flagdead == 0)
2407	+	printf ("\n#endif\n");
2408	+	printf ("\tcpuop_end(%s);\n", cflow_string_of(opcode));
2409		printf ("}\n");
2410		opcode_next_clev[rp] = next_cpu_level;
2411		opcode_last_postfix[rp] = postfix;
#	Line 2676 | Line 2433 | static void generate_func (void)
2433		opcode_next_clev[rp] = 0;
2434		}
2435		postfix = i;
2436	<	fprintf (stblfile, "struct cputbl op_smalltbl_%d[] = {\n", postfix);
2436	>	fprintf (stblfile, "struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix);
2437
2438		/* sam: this is for people with low memory (eg. me :)) */
2439		printf ("\n"

Diff Legend

–	Removed lines
+	Added lines
<	Changed lines
>	Changed lines