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root/cebix/BasiliskII/src/uae_cpu/newcpu.h
Revision: 1.1.1.1 (vendor branch)
Committed: 1999-10-03T14:16:26Z (24 years, 8 months ago) by cebix
Content type: text/plain
Branch: cebix
CVS Tags: release-0_7-2, snapshot-21101999, start
Changes since 1.1: +0 -0 lines
Log Message:
Imported sources

File Contents

# Content
1 /*
2 * UAE - The Un*x Amiga Emulator
3 *
4 * MC68000 emulation
5 *
6 * Copyright 1995 Bernd Schmidt
7 */
8
9 #define SPCFLAG_STOP 2
10 #define SPCFLAG_DISK 4
11 #define SPCFLAG_INT 8
12 #define SPCFLAG_BRK 16
13 #define SPCFLAG_EXTRA_CYCLES 32
14 #define SPCFLAG_TRACE 64
15 #define SPCFLAG_DOTRACE 128
16 #define SPCFLAG_DOINT 256
17 #define SPCFLAG_BLTNASTY 512
18 #define SPCFLAG_EXEC 1024
19 #define SPCFLAG_MODE_CHANGE 8192
20
21 #ifndef SET_CFLG
22
23 #define SET_CFLG(x) (CFLG = (x))
24 #define SET_NFLG(x) (NFLG = (x))
25 #define SET_VFLG(x) (VFLG = (x))
26 #define SET_ZFLG(x) (ZFLG = (x))
27 #define SET_XFLG(x) (XFLG = (x))
28
29 #define GET_CFLG CFLG
30 #define GET_NFLG NFLG
31 #define GET_VFLG VFLG
32 #define GET_ZFLG ZFLG
33 #define GET_XFLG XFLG
34
35 #define CLEAR_CZNV do { \
36 SET_CFLG (0); \
37 SET_ZFLG (0); \
38 SET_NFLG (0); \
39 SET_VFLG (0); \
40 } while (0)
41
42 #define COPY_CARRY (SET_XFLG (GET_CFLG))
43 #endif
44
45 extern int areg_byteinc[];
46 extern int imm8_table[];
47
48 extern int movem_index1[256];
49 extern int movem_index2[256];
50 extern int movem_next[256];
51
52 extern int fpp_movem_index1[256];
53 extern int fpp_movem_index2[256];
54 extern int fpp_movem_next[256];
55
56 extern int broken_in;
57
58 typedef unsigned long REGPARAM2 cpuop_func (uae_u32) REGPARAM;
59
60 struct cputbl {
61 cpuop_func *handler;
62 int specific;
63 uae_u16 opcode;
64 };
65
66 extern unsigned long REGPARAM2 op_illg (uae_u32) REGPARAM;
67
68 typedef char flagtype;
69
70 extern struct regstruct
71 {
72 uae_u32 regs[16];
73 uaecptr usp,isp,msp;
74 uae_u16 sr;
75 flagtype t1;
76 flagtype t0;
77 flagtype s;
78 flagtype m;
79 flagtype x;
80 flagtype stopped;
81 int intmask;
82
83 uae_u32 pc;
84 uae_u8 *pc_p;
85 uae_u8 *pc_oldp;
86
87 uae_u32 vbr,sfc,dfc;
88
89 double fp[8];
90 uae_u32 fpcr,fpsr,fpiar;
91
92 uae_u32 spcflags;
93 uae_u32 kick_mask;
94
95 /* Fellow sources say this is 4 longwords. That's impossible. It needs
96 * to be at least a longword. The HRM has some cryptic comment about two
97 * instructions being on the same longword boundary.
98 * The way this is implemented now seems like a good compromise.
99 */
100 uae_u32 prefetch;
101 } regs, lastint_regs;
102
103 #define m68k_dreg(r,num) ((r).regs[(num)])
104 #define m68k_areg(r,num) (((r).regs + 8)[(num)])
105
106 #define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1))
107 #define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o)))
108 #define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o)))
109
110 #ifdef HAVE_GET_WORD_UNSWAPPED
111 #define GET_OPCODE (do_get_mem_word_unswapped (regs.pc_p))
112 #else
113 #define GET_OPCODE (get_iword (0))
114 #endif
115
116 static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
117 {
118 if (o > 3 || o < 0)
119 return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1));
120
121 return do_get_mem_byte((uae_u8 *)(((uae_u8 *)&regs.prefetch) + o + 1));
122 }
123 static __inline__ uae_u32 get_iword_prefetch (uae_s32 o)
124 {
125 if (o > 3 || o < 0)
126 return do_get_mem_word((uae_u16 *)(regs.pc_p + o));
127
128 return do_get_mem_word((uae_u16 *)(((uae_u8 *)&regs.prefetch) + o));
129 }
130 static __inline__ uae_u32 get_ilong_prefetch (uae_s32 o)
131 {
132 if (o > 3 || o < 0)
133 return do_get_mem_long((uae_u32 *)(regs.pc_p + o));
134 if (o == 0)
135 return do_get_mem_long(&regs.prefetch);
136 return (do_get_mem_word (((uae_u16 *)&regs.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
137 }
138
139 #define m68k_incpc(o) (regs.pc_p += (o))
140
141 static __inline__ void fill_prefetch_0 (void)
142 {
143 uae_u32 r;
144 #ifdef UNALIGNED_PROFITABLE
145 r = *(uae_u32 *)regs.pc_p;
146 regs.prefetch = r;
147 #else
148 r = do_get_mem_long ((uae_u32 *)regs.pc_p);
149 do_put_mem_long (&regs.prefetch, r);
150 #endif
151 }
152
153 #if 0
154 static __inline__ void fill_prefetch_2 (void)
155 {
156 uae_u32 r = do_get_mem_long (&regs.prefetch) << 16;
157 uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1);
158 r |= r2;
159 do_put_mem_long (&regs.prefetch, r);
160 }
161 #else
162 #define fill_prefetch_2 fill_prefetch_0
163 #endif
164
165 /* These are only used by the 68020/68881 code, and therefore don't
166 * need to handle prefetch. */
167 static __inline__ uae_u32 next_ibyte (void)
168 {
169 uae_u32 r = get_ibyte (0);
170 m68k_incpc (2);
171 return r;
172 }
173
174 static __inline__ uae_u32 next_iword (void)
175 {
176 uae_u32 r = get_iword (0);
177 m68k_incpc (2);
178 return r;
179 }
180
181 static __inline__ uae_u32 next_ilong (void)
182 {
183 uae_u32 r = get_ilong (0);
184 m68k_incpc (4);
185 return r;
186 }
187
188 #if !defined USE_COMPILER
189 static __inline__ void m68k_setpc (uaecptr newpc)
190 {
191 regs.pc_p = regs.pc_oldp = get_real_address(newpc);
192 regs.pc = newpc;
193 }
194 #else
195 extern void m68k_setpc (uaecptr newpc);
196 #endif
197
198 static __inline__ uaecptr m68k_getpc (void)
199 {
200 return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp);
201 }
202
203 static __inline__ uaecptr m68k_getpc_p (uae_u8 *p)
204 {
205 return regs.pc + ((char *)p - (char *)regs.pc_oldp);
206 }
207
208 #ifdef USE_COMPILER
209 extern void m68k_setpc_fast (uaecptr newpc);
210 extern void m68k_setpc_bcc (uaecptr newpc);
211 extern void m68k_setpc_rte (uaecptr newpc);
212 #else
213 #define m68k_setpc_fast m68k_setpc
214 #define m68k_setpc_bcc m68k_setpc
215 #define m68k_setpc_rte m68k_setpc
216 #endif
217
218 static __inline__ void m68k_setstopped (int stop)
219 {
220 regs.stopped = stop;
221 if (stop)
222 regs.spcflags |= SPCFLAG_STOP;
223 }
224
225 extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
226 extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);
227
228 extern uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf);
229
230 extern void MakeSR (void);
231 extern void MakeFromSR (void);
232 extern void Exception (int, uaecptr);
233 extern void dump_counts (void);
234 extern void m68k_move2c (int, uae_u32 *);
235 extern void m68k_movec2 (int, uae_u32 *);
236 extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
237 extern void m68k_mull (uae_u32, uae_u32, uae_u16);
238 extern void init_m68k (void);
239 extern void m68k_go (int);
240 extern void m68k_dumpstate (uaecptr *);
241 extern void m68k_disasm (uaecptr, uaecptr *, int);
242 extern void m68k_reset (void);
243 extern void m68k_enter_debugger(void);
244
245 extern void mmu_op (uae_u32, uae_u16);
246
247 extern void fpp_opp (uae_u32, uae_u16);
248 extern void fdbcc_opp (uae_u32, uae_u16);
249 extern void fscc_opp (uae_u32, uae_u16);
250 extern void ftrapcc_opp (uae_u32,uaecptr);
251 extern void fbcc_opp (uae_u32, uaecptr, uae_u32);
252 extern void fsave_opp (uae_u32);
253 extern void frestore_opp (uae_u32);
254
255 /* Opcode of faulting instruction */
256 extern uae_u16 last_op_for_exception_3;
257 /* PC at fault time */
258 extern uaecptr last_addr_for_exception_3;
259 /* Address that generated the exception */
260 extern uaecptr last_fault_for_exception_3;
261
262 #define CPU_OP_NAME(a) op ## a
263
264 /* 68020 + 68881 */
265 extern struct cputbl op_smalltbl_0[];
266 /* 68020 */
267 extern struct cputbl op_smalltbl_1[];
268 /* 68010 */
269 extern struct cputbl op_smalltbl_2[];
270 /* 68000 */
271 extern struct cputbl op_smalltbl_3[];
272 /* 68000 slow but compatible. */
273 extern struct cputbl op_smalltbl_4[];
274
275 extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
276