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/* |
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* CPU1541_SC.cpp - Single-cycle 6502 (1541) emulation |
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* |
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* Frodo Copyright (C) Christian Bauer |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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|
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/* |
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* Notes: |
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* ------ |
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* |
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* Opcode execution: |
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* - All opcodes are resolved into single clock cycles. There is one |
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* switch case for each cycle. |
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* - The "state" variable specifies the routine to be executed in the |
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* next cycle. Its upper 8 bits contain the current opcode, its lower |
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* 8 bits contain the cycle number (0..7) within the opcode. |
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* - Opcodes are fetched in cycle 0 (state = 0) |
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* - The states 0x0010..0x0027 are used for interrupts |
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* - There is exactly one memory access in each clock cycle |
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* |
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* Memory map (1541C, the 1541 and 1541-II are a bit different): |
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* |
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* $0000-$07ff RAM (2K) |
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* $0800-$0fff RAM mirror |
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* $1000-$17ff free |
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* $1800-$1bff VIA 1 |
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* $1c00-$1fff VIA 2 |
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* $2000-$bfff free |
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* $c000-$ffff ROM (16K) |
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* |
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* - All memory accesses are done with the read_byte() and |
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* write_byte() functions which also do the memory address |
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* decoding. |
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* - The possible interrupt sources are: |
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* INT_VIA1IRQ: I flag is checked, jump to ($fffe) (unused) |
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* INT_VIA2IRQ: I flag is checked, jump to ($fffe) (unused) |
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* INT_IECIRQ: I flag is checked, jump to ($fffe) (unused) |
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* INT_RESET: Jump to ($fffc) |
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* - The z_flag variable has the inverse meaning of the |
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* 6502 Z flag |
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* - Only the highest bit of the n_flag variable is used |
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* - The $f2 opcode that would normally crash the 6502 is |
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* used to implement emulator-specific functions |
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* - The 1541 6502 emulation also includes a very simple VIA |
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* emulation (enough to make the IEC bus and GCR loading work). |
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* It's too small to move it to a source file of its own. |
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* |
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* Incompatibilities: |
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* ------------------ |
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* |
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* - VIA emulation incomplete |
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*/ |
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|
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#include "sysdeps.h" |
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|
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#include "CPU1541.h" |
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#include "CPU_common.h" |
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#include "1541job.h" |
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#include "C64.h" |
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#include "CIA.h" |
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#include "Display.h" |
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|
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|
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enum { |
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INT_RESET = 3 |
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}; |
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|
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|
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/* |
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* 6502 constructor: Initialize registers |
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*/ |
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|
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MOS6502_1541::MOS6502_1541(C64 *c64, Job1541 *job, C64Display *disp, uint8 *Ram, uint8 *Rom) |
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: ram(Ram), rom(Rom), the_c64(c64), the_display(disp), the_job(job) |
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{ |
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a = x = y = 0; |
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sp = 0xff; |
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n_flag = z_flag = 0; |
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v_flag = d_flag = c_flag = false; |
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i_flag = true; |
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|
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via1_t1c = via1_t1l = via1_t2c = via1_t2l = 0; |
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via1_sr = 0; |
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via2_t1c = via2_t1l = via2_t2c = via2_t2l = 0; |
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via2_sr = 0; |
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|
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first_irq_cycle = 0; |
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opflags = 0; |
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Idle = false; |
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} |
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|
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|
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/* |
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* Reset CPU asynchronously |
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*/ |
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|
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void MOS6502_1541::AsyncReset(void) |
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{ |
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interrupt.intr[INT_RESET] = true; |
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Idle = false; |
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} |
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|
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|
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/* |
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* Get 6502 register state |
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*/ |
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|
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void MOS6502_1541::GetState(MOS6502State *s) |
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{ |
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s->a = a; |
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s->x = x; |
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s->y = y; |
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|
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s->p = 0x20 | (n_flag & 0x80); |
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if (v_flag) s->p |= 0x40; |
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if (d_flag) s->p |= 0x08; |
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if (i_flag) s->p |= 0x04; |
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if (!z_flag) s->p |= 0x02; |
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if (c_flag) s->p |= 0x01; |
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|
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s->pc = pc; |
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s->sp = sp | 0x0100; |
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|
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s->intr[INT_VIA1IRQ] = interrupt.intr[INT_VIA1IRQ]; |
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s->intr[INT_VIA2IRQ] = interrupt.intr[INT_VIA2IRQ]; |
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s->intr[INT_IECIRQ] = interrupt.intr[INT_IECIRQ]; |
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s->intr[INT_RESET] = interrupt.intr[INT_RESET]; |
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s->idle = Idle; |
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|
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s->via1_pra = via1_pra; s->via1_ddra = via1_ddra; |
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s->via1_prb = via1_prb; s->via1_ddrb = via1_ddrb; |
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s->via1_t1c = via1_t1c; s->via1_t1l = via1_t1l; |
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s->via1_t2c = via1_t2c; s->via1_t2l = via1_t2l; |
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s->via1_sr = via1_sr; |
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s->via1_acr = via1_acr; s->via1_pcr = via1_pcr; |
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s->via1_ifr = via1_ifr; s->via1_ier = via1_ier; |
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|
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s->via2_pra = via2_pra; s->via2_ddra = via2_ddra; |
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s->via2_prb = via2_prb; s->via2_ddrb = via2_ddrb; |
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s->via2_t1c = via2_t1c; s->via2_t1l = via2_t1l; |
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s->via2_t2c = via2_t2c; s->via2_t2l = via2_t2l; |
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s->via2_sr = via2_sr; |
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s->via2_acr = via2_acr; s->via2_pcr = via2_pcr; |
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s->via2_ifr = via2_ifr; s->via2_ier = via2_ier; |
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} |
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|
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|
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/* |
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* Restore 6502 state |
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*/ |
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|
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void MOS6502_1541::SetState(MOS6502State *s) |
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{ |
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a = s->a; |
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x = s->x; |
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y = s->y; |
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|
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n_flag = s->p; |
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v_flag = s->p & 0x40; |
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d_flag = s->p & 0x08; |
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i_flag = s->p & 0x04; |
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z_flag = !(s->p & 0x02); |
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c_flag = s->p & 0x01; |
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|
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pc = s->pc; |
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sp = s->sp & 0xff; |
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|
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interrupt.intr[INT_VIA1IRQ] = s->intr[INT_VIA1IRQ]; |
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interrupt.intr[INT_VIA2IRQ] = s->intr[INT_VIA2IRQ]; |
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interrupt.intr[INT_IECIRQ] = s->intr[INT_IECIRQ]; |
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interrupt.intr[INT_RESET] = s->intr[INT_RESET]; |
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Idle = s->idle; |
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|
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via1_pra = s->via1_pra; via1_ddra = s->via1_ddra; |
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via1_prb = s->via1_prb; via1_ddrb = s->via1_ddrb; |
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via1_t1c = s->via1_t1c; via1_t1l = s->via1_t1l; |
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via1_t2c = s->via1_t2c; via1_t2l = s->via1_t2l; |
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via1_sr = s->via1_sr; |
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via1_acr = s->via1_acr; via1_pcr = s->via1_pcr; |
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via1_ifr = s->via1_ifr; via1_ier = s->via1_ier; |
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|
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via2_pra = s->via2_pra; via2_ddra = s->via2_ddra; |
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via2_prb = s->via2_prb; via2_ddrb = s->via2_ddrb; |
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via2_t1c = s->via2_t1c; via2_t1l = s->via2_t1l; |
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via2_t2c = s->via2_t2c; via2_t2l = s->via2_t2l; |
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via2_sr = s->via2_sr; |
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via2_acr = s->via2_acr; via2_pcr = s->via2_pcr; |
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via2_ifr = s->via2_ifr; via2_ier = s->via2_ier; |
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} |
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|
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|
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/* |
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* Read a byte from I/O space |
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*/ |
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|
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inline uint8 MOS6502_1541::read_byte_io(uint16 adr) |
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{ |
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if ((adr & 0xfc00) == 0x1800) // VIA 1 |
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switch (adr & 0xf) { |
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case 0: |
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return (via1_prb & 0x1a |
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| ((IECLines & TheCIA2->IECLines) >> 7) // DATA |
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| ((IECLines & TheCIA2->IECLines) >> 4) & 0x04 // CLK |
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| (TheCIA2->IECLines << 3) & 0x80) ^ 0x85; // ATN |
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case 1: |
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case 15: |
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return 0xff; // Keep 1541C ROMs happy (track 0 sensor) |
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case 2: |
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return via1_ddrb; |
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case 3: |
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return via1_ddra; |
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case 4: |
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via1_ifr &= 0xbf; |
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return via1_t1c; |
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case 5: |
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return via1_t1c >> 8; |
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case 6: |
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return via1_t1l; |
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case 7: |
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return via1_t1l >> 8; |
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case 8: |
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via1_ifr &= 0xdf; |
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return via1_t2c; |
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case 9: |
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return via1_t2c >> 8; |
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case 10: |
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return via1_sr; |
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case 11: |
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return via1_acr; |
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case 12: |
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return via1_pcr; |
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case 13: |
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return via1_ifr | (via1_ifr & via1_ier ? 0x80 : 0); |
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case 14: |
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return via1_ier | 0x80; |
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default: // Can't happen |
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return 0; |
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} |
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|
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else if ((adr & 0xfc00) == 0x1c00) // VIA 2 |
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switch (adr & 0xf) { |
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case 0: |
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if (the_job->SyncFound()) |
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return via2_prb & 0x7f | the_job->WPState(); |
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else |
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return via2_prb | 0x80 | the_job->WPState(); |
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case 1: |
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case 15: |
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return the_job->ReadGCRByte(); |
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case 2: |
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return via2_ddrb; |
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case 3: |
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return via2_ddra; |
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case 4: |
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via2_ifr &= 0xbf; |
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interrupt.intr[INT_VIA2IRQ] = false; // Clear job IRQ |
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return via2_t1c; |
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case 5: |
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return via2_t1c >> 8; |
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case 6: |
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return via2_t1l; |
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case 7: |
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return via2_t1l >> 8; |
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case 8: |
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via2_ifr &= 0xdf; |
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return via2_t2c; |
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case 9: |
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return via2_t2c >> 8; |
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case 10: |
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return via2_sr; |
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case 11: |
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return via2_acr; |
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case 12: |
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return via2_pcr; |
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case 13: |
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return via2_ifr | (via2_ifr & via2_ier ? 0x80 : 0); |
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case 14: |
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return via2_ier | 0x80; |
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default: // Can't happen |
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return 0; |
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} |
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|
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else |
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return adr >> 8; |
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} |
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|
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|
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/* |
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* Read a byte from the CPU's address space |
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*/ |
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|
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uint8 MOS6502_1541::read_byte(uint16 adr) |
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{ |
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if (adr >= 0xc000) |
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return rom[adr & 0x3fff]; |
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else if (adr < 0x1000) |
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return ram[adr & 0x07ff]; |
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else |
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return read_byte_io(adr); |
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} |
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|
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|
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/* |
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* Read a word (little-endian) from the CPU's address space |
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*/ |
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|
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inline uint16 MOS6502_1541::read_word(uint16 adr) |
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{ |
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return read_byte(adr) | (read_byte(adr+1) << 8); |
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} |
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|
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|
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/* |
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* Write a byte to I/O space |
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*/ |
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|
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void MOS6502_1541::write_byte_io(uint16 adr, uint8 byte) |
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{ |
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if ((adr & 0xfc00) == 0x1800) // VIA 1 |
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switch (adr & 0xf) { |
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case 0: |
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via1_prb = byte; |
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byte = ~via1_prb & via1_ddrb; |
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IECLines = (byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80 |
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| (byte << 3) & 0x40; |
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break; |
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case 1: |
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case 15: |
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via1_pra = byte; |
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break; |
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case 2: |
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via1_ddrb = byte; |
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byte &= ~via1_prb; |
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IECLines = (byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80 |
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| (byte << 3) & 0x40; |
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break; |
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case 3: |
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via1_ddra = byte; |
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break; |
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case 4: |
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case 6: |
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via1_t1l = via1_t1l & 0xff00 | byte; |
357 |
break; |
358 |
case 5: |
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via1_t1l = via1_t1l & 0xff | (byte << 8); |
360 |
via1_ifr &= 0xbf; |
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via1_t1c = via1_t1l; |
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break; |
363 |
case 7: |
364 |
via1_t1l = via1_t1l & 0xff | (byte << 8); |
365 |
break; |
366 |
case 8: |
367 |
via1_t2l = via1_t2l & 0xff00 | byte; |
368 |
break; |
369 |
case 9: |
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via1_t2l = via1_t2l & 0xff | (byte << 8); |
371 |
via1_ifr &= 0xdf; |
372 |
via1_t2c = via1_t2l; |
373 |
break; |
374 |
case 10: |
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via1_sr = byte; |
376 |
break; |
377 |
case 11: |
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via1_acr = byte; |
379 |
break; |
380 |
case 12: |
381 |
via1_pcr = byte; |
382 |
break; |
383 |
case 13: |
384 |
via1_ifr &= ~byte; |
385 |
break; |
386 |
case 14: |
387 |
if (byte & 0x80) |
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via1_ier |= byte & 0x7f; |
389 |
else |
390 |
via1_ier &= ~byte; |
391 |
break; |
392 |
} |
393 |
|
394 |
else if ((adr & 0xfc00) == 0x1c00) |
395 |
switch (adr & 0xf) { |
396 |
case 0: |
397 |
if ((via2_prb ^ byte) & 8) // Bit 3: Drive LED |
398 |
the_display->UpdateLEDs(byte & 8 ? 1 : 0, 0, 0, 0); |
399 |
if ((via2_prb ^ byte) & 3) // Bits 0/1: Stepper motor |
400 |
if ((via2_prb & 3) == ((byte+1) & 3)) |
401 |
the_job->MoveHeadOut(); |
402 |
else if ((via2_prb & 3) == ((byte-1) & 3)) |
403 |
the_job->MoveHeadIn(); |
404 |
via2_prb = byte & 0xef; |
405 |
break; |
406 |
case 1: |
407 |
case 15: |
408 |
via2_pra = byte; |
409 |
break; |
410 |
case 2: |
411 |
via2_ddrb = byte; |
412 |
break; |
413 |
case 3: |
414 |
via2_ddra = byte; |
415 |
break; |
416 |
case 4: |
417 |
case 6: |
418 |
via2_t1l = via2_t1l & 0xff00 | byte; |
419 |
break; |
420 |
case 5: |
421 |
via2_t1l = via2_t1l & 0xff | (byte << 8); |
422 |
via2_ifr &= 0xbf; |
423 |
via2_t1c = via2_t1l; |
424 |
break; |
425 |
case 7: |
426 |
via2_t1l = via2_t1l & 0xff | (byte << 8); |
427 |
break; |
428 |
case 8: |
429 |
via2_t2l = via2_t2l & 0xff00 | byte; |
430 |
break; |
431 |
case 9: |
432 |
via2_t2l = via2_t2l & 0xff | (byte << 8); |
433 |
via2_ifr &= 0xdf; |
434 |
via2_t2c = via2_t2l; |
435 |
break; |
436 |
case 10: |
437 |
via2_sr = byte; |
438 |
break; |
439 |
case 11: |
440 |
via2_acr = byte; |
441 |
break; |
442 |
case 12: |
443 |
via2_pcr = byte; |
444 |
break; |
445 |
case 13: |
446 |
via2_ifr &= ~byte; |
447 |
break; |
448 |
case 14: |
449 |
if (byte & 0x80) |
450 |
via2_ier |= byte & 0x7f; |
451 |
else |
452 |
via2_ier &= ~byte; |
453 |
break; |
454 |
} |
455 |
} |
456 |
|
457 |
|
458 |
/* |
459 |
* Write a byte to the CPU's address space |
460 |
*/ |
461 |
|
462 |
inline void MOS6502_1541::write_byte(uint16 adr, uint8 byte) |
463 |
{ |
464 |
if (adr < 0x1000) |
465 |
ram[adr & 0x7ff] = byte; |
466 |
else |
467 |
write_byte_io(adr, byte); |
468 |
} |
469 |
|
470 |
|
471 |
/* |
472 |
* Read byte from 6502/1541 address space (used by SAM) |
473 |
*/ |
474 |
|
475 |
uint8 MOS6502_1541::ExtReadByte(uint16 adr) |
476 |
{ |
477 |
return read_byte(adr); |
478 |
} |
479 |
|
480 |
|
481 |
/* |
482 |
* Write byte to 6502/1541 address space (used by SAM) |
483 |
*/ |
484 |
|
485 |
void MOS6502_1541::ExtWriteByte(uint16 adr, uint8 byte) |
486 |
{ |
487 |
write_byte(adr, byte); |
488 |
} |
489 |
|
490 |
|
491 |
/* |
492 |
* Adc instruction |
493 |
*/ |
494 |
|
495 |
inline void MOS6502_1541::do_adc(uint8 byte) |
496 |
{ |
497 |
if (!d_flag) { |
498 |
uint16 tmp; |
499 |
|
500 |
// Binary mode |
501 |
tmp = a + byte + (c_flag ? 1 : 0); |
502 |
c_flag = tmp > 0xff; |
503 |
v_flag = !((a ^ byte) & 0x80) && ((a ^ tmp) & 0x80); |
504 |
z_flag = n_flag = a = tmp; |
505 |
|
506 |
} else { |
507 |
uint16 al, ah; |
508 |
|
509 |
// Decimal mode |
510 |
al = (a & 0x0f) + (byte & 0x0f) + (c_flag ? 1 : 0); // Calculate lower nybble |
511 |
if (al > 9) al += 6; // BCD fixup for lower nybble |
512 |
|
513 |
ah = (a >> 4) + (byte >> 4); // Calculate upper nybble |
514 |
if (al > 0x0f) ah++; |
515 |
|
516 |
z_flag = a + byte + (c_flag ? 1 : 0); // Set flags |
517 |
n_flag = ah << 4; // Only highest bit used |
518 |
v_flag = (((ah << 4) ^ a) & 0x80) && !((a ^ byte) & 0x80); |
519 |
|
520 |
if (ah > 9) ah += 6; // BCD fixup for upper nybble |
521 |
c_flag = ah > 0x0f; // Set carry flag |
522 |
a = (ah << 4) | (al & 0x0f); // Compose result |
523 |
} |
524 |
} |
525 |
|
526 |
|
527 |
/* |
528 |
* Sbc instruction |
529 |
*/ |
530 |
|
531 |
inline void MOS6502_1541::do_sbc(uint8 byte) |
532 |
{ |
533 |
uint16 tmp = a - byte - (c_flag ? 0 : 1); |
534 |
|
535 |
if (!d_flag) { |
536 |
|
537 |
// Binary mode |
538 |
c_flag = tmp < 0x100; |
539 |
v_flag = ((a ^ tmp) & 0x80) && ((a ^ byte) & 0x80); |
540 |
z_flag = n_flag = a = tmp; |
541 |
|
542 |
} else { |
543 |
uint16 al, ah; |
544 |
|
545 |
// Decimal mode |
546 |
al = (a & 0x0f) - (byte & 0x0f) - (c_flag ? 0 : 1); // Calculate lower nybble |
547 |
ah = (a >> 4) - (byte >> 4); // Calculate upper nybble |
548 |
if (al & 0x10) { |
549 |
al -= 6; // BCD fixup for lower nybble |
550 |
ah--; |
551 |
} |
552 |
if (ah & 0x10) ah -= 6; // BCD fixup for upper nybble |
553 |
|
554 |
c_flag = tmp < 0x100; // Set flags |
555 |
v_flag = ((a ^ tmp) & 0x80) && ((a ^ byte) & 0x80); |
556 |
z_flag = n_flag = tmp; |
557 |
|
558 |
a = (ah << 4) | (al & 0x0f); // Compose result |
559 |
} |
560 |
} |
561 |
|
562 |
|
563 |
/* |
564 |
* Reset CPU |
565 |
*/ |
566 |
|
567 |
void MOS6502_1541::Reset(void) |
568 |
{ |
569 |
// IEC lines and VIA registers |
570 |
IECLines = 0xc0; |
571 |
|
572 |
via1_pra = via1_ddra = via1_prb = via1_ddrb = 0; |
573 |
via1_acr = via1_pcr = 0; |
574 |
via1_ifr = via1_ier = 0; |
575 |
via2_pra = via2_ddra = via2_prb = via2_ddrb = 0; |
576 |
via2_acr = via2_pcr = 0; |
577 |
via2_ifr = via2_ier = 0; |
578 |
|
579 |
// Clear all interrupt lines |
580 |
interrupt.intr_any = 0; |
581 |
opflags = 0; |
582 |
|
583 |
// Read reset vector |
584 |
pc = read_word(0xfffc); |
585 |
state = 0; |
586 |
|
587 |
// Wake up 1541 |
588 |
Idle = false; |
589 |
} |
590 |
|
591 |
|
592 |
/* |
593 |
* Illegal opcode encountered |
594 |
*/ |
595 |
|
596 |
void MOS6502_1541::illegal_op(uint8 op, uint16 at) |
597 |
{ |
598 |
char illop_msg[80]; |
599 |
|
600 |
sprintf(illop_msg, "1541: Illegal opcode %02x at %04x.", op, at); |
601 |
if (ShowRequester(illop_msg, "Reset 1541", "Reset C64")) |
602 |
the_c64->Reset(); |
603 |
Reset(); |
604 |
} |
605 |
|
606 |
|
607 |
/* |
608 |
* Emulate one 6502 clock cycle |
609 |
*/ |
610 |
|
611 |
// Read byte from memory |
612 |
#define read_to(adr, to) \ |
613 |
to = read_byte(adr); |
614 |
|
615 |
// Read byte from memory, throw away result |
616 |
#define read_idle(adr) \ |
617 |
read_byte(adr); |
618 |
|
619 |
void MOS6502_1541::EmulateCycle(void) |
620 |
{ |
621 |
uint8 data, tmp; |
622 |
|
623 |
// Any pending interrupts in state 0 (opcode fetch)? |
624 |
if (!state && interrupt.intr_any) { |
625 |
if (interrupt.intr[INT_RESET]) { |
626 |
Reset(); |
627 |
} else if ((interrupt.intr[INT_VIA1IRQ] || interrupt.intr[INT_VIA2IRQ] || interrupt.intr[INT_IECIRQ]) && |
628 |
(!i_flag || (opflags & OPFLAG_IRQ_DISABLED)) && !(opflags & OPFLAG_IRQ_ENABLED)) { |
629 |
uint32 int_delay = (opflags & OPFLAG_INT_DELAYED) ? 1 : 0; // Taken branches to the same page delay the IRQ |
630 |
if (the_c64->CycleCounter - first_irq_cycle - int_delay >= 2) { |
631 |
state = 0x0008; |
632 |
opflags = 0; |
633 |
} |
634 |
} |
635 |
} |
636 |
|
637 |
#define IS_CPU_1541 |
638 |
#include "CPU_emulcycle.h" |
639 |
|
640 |
// Extension opcode |
641 |
case O_EXT: |
642 |
if (pc < 0xc000) { |
643 |
illegal_op(0xf2, pc-1); |
644 |
break; |
645 |
} |
646 |
switch (read_byte(pc++)) { |
647 |
case 0x00: // Go to sleep in DOS idle loop if error flag is clear and no command received |
648 |
Idle = !(ram[0x26c] | ram[0x7c]); |
649 |
pc = 0xebff; |
650 |
Last; |
651 |
case 0x01: // Write sector |
652 |
the_job->WriteSector(); |
653 |
pc = 0xf5dc; |
654 |
Last; |
655 |
case 0x02: // Format track |
656 |
the_job->FormatTrack(); |
657 |
pc = 0xfd8b; |
658 |
Last; |
659 |
default: |
660 |
illegal_op(0xf2, pc-1); |
661 |
break; |
662 |
} |
663 |
break; |
664 |
|
665 |
default: |
666 |
illegal_op(op, pc-1); |
667 |
break; |
668 |
} |
669 |
} |