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root/cebix/SheepShaver/src/rom_patches.cpp
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Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.28 by gbeauche, 2004-05-15T16:36:41Z vs.
Revision 1.29 by gbeauche, 2004-05-31T09:04:42Z

# Line 1058 | Line 1058 | static bool patch_nanokernel_boot(void)
1058   static bool patch_68k_emul(void)
1059   {
1060          uint32 *lp;
1061 <        uint32 base;
1061 >        uint32 base, loc;
1062  
1063          // Overwrite twi instructions
1064          static const uint8 twi_dat[] = {0x0f, 0xff, 0x00, 0x00, 0x0f, 0xff, 0x00, 0x01, 0x0f, 0xff, 0x00, 0x02};
# Line 1266 | Line 1266 | static bool patch_68k_emul(void)
1266          return false;
1267   dr_found:
1268          lp++;
1269 <        *lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff));          // b    DR_CACHE_BASE+0x1f000
1270 <        lp = (uint32 *)(ROM_BASE + 0x37f000);
1271 <        *lp++ = htonl(0x3c000000 + ((ROM_BASE + 0x46d0a4) >> 16));              // lis  r0,xxx
1272 <        *lp++ = htonl(0x60000000 + ((ROM_BASE + 0x46d0a4) & 0xffff));   // ori  r0,r0,xxx
1273 <        *lp++ = htonl(0x7c0903a6);                                                                              // mtctr        r0
1274 <        *lp = htonl(POWERPC_BCTR);                                                                              // bctr
1269 >        loc = (uint32)lp - ROM_BASE;
1270 >        if ((base = powerpc_branch_target(ROM_BASE + loc)) == 0) base = ROM_BASE + loc;
1271 >        static const uint8 dr_ret_dat[] = {0x80, 0xbf, 0x08, 0x14, 0x53, 0x19, 0x4d, 0xac, 0x7c, 0xa8, 0x03, 0xa6};
1272 >        if ((base = find_rom_data(base - ROM_BASE, 0x380000, dr_ret_dat, sizeof(dr_ret_dat))) == 0) return false;
1273 >        D(bug("dr_ret %08lx\n", base));
1274 >        if (base != loc) {
1275 >                // OldWorld ROMs contain an absolute branch
1276 >                D(bug(" patching absolute branch at %08x\n", (uint32)lp - ROM_BASE));
1277 >                *lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff));          // b    DR_CACHE_BASE+0x1f000
1278 >                lp = (uint32 *)(ROM_BASE + 0x37f000);
1279 >                *lp++ = htonl(0x3c000000 + ((ROM_BASE + base) >> 16));                  // lis  r0,xxx
1280 >                *lp++ = htonl(0x60000000 + ((ROM_BASE + base) & 0xffff));               // ori  r0,r0,xxx
1281 >                *lp++ = htonl(0x7c0803a6);                                                                              // mtlr r0
1282 >                *lp = htonl(POWERPC_BLR);                                                                               // blr
1283 >        }
1284          return true;
1285   }
1286  

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